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mirror of https://github.com/cc65/cc65.git synced 2024-11-18 15:05:14 +00:00

Working on the backend

git-svn-id: svn://svn.cc65.org/cc65/trunk@766 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
cuz 2001-05-29 07:41:08 +00:00
parent 3889a2bec9
commit a9674c071a
4 changed files with 656 additions and 104 deletions

View File

@ -65,8 +65,11 @@ struct CodeSeg;
#define REG_PTR1_LO 0x40U
#define REG_PTR1_HI 0x80U
#define REG_AX (REG_A | REG_X)
#define REG_EAX (REG_A | REG_X | REG_SREG_LO | REG_SREG_HI)
#define REG_XY (REG_X | REG_Y)
#define REG_AXY (REG_A | REG_X | REG_Y)
#define REG_SREG (REG_SREG_LO | REG_SREG_HI)
#define REG_PTR1 (REG_PTR1_LO | REG_PTR1_HI)

View File

@ -204,7 +204,7 @@ static CodeEntry* ParseInsn (CodeSeg* S, LineInfo* LI, const char* L)
L = ReadToken (L, " \t", Mnemo, sizeof (Mnemo));
/* Try to find the opcode description for the mnemonic */
OPC = FindOpcode (Mnemo);
OPC = FindOP65 (Mnemo);
/* If we didn't find the opcode, print an error and bail out */
if (OPC == 0) {

View File

@ -57,101 +57,618 @@
/* Opcode description table */
const OPCDesc OPCTable[OPCODE_COUNT] = {
/* Opcodes for the virtual stack machine */
{ OPC_LDA, /* opcode */
"loada", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_A, /* chg */
OF_CPU_VM | OF_LOAD /* flags */
},
{ OPC_LDAX, /* opcode */
"loadax", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_AX, /* chg */
OF_CPU_VM | OF_LOAD /* flags */
},
{ OPC_LDEAX, /* opcode */
"loadeax", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_EAX, /* chg */
OF_CPU_VM | OF_LOAD /* flags */
},
{ OPC_PHA, /* opcode */
"pusha", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_NONE, /* chg */
OF_CPU_VM /* flags */
},
{ OPC_PHAX, /* opcode */
"pushax", /* mnemonic */
0, /* size */
REG_AX, /* use */
REG_NONE, /* chg */
OF_CPU_VM /* flags */
},
{ OPC_PHEAX, /* opcode */
"pusheax", /* mnemonic */
0, /* size */
REG_EAX, /* use */
REG_NONE, /* chg */
OF_CPU_VM /* flags */
},
{ OPC_STA, /* opcode */
"storea", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_NONE, /* chg */
OF_CPU_VM /* flags */
},
{ OPC_STAX, /* opcode */
"storeax", /* mnemonic */
0, /* size */
REG_AX, /* use */
REG_NONE, /* chg */
OF_CPU_VM /* flags */
},
{ OPC_STEAX, /* opcode */
"storeeax", /* mnemonic */
0, /* size */
REG_EAX, /* use */
REG_NONE, /* chg */
OF_CPU_VM /* flags */
},
{ OPC_LEA, /* opcode */
"lea", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_AX, /* chg */
OF_CPU_VM /* flags */
},
{ OPC_JMP, /* opcode */
"jump", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CPU_VM | OF_UBRA /* flags */
},
/* 65XX opcodes */
{ OP65_ADC, "adc", 0, REG_A, REG_A, OF_NONE },
{ OP65_AND, "and", 0, REG_A, REG_A, OF_NONE },
{ OP65_ASL, "asl", 0, REG_A, REG_A, OF_NONE },
{ OP65_BCC, "bcc", 2, REG_NONE, REG_NONE, OF_CBRA },
{ OP65_BCS, "bcs", 2, REG_NONE, REG_NONE, OF_CBRA },
{ OP65_BEQ, "beq", 2, REG_NONE, REG_NONE, OF_CBRA | OF_ZBRA | OF_FBRA },
{ OP65_BIT, "bit", 0, REG_A, REG_NONE, OF_NONE },
{ OP65_BMI, "bmi", 2, REG_NONE, REG_NONE, OF_CBRA | OF_FBRA },
{ OP65_BNE, "bne", 2, REG_NONE, REG_NONE, OF_CBRA | OF_ZBRA | OF_FBRA },
{ OP65_BPL, "bpl", 2, REG_NONE, REG_NONE, OF_CBRA | OF_FBRA },
{ OP65_BRA, "bra", 2, REG_NONE, REG_NONE, OF_UBRA },
{ OP65_BRK, "brk", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_BVC, "bvc", 2, REG_NONE, REG_NONE, OF_CBRA },
{ OP65_BVS, "bvs", 2, REG_NONE, REG_NONE, OF_CBRA },
{ OP65_CLC, "clc", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_CLD, "cld", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_CLI, "cli", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_CLV, "clv", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_CMP, "cmp", 0, REG_A, REG_NONE, OF_NONE },
{ OP65_CPX, "cpx", 0, REG_X, REG_NONE, OF_NONE },
{ OP65_CPY, "cpy", 0, REG_Y, REG_NONE, OF_NONE },
{ OP65_DEA, "dea", 1, REG_A, REG_A, OF_NONE },
{ OP65_DEC, "dec", 0, REG_NONE, REG_NONE, OF_NONE },
{ OP65_DEX, "dex", 1, REG_X, REG_X, OF_NONE },
{ OP65_DEY, "dey", 1, REG_Y, REG_Y, OF_NONE },
{ OP65_EOR, "eor", 0, REG_A, REG_A, OF_NONE },
{ OP65_INA, "ina", 1, REG_A, REG_A, OF_NONE },
{ OP65_INC, "inc", 0, REG_NONE, REG_NONE, OF_NONE },
{ OP65_INX, "inx", 1, REG_X, REG_X, OF_NONE },
{ OP65_INY, "iny", 1, REG_Y, REG_Y, OF_NONE },
{ OP65_JCC, "jcc", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
{ OP65_JCS, "jcs", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
{ OP65_JEQ, "jeq", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA },
{ OP65_JMI, "jmi", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_FBRA },
{ OP65_JMP, "jmp", 3, REG_NONE, REG_NONE, OF_UBRA | OF_LBRA },
{ OP65_JNE, "jne", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA },
{ OP65_JPL, "jpl", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA | OF_FBRA },
{ OP65_JSR, "jsr", 3, REG_NONE, REG_NONE, OF_CALL },
{ OP65_JVC, "jvc", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
{ OP65_JVS, "jvs", 5, REG_NONE, REG_NONE, OF_CBRA | OF_LBRA },
{ OP65_LDA, "lda", 0, REG_NONE, REG_A, OF_LOAD },
{ OP65_LDX, "ldx", 0, REG_NONE, REG_X, OF_LOAD },
{ OP65_LDY, "ldy", 0, REG_NONE, REG_Y, OF_LOAD },
{ OP65_LSR, "lsr", 0, REG_A, REG_A, OF_NONE },
{ OP65_NOP, "nop", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_ORA, "ora", 0, REG_A, REG_A, OF_NONE },
{ OP65_PHA, "pha", 1, REG_A, REG_NONE, OF_NONE },
{ OP65_PHP, "php", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_PHX, "phx", 1, REG_X, REG_NONE, OF_NONE },
{ OP65_PHY, "phy", 1, REG_Y, REG_NONE, OF_NONE },
{ OP65_PLA, "pla", 1, REG_NONE, REG_A, OF_NONE },
{ OP65_PLP, "plp", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_PLX, "plx", 1, REG_NONE, REG_X, OF_NONE },
{ OP65_PLY, "ply", 1, REG_NONE, REG_Y, OF_NONE },
{ OP65_ROL, "rol", 0, REG_A, REG_A, OF_NONE },
{ OP65_ROR, "ror", 0, REG_A, REG_A, OF_NONE },
{ OP65_RTI, "rti", 1, REG_NONE, REG_NONE, OF_RET },
{ OP65_RTS, "rts", 1, REG_NONE, REG_NONE, OF_RET },
{ OP65_SBC, "sbc", 0, REG_A, REG_A, OF_NONE },
{ OP65_SEC, "sec", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_SED, "sed", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_SEI, "sei", 1, REG_NONE, REG_NONE, OF_NONE },
{ OP65_STA, "sta", 0, REG_A, REG_NONE, OF_NONE },
{ OP65_STX, "stx", 0, REG_X, REG_NONE, OF_NONE },
{ OP65_STY, "sty", 0, REG_Y, REG_NONE, OF_NONE },
{ OP65_TAX, "tax", 1, REG_A, REG_X, OF_XFR },
{ OP65_TAY, "tay", 1, REG_A, REG_Y, OF_XFR },
{ OP65_TRB, "trb", 0, REG_A, REG_NONE, OF_NONE },
{ OP65_TSB, "tsb", 0, REG_A, REG_NONE, OF_NONE },
{ OP65_TSX, "tsx", 1, REG_NONE, REG_X, OF_XFR },
{ OP65_TXA, "txa", 1, REG_X, REG_A, OF_XFR },
{ OP65_TXS, "txs", 1, REG_X, REG_NONE, OF_XFR },
{ OP65_TYA, "tya", 1, REG_A, REG_A, OF_XFR },
{ OP65_ADC, /* opcode */
"adc", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_AND, /* opcode */
"and", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_ASL, /* opcode */
"asl", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_BCC, /* opcode */
"bcc", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA /* flags */
},
{ OP65_BCS, /* opcode */
"bcs", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA /* flags */
},
{ OP65_BEQ, /* opcode */
"beq", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_ZBRA | OF_FBRA /* flags */
},
{ OP65_BIT, /* opcode */
"bit", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_BMI, /* opcode */
"bmi", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_FBRA /* flags */
},
{ OP65_BNE, /* opcode */
"bne", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_ZBRA | OF_FBRA /* flags */
},
{ OP65_BPL, /* opcode */
"bpl", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_FBRA /* flags */
},
{ OP65_BRA, /* opcode */
"bra", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_UBRA /* flags */
},
{ OP65_BRK, /* opcode */
"brk", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_BVC, /* opcode */
"bvc", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA /* flags */
},
{ OP65_BVS, /* opcode */
"bvs", /* mnemonic */
2, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA /* flags */
},
{ OP65_CLC, /* opcode */
"clc", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_CLD, /* opcode */
"cld", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_CLI, /* opcode */
"cli", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_CLV, /* opcode */
"clv", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_CMP, /* opcode */
"cmp", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_CPX, /* opcode */
"cpx", /* mnemonic */
0, /* size */
REG_X, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_CPY, /* opcode */
"cpy", /* mnemonic */
0, /* size */
REG_Y, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_DEA, /* opcode */
"dea", /* mnemonic */
1, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_DEC, /* opcode */
"dec", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_DEX, /* opcode */
"dex", /* mnemonic */
1, /* size */
REG_X, /* use */
REG_X, /* chg */
OF_NONE /* flags */
},
{ OP65_DEY, /* opcode */
"dey", /* mnemonic */
1, /* size */
REG_Y, /* use */
REG_Y, /* chg */
OF_NONE /* flags */
},
{ OP65_EOR, /* opcode */
"eor", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_INA, /* opcode */
"ina", /* mnemonic */
1, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_INC, /* opcode */
"inc", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_INX, /* opcode */
"inx", /* mnemonic */
1, /* size */
REG_X, /* use */
REG_X, /* chg */
OF_NONE /* flags */
},
{ OP65_INY, /* opcode */
"iny", /* mnemonic */
1, /* size */
REG_Y, /* use */
REG_Y, /* chg */
OF_NONE /* flags */
},
{ OP65_JCC, /* opcode */
"jcc", /* mnemonic */
5, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_LBRA /* flags */
},
{ OP65_JCS, /* opcode */
"jcs", /* mnemonic */
5, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_LBRA /* flags */
},
{ OP65_JEQ, /* opcode */
"jeq", /* mnemonic */
5, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA /* flags */
},
{ OP65_JMI, /* opcode */
"jmi", /* mnemonic */
5, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_LBRA | OF_FBRA /* flags */
},
{ OP65_JMP, /* opcode */
"jmp", /* mnemonic */
3, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_UBRA | OF_LBRA /* flags */
},
{ OP65_JNE, /* opcode */
"jne", /* mnemonic */
5, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA /* flags */
},
{ OP65_JPL, /* opcode */
"jpl", /* mnemonic */
5, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_LBRA | OF_FBRA /* flags */
},
{ OP65_JSR, /* opcode */
"jsr", /* mnemonic */
3, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CALL /* flags */
},
{ OP65_JVC, /* opcode */
"jvc", /* mnemonic */
5, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_LBRA /* flags */
},
{ OP65_JVS, /* opcode */
"jvs", /* mnemonic */
5, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_CBRA | OF_LBRA /* flags */
},
{ OP65_LDA, /* opcode */
"lda", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_A, /* chg */
OF_LOAD /* flags */
},
{ OP65_LDX, /* opcode */
"ldx", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_X, /* chg */
OF_LOAD /* flags */
},
{ OP65_LDY, /* opcode */
"ldy", /* mnemonic */
0, /* size */
REG_NONE, /* use */
REG_Y, /* chg */
OF_LOAD /* flags */
},
{ OP65_LSR, /* opcode */
"lsr", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_NOP, /* opcode */
"nop", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_ORA, /* opcode */
"ora", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_PHA, /* opcode */
"pha", /* mnemonic */
1, /* size */
REG_A, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_PHP, /* opcode */
"php", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_PHX, /* opcode */
"phx", /* mnemonic */
1, /* size */
REG_X, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_PHY, /* opcode */
"phy", /* mnemonic */
1, /* size */
REG_Y, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_PLA, /* opcode */
"pla", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_PLP, /* opcode */
"plp", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_PLX, /* opcode */
"plx", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_X, /* chg */
OF_NONE /* flags */
},
{ OP65_PLY, /* opcode */
"ply", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_Y, /* chg */
OF_NONE /* flags */
},
{ OP65_ROL, /* opcode */
"rol", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_ROR, /* opcode */
"ror", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_RTI, /* opcode */
"rti", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_RET /* flags */
},
{ OP65_RTS, /* opcode */
"rts", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_RET /* flags */
},
{ OP65_SBC, /* opcode */
"sbc", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_NONE /* flags */
},
{ OP65_SEC, /* opcode */
"sec", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_SED, /* opcode */
"sed", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_SEI, /* opcode */
"sei", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_STA, /* opcode */
"sta", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_STX, /* opcode */
"stx", /* mnemonic */
0, /* size */
REG_X, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_STY, /* opcode */
"sty", /* mnemonic */
0, /* size */
REG_Y, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_TAX, /* opcode */
"tax", /* mnemonic */
1, /* size */
REG_A, /* use */
REG_X, /* chg */
OF_XFR /* flags */
},
{ OP65_TAY, /* opcode */
"tay", /* mnemonic */
1, /* size */
REG_A, /* use */
REG_Y, /* chg */
OF_XFR /* flags */
},
{ OP65_TRB, /* opcode */
"trb", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_TSB, /* opcode */
"tsb", /* mnemonic */
0, /* size */
REG_A, /* use */
REG_NONE, /* chg */
OF_NONE /* flags */
},
{ OP65_TSX, /* opcode */
"tsx", /* mnemonic */
1, /* size */
REG_NONE, /* use */
REG_X, /* chg */
OF_XFR /* flags */
},
{ OP65_TXA, /* opcode */
"txa", /* mnemonic */
1, /* size */
REG_X, /* use */
REG_A, /* chg */
OF_XFR /* flags */
},
{ OP65_TXS, /* opcode */
"txs", /* mnemonic */
1, /* size */
REG_X, /* use */
REG_NONE, /* chg */
OF_XFR /* flags */
},
{ OP65_TYA, /* opcode */
"tya", /* mnemonic */
1, /* size */
REG_A, /* use */
REG_A, /* chg */
OF_XFR /* flags */
},
};
/*****************************************************************************/
/* Code */
/* Code */
/*****************************************************************************/
static int Compare (const void* Key, const void* Desc)
/* Compare function for bsearch */
static int FindCmp (const void* Key, const void* Desc)
/* Compare function for FindOpcode */
{
return strcmp (Key, ((OPCDesc*)Desc)->Mnemo);
}
const OPCDesc* FindOpcode (const char* M)
const OPCDesc* FindOP65 (const char* M)
/* Find the given opcode and return the opcode number. If the opcode was not
* found, return OP65_INVALID.
* found, return NULL.
*/
{
unsigned I;
@ -172,7 +689,8 @@ const OPCDesc* FindOpcode (const char* M)
Mnemo[I] = '\0';
/* Search for the mnemonic in the table and return the result */
return bsearch (Mnemo, OPCTable, OPCODE_COUNT, sizeof (OPCTable[0]), Compare);
return bsearch (Mnemo, OPCTable+OP65_FIRST, OP65_COUNT,
sizeof (OPCTable[0]), FindCmp );
}
@ -358,9 +876,9 @@ bc_t GetInverseCond (bc_t BC)
case BC_PL: return BC_MI;
case BC_VC: return BC_VS;
case BC_VS: return BC_VC;
default:
Internal ("GetInverseCond: Invalid condition: %d", BC);
return 0;
default:
Internal ("GetInverseCond: Invalid condition: %d", BC);
return 0;
}
}

View File

@ -52,6 +52,19 @@
/* Definitions for the possible opcodes */
typedef enum {
/* Opcodes for the virtual stack machine */
OPC_LDA,
OPC_LDAX,
OPC_LDEAX,
OPC_PHA,
OPC_PHAX,
OPC_PHEAX,
OPC_STA,
OPC_STAX,
OPC_STEAX,
OPC_LEA,
OPC_JMP,
/* 65XX opcodes */
OP65_ADC,
OP65_AND,
@ -126,17 +139,32 @@ typedef enum {
OP65_TXA,
OP65_TXS,
OP65_TYA,
OPCODE_COUNT /* Number of opcodes available */
/* Number of opcodes available */
OPCODE_COUNT,
/* Several other opcode information constants */
OP65_FIRST = OP65_ADC,
OP65_LAST = OP65_TYA,
OP65_COUNT = OP65_LAST - OP65_FIRST + 1
} opc_t;
/* Addressing modes (bitmapped). */
/* Addressing modes */
typedef enum {
AM65_IMP, /* implicit */
AM65_ACC, /* accumulator */
AM65_IMM, /* immidiate */
AM65_ZP, /* zeropage */
AM65_ZPX, /* zeropage,X */
AM65_ABS, /* absolute */
/* Addressing modes of the virtual stack machine */
AM_IMP,
AM_IMM,
AM_STACK,
AM_ABS,
/* 65XX addressing modes */
AM65_IMP, /* implicit */
AM65_ACC, /* accumulator */
AM65_IMM, /* immidiate */
AM65_ZP, /* zeropage */
AM65_ZPX, /* zeropage,X */
AM65_ABS, /* absolute */
AM65_ABSX, /* absolute,X */
AM65_ABSY, /* absolute,Y */
AM65_ZPX_IND, /* (zeropage,x) */
@ -149,7 +177,7 @@ typedef enum {
typedef enum {
BC_CC,
BC_CS,
BC_EQ,
BC_EQ,
BC_MI,
BC_NE,
BC_PL,
@ -158,16 +186,19 @@ typedef enum {
} bc_t;
/* Opcode info */
#define OF_NONE 0x0000U /* No additional information */
#define OF_UBRA 0x0001U /* Unconditional branch */
#define OF_CBRA 0x0002U /* Conditional branch */
#define OF_ZBRA 0x0004U /* Branch on zero flag condition */
#define OF_FBRA 0x0008U /* Branch on cond set by a load */
#define OF_LBRA 0x0010U /* Jump/branch is long */
#define OF_RET 0x0020U /* Return from function */
#define OF_LOAD 0x0040U /* Register load */
#define OF_XFR 0x0080U /* Transfer instruction */
#define OF_CALL 0x0100U /* A subroutine call */
#define OF_NONE 0x0000U /* No additional information */
#define OF_CPU_6502 0x0000U /* 6502 opcode */
#define OF_CPU_VM 0x0001U /* Virtual machine opcode */
#define OF_MASK_CPU 0x0001U /* Mask for the cpu field */
#define OF_UBRA 0x0010U /* Unconditional branch */
#define OF_CBRA 0x0020U /* Conditional branch */
#define OF_ZBRA 0x0040U /* Branch on zero flag condition */
#define OF_FBRA 0x0080U /* Branch on cond set by a load */
#define OF_LBRA 0x0100U /* Jump/branch is long */
#define OF_RET 0x0200U /* Return from function */
#define OF_LOAD 0x0400U /* Register load */
#define OF_XFR 0x0800U /* Transfer instruction */
#define OF_CALL 0x1000U /* A subroutine call */
/* Combined infos */
#define OF_BRA (OF_UBRA | OF_CBRA) /* Operation is a jump/branch */
@ -176,7 +207,7 @@ typedef enum {
/* Opcode description */
typedef struct {
opc_t OPC; /* Opcode */
char Mnemo[8]; /* Mnemonic */
char Mnemo[9]; /* Mnemonic */
unsigned char Size; /* Size, 0 = check addressing mode */
unsigned char Use; /* Registers used by this insn */
unsigned char Chg; /* Registers changed by this insn */
@ -194,7 +225,7 @@ extern const OPCDesc OPCTable[OPCODE_COUNT];
const OPCDesc* FindOpcode (const char* OPC);
const OPCDesc* FindOP65 (const char* OPC);
/* Find the given opcode and return the opcode description. If the opcode was
* not found, NULL is returned.
*/