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make sure clocktick starts at zero
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parent
21d7729ad1
commit
d229d51be5
@ -2,20 +2,30 @@
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; clock_t clock (void);
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;
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.include "pce.inc"
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.include "pce.inc"
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.export _clock
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.importzp sreg
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;; .importzp tickcount
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.export _clock
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.importzp sreg
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;; .importzp tickcount
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.proc _clock
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lda tickcount+3
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sta sreg+1
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lda tickcount+2
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sta sreg
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ldx tickcount+1
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lda tickcount
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rts
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lda tickcount+3
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sta sreg+1
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lda tickcount+2
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sta sreg
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ldx tickcount+1
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lda tickcount
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rts
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.endproc
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.constructor initclock, 24
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initclock:
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lda #0
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ldx #3
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@lp: sta tickcount,x
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dex
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bpl @lp
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rts
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@ -88,8 +88,6 @@ start:
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lda #$05
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sta IRQ_MASK ; IRQ1=on
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cli
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; Clear the BSS data
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jsr zerobss
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@ -141,6 +139,8 @@ start:
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; Call module constructors
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jsr initlib
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cli ; allow IRQ only after constructors have run
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; Pass an empty command line
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jsr push0 ; argc
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jsr push0 ; argv
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