Oliver Schmidt 5493c9e7c2 Don't empty the Receive Data Register on filling the Transmit Data Register ... The Receive Data Register and the Transmit Data Register share share a single address. Accessing that address with STA abs,X in order to fill the Transmit Data Register causes a 6502 false read which causes the Receive Data Register to be emptied. The simplest way to work around that issue - which I chose here - is to move the base address for all ACIA accesses from page $C0 to page $BF. However, that adds an additional cycle to all read accesses. An alternative approach would be to only modify the single line `sta ACIA_DATA,x`.		2022-09-08 17:11:30 +02:00
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apple2	Don't empty the Receive Data Register on filling the Transmit Data Register	2022-09-08 17:11:30 +02:00
atari
atari2600
atari5200
atari7800	Speed up the cursor a bit	2022-07-21 03:20:45 +02:00
atmos
c16
c64	detect number of RAM pages	2022-07-24 02:47:02 +02:00
c128
cbm
cbm510
cbm610
common	Shorter isascii	2022-08-04 00:25:04 +02:00
conio
creativision
cx16	import RDTIM symbol instead of hard-wiring it here	2022-08-08 15:21:30 -05:00
dbg	Removed an extra colon from libsrc/dbg/dbg/c.	2022-07-24 20:58:10 +08:00
em
gamate	remove +x flag	2022-07-21 03:22:52 +02:00
geos-apple
geos-cbm
geos-common	Revert "rename '_poserror' to '__poserror'"	2022-07-24 18:14:21 +02:00
joystick
lynx	smarter manufacturer	2022-07-21 03:22:52 +02:00
mouse
nes
none
osic1p	Fix switched meaning of '\n' and '\r'	2022-07-21 03:22:52 +02:00
pce
pet
plus4
runtime
serial
sim6502
supervision
sym1
telestrat	fix space	2022-07-21 03:22:52 +02:00
tgi	Don't hide errors in error handling	2022-09-02 11:55:54 +02:00
vic20
zlib
Makefile	build: allow empty prefix	2022-07-21 03:22:52 +02:00