Update Memory interface

Because io.Reader and io.Writer already claim the functions Read and
Write it was necessary to rename the Memory interface methods Read and
Write to ReadByte and WriteByte.

address_bus.go

@@ -62,13 +62,13 @@ Read an 8-bit value from Memory attached at the 16-bit address.
 
 This will panic if you try to read from an address that has no Memory attached.
 */
-func (a *AddressBus) Read(address uint16) byte {
+func (a *AddressBus) ReadByte(address uint16) byte {
 	addressable, err := a.addressableForAddress(address)
 	if err != nil {
 		panic(err)
 	}
 
-	return addressable.memory.Read(address - addressable.start)
+	return addressable.memory.ReadByte(address - addressable.start)
 }
 
 /*
@@ -77,8 +77,8 @@ Convenience method to quickly read a 16-bit value from address and address + 1.
 Note that we first read the LOW byte from address and then the HIGH byte from address + 1.
 */
 func (a *AddressBus) Read16(address uint16) uint16 {
-	lo := uint16(a.Read(address))
-	hi := uint16(a.Read(address + 1))
+	lo := uint16(a.ReadByte(address))
+	hi := uint16(a.ReadByte(address + 1))
 
 	return (hi << 8) | lo
 }
@@ -89,13 +89,13 @@ Write an 8-bit value to the Memory at the 16-bit address.
 This will panic if you try to write to an address that has no Memory attached or
 Memory that is read-only, like Rom.
 */
-func (a *AddressBus) Write(address uint16, data byte) {
+func (a *AddressBus) WriteByte(address uint16, data byte) {
 	addressable, err := a.addressableForAddress(address)
 	if err != nil {
 		panic(err)
 	}
 
-	addressable.memory.Write(address-addressable.start, data)
+	addressable.memory.WriteByte(address-addressable.start, data)
 }
 
 /*
@@ -104,8 +104,8 @@ Convenience method to quickly write a 16-bit value to address and address + 1.
 Note that the LOW byte will be stored in address and the high byte in address + 1.
 */
 func (a *AddressBus) Write16(address uint16, data uint16) {
-	a.Write(address, byte(data))
-	a.Write(address+1, byte(data>>8))
+	a.WriteByte(address, byte(data))
+	a.WriteByte(address+1, byte(data>>8))
 }
 
 // Returns the addressable for the specified address, or an error if no addressable exists.

address_bus_test.go

@@ -1,8 +1,9 @@
 package i6502
 
 import (
-	"github.com/stretchr/testify/assert"
 	"testing"
+
+	"github.com/stretchr/testify/assert"
 )
 
 func TestEmptyAddressBus(t *testing.T) {
@@ -37,29 +38,29 @@ func TestBusReadWrite(t *testing.T) {
 	bus.Attach(ram2, 0x8000)
 
 	// 8-bit Writing
-	bus.Write(0x1234, 0xFA)
-	assert.Equal(0xFA, ram.Read(0x1234))
+	bus.WriteByte(0x1234, 0xFA)
+	assert.Equal(0xFA, ram.ReadByte(0x1234))
 
 	// 16-bit Writing
 	bus.Write16(0x1000, 0xAB42)
-	assert.Equal(0x42, ram.Read(0x1000))
-	assert.Equal(0xAB, ram.Read(0x1001))
+	assert.Equal(0x42, ram.ReadByte(0x1000))
+	assert.Equal(0xAB, ram.ReadByte(0x1001))
 
 	// 8-bit Reading
-	ram.Write(0x5522, 0xDA)
-	assert.Equal(0xDA, bus.Read(0x5522))
+	ram.WriteByte(0x5522, 0xDA)
+	assert.Equal(0xDA, bus.ReadByte(0x5522))
 
 	// 16-bit Reading
-	ram.Write(0x4440, 0x7F)
-	ram.Write(0x4441, 0x56)
+	ram.WriteByte(0x4440, 0x7F)
+	ram.WriteByte(0x4441, 0x56)
 	assert.Equal(0x567F, bus.Read16(0x4440))
 
 	//// Test addressing memory not mounted at 0x0000
 
 	// Read from relative addressable Ram2: $C123
-	ram2.Write(0x4123, 0xEF)
-	assert.Equal(0xEF, bus.Read(0xC123))
+	ram2.WriteByte(0x4123, 0xEF)
+	assert.Equal(0xEF, bus.ReadByte(0xC123))
 
-	bus.Write(0x8001, 0x12)
-	assert.Equal(0x12, ram2.Read(0x0001))
+	bus.WriteByte(0x8001, 0x12)
+	assert.Equal(0x12, ram2.ReadByte(0x0001))
 }

cpu.go

@@ -90,7 +90,7 @@ func (c *Cpu) handleIrq(PC uint16) {
 // and point the Program Counter to the beginning of the program.
 func (c *Cpu) LoadProgram(data []byte, location uint16) {
 	for i, b := range data {
-		c.Bus.Write(location+uint16(i), b)
+		c.Bus.WriteByte(location+uint16(i), b)
 	}
 
 	c.PC = location
@@ -158,13 +158,13 @@ func (c *Cpu) execute(instruction Instruction) {
 		c.setA(c.A ^ value)
 	case sta:
 		address := c.memoryAddress(instruction)
-		c.Bus.Write(address, c.A)
+		c.Bus.WriteByte(address, c.A)
 	case stx:
 		address := c.memoryAddress(instruction)
-		c.Bus.Write(address, c.X)
+		c.Bus.WriteByte(address, c.X)
 	case sty:
 		address := c.memoryAddress(instruction)
-		c.Bus.Write(address, c.Y)
+		c.Bus.WriteByte(address, c.Y)
 	case tax:
 		c.setX(c.A)
 	case tay:
@@ -264,7 +264,7 @@ func (c *Cpu) execute(instruction Instruction) {
 
 func (c *Cpu) readNextInstruction() Instruction {
 	// Read the opcode
-	opcode := c.Bus.Read(c.PC)
+	opcode := c.Bus.ReadByte(c.PC)
 
 	optype, ok := opTypes[opcode]
 	if !ok {
@@ -275,7 +275,7 @@ func (c *Cpu) readNextInstruction() Instruction {
 	switch instruction.Size {
 	case 1: // Zero operand instruction
 	case 2: // 8-bit operand
-		instruction.Op8 = c.Bus.Read(c.PC + 1)
+		instruction.Op8 = c.Bus.ReadByte(c.PC + 1)
 	case 3: // 16-bit operand
 		instruction.Op16 = c.Bus.Read16(c.PC + 1)
 	}
@@ -297,7 +297,7 @@ func (c *Cpu) resolveOperand(in Instruction) uint8 {
 	case immediate:
 		return in.Op8
 	default:
-		return c.Bus.Read(c.memoryAddress(in))
+		return c.Bus.ReadByte(c.memoryAddress(in))
 	}
 }
 
@@ -356,17 +356,17 @@ func (c *Cpu) sbc(in Instruction) {
 
 func (c *Cpu) inc(in Instruction) {
 	address := c.memoryAddress(in)
-	value := c.Bus.Read(address) + 1
+	value := c.Bus.ReadByte(address) + 1
 
-	c.Bus.Write(address, value)
+	c.Bus.WriteByte(address, value)
 	c.setArithmeticFlags(value)
 }
 
 func (c *Cpu) dec(in Instruction) {
 	address := c.memoryAddress(in)
-	value := c.Bus.Read(address) - 1
+	value := c.Bus.ReadByte(address) - 1
 
-	c.Bus.Write(address, value)
+	c.Bus.WriteByte(address, value)
 	c.setArithmeticFlags(value)
 }
 
@@ -378,10 +378,10 @@ func (c *Cpu) asl(in Instruction) {
 		c.setArithmeticFlags(c.A)
 	default:
 		address := c.memoryAddress(in)
-		value := c.Bus.Read(address)
+		value := c.Bus.ReadByte(address)
 		c.setCarry((value >> 7) == 1)
 		value <<= 1
-		c.Bus.Write(address, value)
+		c.Bus.WriteByte(address, value)
 		c.setArithmeticFlags(value)
 	}
 }
@@ -394,10 +394,10 @@ func (c *Cpu) lsr(in Instruction) {
 		c.setArithmeticFlags(c.A)
 	default:
 		address := c.memoryAddress(in)
-		value := c.Bus.Read(address)
+		value := c.Bus.ReadByte(address)
 		c.setCarry((value & 0x01) == 1)
 		value >>= 1
-		c.Bus.Write(address, value)
+		c.Bus.WriteByte(address, value)
 		c.setArithmeticFlags(value)
 	}
 }
@@ -412,10 +412,10 @@ func (c *Cpu) rol(in Instruction) {
 		c.setArithmeticFlags(c.A)
 	default:
 		address := c.memoryAddress(in)
-		value := c.Bus.Read(address)
+		value := c.Bus.ReadByte(address)
 		c.setCarry((value & 0x80) != 0)
 		value = value<<1 | carry
-		c.Bus.Write(address, value)
+		c.Bus.WriteByte(address, value)
 		c.setArithmeticFlags(value)
 	}
 }
@@ -430,10 +430,10 @@ func (c *Cpu) ror(in Instruction) {
 		c.setArithmeticFlags(c.A)
 	default:
 		address := c.memoryAddress(in)
-		value := c.Bus.Read(address)
+		value := c.Bus.ReadByte(address)
 		c.setCarry(value&0x01 == 1)
 		value = value>>1 | carry<<7
-		c.Bus.Write(address, value)
+		c.Bus.WriteByte(address, value)
 		c.setArithmeticFlags(value)
 	}
 }
@@ -513,15 +513,15 @@ func (c *Cpu) sbcDecimal(a uint8, b uint8, carryIn uint8) {
 }
 
 func (c *Cpu) stackPush(data byte) {
-	c.Bus.Write(StackBase+uint16(c.SP), data)
+	c.Bus.WriteByte(StackBase+uint16(c.SP), data)
 	c.SP -= 1
 }
 
 func (c *Cpu) stackPeek() byte {
-	return c.Bus.Read(StackBase + uint16(c.SP+1))
+	return c.Bus.ReadByte(StackBase + uint16(c.SP+1))
 }
 
 func (c *Cpu) stackPop() byte {
 	c.SP += 1
-	return c.Bus.Read(StackBase + uint16(c.SP))
+	return c.Bus.ReadByte(StackBase + uint16(c.SP))
 }

memory.go

@@ -6,6 +6,6 @@ and become accessible by the Cpu.
 */
 type Memory interface {
 	Size() uint16
-	Read(address uint16) byte
-	Write(address uint16, data byte)
+	ReadByte(address uint16) byte
+	WriteByte(address uint16, data byte)
 }

ram.go

@@ -16,10 +16,10 @@ func (r *Ram) Size() uint16 {
 	return uint16(len(r.data))
 }
 
-func (r *Ram) Read(address uint16) byte {
+func (r *Ram) ReadByte(address uint16) byte {
 	return r.data[address]
 }
 
-func (r *Ram) Write(address uint16, data byte) {
+func (r *Ram) WriteByte(address uint16, data byte) {
 	r.data[address] = data
 }

ram_test.go

@@ -1,8 +1,9 @@
 package i6502
 
 import (
-	"github.com/stretchr/testify/assert"
 	"testing"
+
+	"github.com/stretchr/testify/assert"
 )
 
 func TestRamSize(t *testing.T) {
@@ -18,6 +19,6 @@ func TestRamReadWrite(t *testing.T) {
 		assert.Equal(t, 0x00, ram.data[i])
 	}
 
-	ram.Write(0x1000, 0x42)
-	assert.Equal(t, 0x42, ram.Read(0x1000))
+	ram.WriteByte(0x1000, 0x42)
+	assert.Equal(t, 0x42, ram.ReadByte(0x1000))
 }