2009-06-19 01:51:50 +00:00
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//===- ARMSchedule.td - ARM Scheduling Definitions ---------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Functional units across ARM processors
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//
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2009-08-11 22:38:43 +00:00
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def FU_Issue : FuncUnit; // issue
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def FU_Pipe0 : FuncUnit; // pipeline 0
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def FU_Pipe1 : FuncUnit; // pipeline 1
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2009-08-10 15:56:13 +00:00
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def FU_LdSt0 : FuncUnit; // pipeline 0 load/store
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def FU_LdSt1 : FuncUnit; // pipeline 1 load/store
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2009-09-21 20:52:17 +00:00
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def FU_NPipe : FuncUnit; // NEON ALU/MUL pipe
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def FU_NLSPipe : FuncUnit; // NEON LS pipe
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2009-06-19 01:51:50 +00:00
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//===----------------------------------------------------------------------===//
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// Instruction Itinerary classes used for ARM
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//
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2009-08-19 18:00:44 +00:00
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def IIC_iALUx : InstrItinClass;
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def IIC_iALUi : InstrItinClass;
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def IIC_iALUr : InstrItinClass;
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def IIC_iALUsi : InstrItinClass;
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def IIC_iALUsr : InstrItinClass;
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def IIC_iUNAr : InstrItinClass;
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def IIC_iUNAsi : InstrItinClass;
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def IIC_iUNAsr : InstrItinClass;
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def IIC_iCMPi : InstrItinClass;
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def IIC_iCMPr : InstrItinClass;
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def IIC_iCMPsi : InstrItinClass;
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def IIC_iCMPsr : InstrItinClass;
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def IIC_iMOVi : InstrItinClass;
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def IIC_iMOVr : InstrItinClass;
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def IIC_iMOVsi : InstrItinClass;
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def IIC_iMOVsr : InstrItinClass;
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def IIC_iCMOVi : InstrItinClass;
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def IIC_iCMOVr : InstrItinClass;
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def IIC_iCMOVsi : InstrItinClass;
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def IIC_iCMOVsr : InstrItinClass;
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def IIC_iMUL16 : InstrItinClass;
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def IIC_iMAC16 : InstrItinClass;
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def IIC_iMUL32 : InstrItinClass;
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def IIC_iMAC32 : InstrItinClass;
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def IIC_iMUL64 : InstrItinClass;
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def IIC_iMAC64 : InstrItinClass;
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def IIC_iLoadi : InstrItinClass;
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def IIC_iLoadr : InstrItinClass;
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def IIC_iLoadsi : InstrItinClass;
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def IIC_iLoadiu : InstrItinClass;
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def IIC_iLoadru : InstrItinClass;
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def IIC_iLoadsiu : InstrItinClass;
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def IIC_iLoadm : InstrItinClass;
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def IIC_iStorei : InstrItinClass;
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def IIC_iStorer : InstrItinClass;
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def IIC_iStoresi : InstrItinClass;
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def IIC_iStoreiu : InstrItinClass;
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def IIC_iStoreru : InstrItinClass;
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def IIC_iStoresiu : InstrItinClass;
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def IIC_iStorem : InstrItinClass;
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2009-09-23 21:38:08 +00:00
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def IIC_Br : InstrItinClass;
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2009-09-21 20:52:17 +00:00
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def IIC_fpSTAT : InstrItinClass;
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def IIC_fpMOVIS : InstrItinClass;
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def IIC_fpMOVID : InstrItinClass;
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def IIC_fpMOVSI : InstrItinClass;
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def IIC_fpMOVDI : InstrItinClass;
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def IIC_fpUNA32 : InstrItinClass;
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def IIC_fpUNA64 : InstrItinClass;
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def IIC_fpCMP32 : InstrItinClass;
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def IIC_fpCMP64 : InstrItinClass;
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def IIC_fpCVTSD : InstrItinClass;
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def IIC_fpCVTDS : InstrItinClass;
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def IIC_fpCVTIS : InstrItinClass;
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def IIC_fpCVTID : InstrItinClass;
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def IIC_fpCVTSI : InstrItinClass;
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def IIC_fpCVTDI : InstrItinClass;
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def IIC_fpALU32 : InstrItinClass;
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def IIC_fpALU64 : InstrItinClass;
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def IIC_fpMUL32 : InstrItinClass;
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def IIC_fpMUL64 : InstrItinClass;
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def IIC_fpMAC32 : InstrItinClass;
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def IIC_fpMAC64 : InstrItinClass;
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def IIC_fpDIV32 : InstrItinClass;
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def IIC_fpDIV64 : InstrItinClass;
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def IIC_fpSQRT32 : InstrItinClass;
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def IIC_fpSQRT64 : InstrItinClass;
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def IIC_fpLoad32 : InstrItinClass;
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def IIC_fpLoad64 : InstrItinClass;
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def IIC_fpLoadm : InstrItinClass;
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def IIC_fpStore32 : InstrItinClass;
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def IIC_fpStore64 : InstrItinClass;
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def IIC_fpStorem : InstrItinClass;
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2009-09-23 21:38:08 +00:00
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def IIC_VLD1 : InstrItinClass;
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def IIC_VLD2 : InstrItinClass;
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def IIC_VLD3 : InstrItinClass;
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def IIC_VLD4 : InstrItinClass;
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def IIC_VST : InstrItinClass;
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def IIC_VUNAD : InstrItinClass;
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def IIC_VUNAQ : InstrItinClass;
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def IIC_VBIND : InstrItinClass;
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def IIC_VBINQ : InstrItinClass;
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def IIC_VMOVD : InstrItinClass;
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def IIC_VMOVQ : InstrItinClass;
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def IIC_VPERMD : InstrItinClass;
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def IIC_VPERMQ : InstrItinClass;
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def IIC_VPERMQ3 : InstrItinClass;
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def IIC_VCNTiD : InstrItinClass;
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def IIC_VCNTiQ : InstrItinClass;
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def IIC_VUNAiD : InstrItinClass;
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def IIC_VUNAiQ : InstrItinClass;
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def IIC_VQUNAiD : InstrItinClass;
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def IIC_VQUNAiQ : InstrItinClass;
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def IIC_VBINiD : InstrItinClass;
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def IIC_VBINiQ : InstrItinClass;
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def IIC_VSUBiD : InstrItinClass;
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def IIC_VSUBiQ : InstrItinClass;
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def IIC_VBINi4D : InstrItinClass;
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def IIC_VBINi4Q : InstrItinClass;
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def IIC_VMULi16D : InstrItinClass;
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def IIC_VMULi32D : InstrItinClass;
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def IIC_VMULi16Q : InstrItinClass;
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def IIC_VMULi32Q : InstrItinClass;
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2009-06-19 01:51:50 +00:00
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//===----------------------------------------------------------------------===//
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// Processor instruction itineraries.
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2009-08-10 15:56:13 +00:00
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def GenericItineraries : ProcessorItineraries<[
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2009-08-19 18:00:44 +00:00
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InstrItinData<IIC_iALUx , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iALUi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iALUr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iALUsi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iALUsr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iUNAr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iUNAsi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iUNAsr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iCMPi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iCMPr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iCMPsi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iCMPsr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMOVi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMOVr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMOVsi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMOVsr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iCMOVi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iCMOVr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iCMOVsi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iCMOVsr , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMUL16 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMAC16 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMUL32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMAC32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMUL64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iMAC64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iLoadi , [InstrStage<1, [FU_Pipe0]>,
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2009-08-15 07:59:10 +00:00
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InstrStage<1, [FU_LdSt0]>]>,
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2009-08-19 18:00:44 +00:00
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InstrItinData<IIC_iLoadr , [InstrStage<1, [FU_Pipe0]>,
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InstrStage<1, [FU_LdSt0]>]>,
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InstrItinData<IIC_iLoadsi , [InstrStage<1, [FU_Pipe0]>,
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InstrStage<1, [FU_LdSt0]>]>,
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InstrItinData<IIC_iLoadiu , [InstrStage<1, [FU_Pipe0]>,
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InstrStage<1, [FU_LdSt0]>]>,
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InstrItinData<IIC_iLoadru , [InstrStage<1, [FU_Pipe0]>,
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InstrStage<1, [FU_LdSt0]>]>,
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InstrItinData<IIC_iLoadsiu, [InstrStage<1, [FU_Pipe0]>,
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InstrStage<1, [FU_LdSt0]>]>,
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InstrItinData<IIC_iLoadm , [InstrStage<2, [FU_Pipe0]>,
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InstrStage<2, [FU_LdSt0]>]>,
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InstrItinData<IIC_iStorei , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iStorer , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iStoresi , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iStoreiu , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iStoreru , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iStoresiu, [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_iStorem , [InstrStage<2, [FU_Pipe0]>]>,
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2009-09-21 20:52:17 +00:00
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InstrItinData<IIC_Br , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpSTAT , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpMOVSI , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpMOVDI , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpMOVIS , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpMOVID , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpUNA32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpUNA64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpCMP32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpCMP64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpCVTSD , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpCVTDS , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpCVTIS , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpCVTID , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpCVTSI , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpCVTDI , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpALU32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpALU64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpMUL32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpMUL64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpMAC32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpMAC64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpDIV32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpDIV64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpSQRT32 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpSQRT64 , [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpLoad32 , [InstrStage<1, [FU_Pipe0]>,
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InstrStage<1, [FU_LdSt0]>]>,
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InstrItinData<IIC_fpLoad64 , [InstrStage<1, [FU_Pipe0]>,
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InstrStage<1, [FU_LdSt0]>]>,
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InstrItinData<IIC_fpLoadm , [InstrStage<1, [FU_Pipe0]>,
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InstrStage<1, [FU_LdSt0]>]>,
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InstrItinData<IIC_fpStore32, [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpStore64, [InstrStage<1, [FU_Pipe0]>]>,
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InstrItinData<IIC_fpStorem , [InstrStage<1, [FU_Pipe0]>]>
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2009-08-10 15:56:13 +00:00
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]>;
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2009-06-19 01:51:50 +00:00
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include "ARMScheduleV6.td"
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2009-07-21 18:54:14 +00:00
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include "ARMScheduleV7.td"
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