2005-07-01 22:44:09 +00:00
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//===-- X86IntelAsmPrinter.h - Convert X86 LLVM code to Intel assembly ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-07-01 22:44:09 +00:00
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//
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//===----------------------------------------------------------------------===//
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//
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// Intel assembly code printer class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86INTELASMPRINTER_H
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#define X86INTELASMPRINTER_H
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#include "X86AsmPrinter.h"
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#include "llvm/CodeGen/ValueTypes.h"
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2008-02-10 18:45:23 +00:00
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#include "llvm/Target/TargetRegisterInfo.h"
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2005-07-01 22:44:09 +00:00
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namespace llvm {
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2007-10-30 13:14:37 +00:00
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struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public X86SharedAsmPrinter {
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2006-09-07 22:06:40 +00:00
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X86IntelAsmPrinter(std::ostream &O, X86TargetMachine &TM,
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const TargetAsmInfo *T)
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2006-09-06 18:34:40 +00:00
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: X86SharedAsmPrinter(O, TM, T) {
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}
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2005-07-01 22:44:09 +00:00
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virtual const char *getPassName() const {
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return "X86 Intel-Style Assembly Printer";
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}
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/// printInstruction - This method is automatically generated by tablegen
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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// This method is used by the tablegen'erated instruction printer.
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2006-02-06 23:41:19 +00:00
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void printOperand(const MachineInstr *MI, unsigned OpNo,
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const char *Modifier = 0) {
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2005-07-01 22:44:09 +00:00
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const MachineOperand &MO = MI->getOperand(OpNo);
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2006-05-04 18:05:43 +00:00
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if (MO.isRegister()) {
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2008-02-10 18:45:23 +00:00
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assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Not physreg??");
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2008-02-26 21:11:01 +00:00
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O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
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2005-07-01 22:44:09 +00:00
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} else {
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2006-02-06 23:41:19 +00:00
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printOp(MO, Modifier);
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2005-07-01 22:44:09 +00:00
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}
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}
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2005-11-30 18:54:35 +00:00
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void printi8mem(const MachineInstr *MI, unsigned OpNo) {
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O << "BYTE PTR ";
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printMemReference(MI, OpNo);
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}
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void printi16mem(const MachineInstr *MI, unsigned OpNo) {
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O << "WORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printi32mem(const MachineInstr *MI, unsigned OpNo) {
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2005-11-30 18:57:39 +00:00
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O << "DWORD PTR ";
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2005-11-30 18:54:35 +00:00
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printMemReference(MI, OpNo);
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}
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void printi64mem(const MachineInstr *MI, unsigned OpNo) {
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2005-11-30 18:57:39 +00:00
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O << "QWORD PTR ";
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2005-11-30 18:54:35 +00:00
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printMemReference(MI, OpNo);
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}
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2006-02-22 02:26:30 +00:00
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void printi128mem(const MachineInstr *MI, unsigned OpNo) {
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O << "XMMWORD PTR ";
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printMemReference(MI, OpNo);
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}
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2005-11-30 18:54:35 +00:00
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void printf32mem(const MachineInstr *MI, unsigned OpNo) {
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O << "DWORD PTR ";
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printMemReference(MI, OpNo);
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}
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void printf64mem(const MachineInstr *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printMemReference(MI, OpNo);
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}
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2007-08-05 18:49:15 +00:00
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void printf80mem(const MachineInstr *MI, unsigned OpNo) {
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O << "XWORD PTR ";
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printMemReference(MI, OpNo);
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}
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2006-01-31 22:28:30 +00:00
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void printf128mem(const MachineInstr *MI, unsigned OpNo) {
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O << "XMMWORD PTR ";
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2005-07-01 22:44:09 +00:00
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printMemReference(MI, OpNo);
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}
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2006-09-08 06:48:29 +00:00
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void printlea64_32mem(const MachineInstr *MI, unsigned OpNo) {
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O << "QWORD PTR ";
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printMemReference(MI, OpNo, "subreg64");
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}
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2005-07-01 22:44:09 +00:00
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2006-04-28 23:19:39 +00:00
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bool printAsmMRegister(const MachineOperand &MO, const char Mode);
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2006-04-28 21:19:05 +00:00
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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2006-05-02 01:16:28 +00:00
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void printMachineInstruction(const MachineInstr *MI);
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2006-02-06 23:41:19 +00:00
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void printOp(const MachineOperand &MO, const char *Modifier = 0);
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2005-11-30 18:54:35 +00:00
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void printSSECC(const MachineInstr *MI, unsigned Op);
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2006-09-08 06:48:29 +00:00
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void printMemReference(const MachineInstr *MI, unsigned Op,
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const char *Modifier=NULL);
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Much improved pic jumptable codegen:
Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 01:32:10 +00:00
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void printPICJumpTableSetLabel(unsigned uid,
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const MachineBasicBlock *MBB) const;
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void printPICJumpTableSetLabel(unsigned uid, unsigned uid2,
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const MachineBasicBlock *MBB) const {
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AsmPrinter::printPICJumpTableSetLabel(uid, uid2, MBB);
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}
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2006-02-18 00:15:05 +00:00
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void printPICLabel(const MachineInstr *MI, unsigned Op);
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2005-07-01 22:44:09 +00:00
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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2006-05-02 03:11:50 +00:00
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bool doFinalization(Module &M);
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2006-10-05 02:43:52 +00:00
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/// getSectionForFunction - Return the section that we should emit the
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/// specified function body into.
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virtual std::string getSectionForFunction(const Function &F) const;
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2006-05-02 01:16:28 +00:00
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virtual void EmitString(const ConstantArray *CVA) const;
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2005-07-01 22:44:09 +00:00
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};
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} // end namespace llvm
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#endif
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