2002-10-28 21:31:48 +00:00
|
|
|
//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
|
2005-04-21 20:39:54 +00:00
|
|
|
//
|
2003-10-20 20:19:47 +00:00
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
2007-12-29 19:59:42 +00:00
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
2005-04-21 20:39:54 +00:00
|
|
|
//
|
2003-10-20 20:19:47 +00:00
|
|
|
//===----------------------------------------------------------------------===//
|
2002-10-28 21:31:48 +00:00
|
|
|
//
|
|
|
|
// This file exposes a function named BuildMI, which is useful for dramatically
|
2006-05-04 17:02:51 +00:00
|
|
|
// simplifying how MachineInstr's are created. It allows use of code like this:
|
2002-10-28 21:31:48 +00:00
|
|
|
//
|
2002-10-28 21:43:42 +00:00
|
|
|
// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
|
2002-10-28 21:31:48 +00:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
|
|
|
#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
|
|
|
|
#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
|
|
|
|
|
2006-11-13 23:36:35 +00:00
|
|
|
#include "llvm/CodeGen/MachineFunction.h"
|
2010-10-12 18:00:49 +00:00
|
|
|
#include "llvm/Support/ErrorHandling.h"
|
2002-10-28 21:31:48 +00:00
|
|
|
|
2003-11-11 22:41:34 +00:00
|
|
|
namespace llvm {
|
|
|
|
|
2011-06-28 19:10:37 +00:00
|
|
|
class MCInstrDesc;
|
2010-01-13 00:00:24 +00:00
|
|
|
class MDNode;
|
2006-11-27 23:37:22 +00:00
|
|
|
|
2009-05-13 21:33:08 +00:00
|
|
|
namespace RegState {
|
|
|
|
enum {
|
|
|
|
Define = 0x2,
|
|
|
|
Implicit = 0x4,
|
|
|
|
Kill = 0x8,
|
|
|
|
Dead = 0x10,
|
2009-06-30 08:49:04 +00:00
|
|
|
Undef = 0x20,
|
|
|
|
EarlyClobber = 0x40,
|
2010-02-06 02:28:32 +00:00
|
|
|
Debug = 0x80,
|
2012-03-04 18:40:30 +00:00
|
|
|
DefineNoRead = Define | Undef,
|
2009-05-13 21:33:08 +00:00
|
|
|
ImplicitDefine = Implicit | Define,
|
|
|
|
ImplicitKill = Implicit | Kill
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
2003-01-13 00:18:44 +00:00
|
|
|
class MachineInstrBuilder {
|
2002-10-28 21:31:48 +00:00
|
|
|
MachineInstr *MI;
|
2003-01-13 00:18:44 +00:00
|
|
|
public:
|
2009-07-09 06:44:01 +00:00
|
|
|
MachineInstrBuilder() : MI(0) {}
|
2007-03-23 18:44:11 +00:00
|
|
|
explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
|
2002-10-28 21:31:48 +00:00
|
|
|
|
|
|
|
/// Allow automatic conversion to the machine instruction we are working on.
|
|
|
|
///
|
|
|
|
operator MachineInstr*() const { return MI; }
|
2011-04-29 05:24:07 +00:00
|
|
|
MachineInstr *operator->() const { return MI; }
|
2004-04-01 04:03:10 +00:00
|
|
|
operator MachineBasicBlock::iterator() const { return MI; }
|
2002-10-28 21:31:48 +00:00
|
|
|
|
2002-10-28 21:43:42 +00:00
|
|
|
/// addReg - Add a new virtual register operand...
|
2002-10-28 21:31:48 +00:00
|
|
|
///
|
2006-11-13 23:36:35 +00:00
|
|
|
const
|
2009-05-13 21:33:08 +00:00
|
|
|
MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
|
|
|
|
unsigned SubReg = 0) const {
|
|
|
|
assert((flags & 0x1) == 0 &&
|
|
|
|
"Passing in 'true' to addReg is forbidden! Use enums instead.");
|
|
|
|
MI->addOperand(MachineOperand::CreateReg(RegNo,
|
|
|
|
flags & RegState::Define,
|
|
|
|
flags & RegState::Implicit,
|
|
|
|
flags & RegState::Kill,
|
|
|
|
flags & RegState::Dead,
|
2009-06-30 08:49:04 +00:00
|
|
|
flags & RegState::Undef,
|
|
|
|
flags & RegState::EarlyClobber,
|
2010-02-06 02:28:32 +00:00
|
|
|
SubReg,
|
|
|
|
flags & RegState::Debug));
|
2002-10-28 21:31:48 +00:00
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
2004-02-29 05:06:49 +00:00
|
|
|
/// addImm - Add a new immediate operand.
|
|
|
|
///
|
2006-05-04 18:05:43 +00:00
|
|
|
const MachineInstrBuilder &addImm(int64_t Val) const {
|
2007-12-30 00:35:18 +00:00
|
|
|
MI->addOperand(MachineOperand::CreateImm(Val));
|
2004-02-29 05:06:49 +00:00
|
|
|
return *this;
|
|
|
|
}
|
2002-10-28 21:31:48 +00:00
|
|
|
|
2011-06-24 20:46:11 +00:00
|
|
|
const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
|
|
|
|
MI->addOperand(MachineOperand::CreateCImm(Val));
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
2008-09-12 18:08:03 +00:00
|
|
|
const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
|
2008-08-26 23:19:23 +00:00
|
|
|
MI->addOperand(MachineOperand::CreateFPImm(Val));
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
2009-06-25 01:16:22 +00:00
|
|
|
const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
|
|
|
|
unsigned char TargetFlags = 0) const {
|
|
|
|
MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
|
2002-12-15 08:01:02 +00:00
|
|
|
return *this;
|
|
|
|
}
|
2002-12-25 05:01:18 +00:00
|
|
|
|
2011-05-17 18:29:21 +00:00
|
|
|
const MachineInstrBuilder &addFrameIndex(int Idx) const {
|
2007-12-30 00:45:46 +00:00
|
|
|
MI->addOperand(MachineOperand::CreateFI(Idx));
|
2002-12-25 05:01:18 +00:00
|
|
|
return *this;
|
|
|
|
}
|
2003-01-13 00:18:44 +00:00
|
|
|
|
2006-02-25 09:54:52 +00:00
|
|
|
const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
|
2009-06-25 01:16:22 +00:00
|
|
|
int Offset = 0,
|
|
|
|
unsigned char TargetFlags = 0) const {
|
|
|
|
MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
|
2003-01-13 00:18:44 +00:00
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
2009-06-25 01:16:22 +00:00
|
|
|
const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
|
|
|
|
unsigned char TargetFlags = 0) const {
|
|
|
|
MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
|
2006-04-24 06:42:15 +00:00
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
2010-04-15 01:51:59 +00:00
|
|
|
const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
|
2009-06-25 01:16:22 +00:00
|
|
|
int64_t Offset = 0,
|
|
|
|
unsigned char TargetFlags = 0) const {
|
|
|
|
MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
|
2003-01-13 00:18:44 +00:00
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)
This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.
This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.
Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.
The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18 02:06:02 +00:00
|
|
|
const MachineInstrBuilder &addExternalSymbol(const char *FnName,
|
2009-06-25 01:16:22 +00:00
|
|
|
unsigned char TargetFlags = 0) const {
|
2009-09-01 22:06:46 +00:00
|
|
|
MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags));
|
2003-01-13 00:18:44 +00:00
|
|
|
return *this;
|
|
|
|
}
|
2008-12-03 18:11:40 +00:00
|
|
|
|
2012-01-16 19:22:00 +00:00
|
|
|
const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
|
|
|
|
MI->addOperand(MachineOperand::CreateRegMask(Mask));
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
2009-09-25 20:36:54 +00:00
|
|
|
const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
|
2008-12-03 18:11:40 +00:00
|
|
|
MI->addMemOperand(*MI->getParent()->getParent(), MMO);
|
|
|
|
return *this;
|
|
|
|
}
|
2009-02-18 05:45:50 +00:00
|
|
|
|
2010-10-12 18:00:49 +00:00
|
|
|
const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b,
|
|
|
|
MachineInstr::mmo_iterator e) const {
|
|
|
|
MI->setMemRefs(b, e);
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-02-18 05:45:50 +00:00
|
|
|
const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
|
2009-06-25 17:28:07 +00:00
|
|
|
MI->addOperand(MO);
|
2009-02-18 05:45:50 +00:00
|
|
|
return *this;
|
|
|
|
}
|
2010-01-13 00:00:24 +00:00
|
|
|
|
2010-02-26 19:39:56 +00:00
|
|
|
const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
|
2010-01-13 00:00:24 +00:00
|
|
|
MI->addOperand(MachineOperand::CreateMetadata(MD));
|
|
|
|
return *this;
|
|
|
|
}
|
2010-03-13 08:16:25 +00:00
|
|
|
|
|
|
|
const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
|
|
|
|
MI->addOperand(MachineOperand::CreateMCSymbol(Sym));
|
|
|
|
return *this;
|
|
|
|
}
|
2010-10-12 18:00:49 +00:00
|
|
|
|
2011-03-05 18:43:20 +00:00
|
|
|
const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
|
|
|
|
MI->setFlags(Flags);
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
|
|
|
const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
|
|
|
|
MI->setFlag(Flag);
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
|
2010-10-12 18:00:49 +00:00
|
|
|
// Add a displacement from an existing MachineOperand with an added offset.
|
|
|
|
const MachineInstrBuilder &addDisp(const MachineOperand &Disp,
|
|
|
|
int64_t off) const {
|
|
|
|
switch (Disp.getType()) {
|
|
|
|
default:
|
|
|
|
llvm_unreachable("Unhandled operand type in addDisp()");
|
|
|
|
case MachineOperand::MO_Immediate:
|
|
|
|
return addImm(Disp.getImm() + off);
|
|
|
|
case MachineOperand::MO_GlobalAddress:
|
|
|
|
return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off);
|
|
|
|
}
|
|
|
|
}
|
2002-10-28 21:31:48 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/// BuildMI - Builder interface. Specify how to create the initial instruction
|
2006-11-27 23:37:22 +00:00
|
|
|
/// itself.
|
2002-10-28 21:31:48 +00:00
|
|
|
///
|
2009-02-03 00:55:04 +00:00
|
|
|
inline MachineInstrBuilder BuildMI(MachineFunction &MF,
|
|
|
|
DebugLoc DL,
|
2011-06-28 19:10:37 +00:00
|
|
|
const MCInstrDesc &MCID) {
|
|
|
|
return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL));
|
2002-10-28 21:31:48 +00:00
|
|
|
}
|
|
|
|
|
2004-05-23 05:04:00 +00:00
|
|
|
/// BuildMI - This version of the builder sets up the first operand as a
|
2006-11-27 23:37:22 +00:00
|
|
|
/// destination virtual register.
|
2002-12-13 09:33:06 +00:00
|
|
|
///
|
2009-02-03 00:55:04 +00:00
|
|
|
inline MachineInstrBuilder BuildMI(MachineFunction &MF,
|
|
|
|
DebugLoc DL,
|
2011-06-28 19:10:37 +00:00
|
|
|
const MCInstrDesc &MCID,
|
2009-02-03 00:55:04 +00:00
|
|
|
unsigned DestReg) {
|
2011-06-28 19:10:37 +00:00
|
|
|
return MachineInstrBuilder(MF.CreateMachineInstr(MCID, DL))
|
2009-05-13 21:33:08 +00:00
|
|
|
.addReg(DestReg, RegState::Define);
|
2002-12-13 09:33:06 +00:00
|
|
|
}
|
|
|
|
|
2004-05-23 05:04:00 +00:00
|
|
|
/// BuildMI - This version of the builder inserts the newly-built
|
|
|
|
/// instruction before the given position in the given MachineBasicBlock, and
|
|
|
|
/// sets up the first operand as a destination virtual register.
|
|
|
|
///
|
2009-02-03 00:55:04 +00:00
|
|
|
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
|
|
|
MachineBasicBlock::iterator I,
|
|
|
|
DebugLoc DL,
|
2011-06-28 19:10:37 +00:00
|
|
|
const MCInstrDesc &MCID,
|
2009-02-03 00:55:04 +00:00
|
|
|
unsigned DestReg) {
|
2011-06-28 19:10:37 +00:00
|
|
|
MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
|
2004-02-29 04:55:28 +00:00
|
|
|
BB.insert(I, MI);
|
2009-05-13 21:33:08 +00:00
|
|
|
return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
|
2004-02-29 04:55:28 +00:00
|
|
|
}
|
|
|
|
|
2011-12-14 02:11:42 +00:00
|
|
|
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
|
|
|
MachineBasicBlock::instr_iterator I,
|
|
|
|
DebugLoc DL,
|
|
|
|
const MCInstrDesc &MCID,
|
|
|
|
unsigned DestReg) {
|
|
|
|
MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
|
|
|
|
BB.insert(I, MI);
|
|
|
|
return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
|
|
|
|
}
|
|
|
|
|
|
|
|
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
|
|
|
MachineInstr *I,
|
|
|
|
DebugLoc DL,
|
|
|
|
const MCInstrDesc &MCID,
|
|
|
|
unsigned DestReg) {
|
|
|
|
if (I->isInsideBundle()) {
|
|
|
|
MachineBasicBlock::instr_iterator MII = I;
|
|
|
|
return BuildMI(BB, MII, DL, MCID, DestReg);
|
|
|
|
}
|
|
|
|
|
|
|
|
MachineBasicBlock::iterator MII = I;
|
|
|
|
return BuildMI(BB, MII, DL, MCID, DestReg);
|
|
|
|
}
|
|
|
|
|
2004-05-23 05:04:00 +00:00
|
|
|
/// BuildMI - This version of the builder inserts the newly-built
|
|
|
|
/// instruction before the given position in the given MachineBasicBlock, and
|
|
|
|
/// does NOT take a destination register.
|
|
|
|
///
|
2009-02-03 00:55:04 +00:00
|
|
|
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
|
|
|
MachineBasicBlock::iterator I,
|
|
|
|
DebugLoc DL,
|
2011-06-28 19:10:37 +00:00
|
|
|
const MCInstrDesc &MCID) {
|
|
|
|
MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
|
2004-02-29 04:55:28 +00:00
|
|
|
BB.insert(I, MI);
|
|
|
|
return MachineInstrBuilder(MI);
|
|
|
|
}
|
|
|
|
|
2011-12-14 02:11:42 +00:00
|
|
|
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
|
|
|
MachineBasicBlock::instr_iterator I,
|
|
|
|
DebugLoc DL,
|
|
|
|
const MCInstrDesc &MCID) {
|
|
|
|
MachineInstr *MI = BB.getParent()->CreateMachineInstr(MCID, DL);
|
|
|
|
BB.insert(I, MI);
|
|
|
|
return MachineInstrBuilder(MI);
|
|
|
|
}
|
|
|
|
|
|
|
|
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
|
|
|
|
MachineInstr *I,
|
|
|
|
DebugLoc DL,
|
|
|
|
const MCInstrDesc &MCID) {
|
|
|
|
if (I->isInsideBundle()) {
|
|
|
|
MachineBasicBlock::instr_iterator MII = I;
|
|
|
|
return BuildMI(BB, MII, DL, MCID);
|
|
|
|
}
|
|
|
|
|
|
|
|
MachineBasicBlock::iterator MII = I;
|
|
|
|
return BuildMI(BB, MII, DL, MCID);
|
|
|
|
}
|
|
|
|
|
2004-05-23 05:04:00 +00:00
|
|
|
/// BuildMI - This version of the builder inserts the newly-built
|
|
|
|
/// instruction at the end of the given MachineBasicBlock, and does NOT take a
|
|
|
|
/// destination register.
|
2002-10-30 01:48:41 +00:00
|
|
|
///
|
2009-02-03 00:55:04 +00:00
|
|
|
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
|
|
|
|
DebugLoc DL,
|
2011-06-28 19:10:37 +00:00
|
|
|
const MCInstrDesc &MCID) {
|
|
|
|
return BuildMI(*BB, BB->end(), DL, MCID);
|
2009-02-03 00:55:04 +00:00
|
|
|
}
|
2002-10-29 23:18:23 +00:00
|
|
|
|
2004-05-23 05:04:00 +00:00
|
|
|
/// BuildMI - This version of the builder inserts the newly-built
|
|
|
|
/// instruction at the end of the given MachineBasicBlock, and sets up the first
|
2009-09-20 04:03:25 +00:00
|
|
|
/// operand as a destination virtual register.
|
2002-10-30 01:48:41 +00:00
|
|
|
///
|
2009-02-03 00:55:04 +00:00
|
|
|
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
|
|
|
|
DebugLoc DL,
|
2011-06-28 19:10:37 +00:00
|
|
|
const MCInstrDesc &MCID,
|
2009-02-03 00:55:04 +00:00
|
|
|
unsigned DestReg) {
|
2011-06-28 19:10:37 +00:00
|
|
|
return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
|
2009-02-03 00:55:04 +00:00
|
|
|
}
|
2002-10-30 01:48:41 +00:00
|
|
|
|
2009-05-13 21:33:08 +00:00
|
|
|
inline unsigned getDefRegState(bool B) {
|
|
|
|
return B ? RegState::Define : 0;
|
|
|
|
}
|
|
|
|
inline unsigned getImplRegState(bool B) {
|
|
|
|
return B ? RegState::Implicit : 0;
|
|
|
|
}
|
|
|
|
inline unsigned getKillRegState(bool B) {
|
|
|
|
return B ? RegState::Kill : 0;
|
|
|
|
}
|
|
|
|
inline unsigned getDeadRegState(bool B) {
|
|
|
|
return B ? RegState::Dead : 0;
|
|
|
|
}
|
2009-06-30 08:49:04 +00:00
|
|
|
inline unsigned getUndefRegState(bool B) {
|
|
|
|
return B ? RegState::Undef : 0;
|
|
|
|
}
|
2009-05-13 21:33:08 +00:00
|
|
|
|
2003-11-11 22:41:34 +00:00
|
|
|
} // End llvm namespace
|
|
|
|
|
2002-10-28 21:31:48 +00:00
|
|
|
#endif
|