2008-05-14 10:17:11 +00:00
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//==-llvm/CodeGen/DAGISelHeader.h - Common DAG ISel definitions -*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides definitions of the common, target-independent methods and
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// data, which is used by SelectionDAG-based instruction selectors.
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//
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// *** NOTE: This file is #included into the middle of the target
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2008-10-28 18:47:37 +00:00
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// instruction selector class. These functions are really methods.
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// This is a little awkward, but it allows this code to be shared
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// by all the targets while still being able to call into
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// target-specific code without using a virtual function call.
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//
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2008-05-14 10:17:11 +00:00
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_DAGISEL_HEADER_H
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#define LLVM_CODEGEN_DAGISEL_HEADER_H
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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/// ISelPosition - Node iterator marking the current position of
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/// instruction selection as it procedes through the topologically-sorted
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/// node list.
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SelectionDAG::allnodes_iterator ISelPosition;
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2008-05-14 10:17:11 +00:00
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2010-02-17 05:35:28 +00:00
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/// ChainNotReachable - Returns true if Chain does not reach Op.
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static bool ChainNotReachable(SDNode *Chain, SDNode *Op) {
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2008-05-14 10:17:11 +00:00
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if (Chain->getOpcode() == ISD::EntryToken)
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return true;
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2009-01-28 18:03:09 +00:00
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if (Chain->getOpcode() == ISD::TokenFactor)
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2008-05-14 10:17:11 +00:00
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return false;
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2009-01-28 18:03:09 +00:00
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if (Chain->getNumOperands() > 0) {
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2008-07-27 21:46:04 +00:00
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SDValue C0 = Chain->getOperand(0);
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2009-08-11 20:47:22 +00:00
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if (C0.getValueType() == MVT::Other)
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2010-02-17 05:35:28 +00:00
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return C0.getNode() != Op && ChainNotReachable(C0.getNode(), Op);
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2008-05-14 10:17:11 +00:00
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}
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return true;
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}
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2010-02-17 05:35:28 +00:00
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/// IsChainCompatible - Returns true if Chain is Op or Chain does not reach Op.
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/// This is used to ensure that there are no nodes trapped between Chain, which
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/// is the first chain node discovered in a pattern and Op, a later node, that
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/// will not be selected into the pattern.
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static bool IsChainCompatible(SDNode *Chain, SDNode *Op) {
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return Chain == Op || ChainNotReachable(Chain, Op);
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}
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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/// ISelUpdater - helper class to handle updates of the
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/// instruciton selection graph.
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class VISIBILITY_HIDDEN ISelUpdater : public SelectionDAG::DAGUpdateListener {
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SelectionDAG::allnodes_iterator &ISelPosition;
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public:
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explicit ISelUpdater(SelectionDAG::allnodes_iterator &isp)
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: ISelPosition(isp) {}
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2008-11-05 17:13:57 +00:00
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/// NodeDeleted - Handle nodes deleted from the graph. If the
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/// node being deleted is the current ISelPosition node, update
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/// ISelPosition.
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///
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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virtual void NodeDeleted(SDNode *N, SDNode *E) {
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if (ISelPosition == SelectionDAG::allnodes_iterator(N))
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++ISelPosition;
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2008-05-14 10:17:11 +00:00
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}
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|
Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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/// NodeUpdated - Ignore updates for now.
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virtual void NodeUpdated(SDNode *N) {}
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};
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2008-05-14 10:17:11 +00:00
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/// ReplaceUses - replace all uses of the old node F with the use
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/// of the new node T.
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2009-11-14 16:37:18 +00:00
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DISABLE_INLINE void ReplaceUses(SDValue F, SDValue T) {
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelUpdater ISU(ISelPosition);
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CurDAG->ReplaceAllUsesOfValueWith(F, T, &ISU);
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2008-05-14 10:17:11 +00:00
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}
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2008-07-17 19:10:17 +00:00
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/// ReplaceUses - replace all uses of the old nodes F with the use
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/// of the new nodes T.
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2009-11-14 16:37:18 +00:00
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DISABLE_INLINE void ReplaceUses(const SDValue *F, const SDValue *T,
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unsigned Num) {
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelUpdater ISU(ISelPosition);
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CurDAG->ReplaceAllUsesOfValuesWith(F, T, Num, &ISU);
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2008-07-17 19:10:17 +00:00
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}
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2008-05-14 10:17:11 +00:00
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/// ReplaceUses - replace all uses of the old node F with the use
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/// of the new node T.
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2009-11-14 16:37:18 +00:00
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DISABLE_INLINE void ReplaceUses(SDNode *F, SDNode *T) {
|
Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelUpdater ISU(ISelPosition);
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2009-04-15 20:06:30 +00:00
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CurDAG->ReplaceAllUsesWith(F, T, &ISU);
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2008-05-14 10:17:11 +00:00
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}
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/// SelectRoot - Top level entry to DAG instruction selector.
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/// Selects instructions starting at the root of the current DAG.
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2008-10-27 21:56:29 +00:00
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void SelectRoot(SelectionDAG &DAG) {
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2008-05-14 10:17:11 +00:00
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SelectRootInit();
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// Create a dummy node (which is not added to allnodes), that adds
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// a reference to the root node, preventing it from being deleted,
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// and tracking any changes of the root.
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HandleSDNode Dummy(CurDAG->getRoot());
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2010-02-21 06:03:07 +00:00
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ISelPosition = SelectionDAG::allnodes_iterator(CurDAG->getRoot().getNode());
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++ISelPosition;
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2008-05-14 10:17:11 +00:00
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2008-11-05 17:13:57 +00:00
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// The AllNodes list is now topological-sorted. Visit the
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// nodes by starting at the end of the list (the root of the
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// graph) and preceding back toward the beginning (the entry
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// node).
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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while (ISelPosition != CurDAG->allnodes_begin()) {
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SDNode *Node = --ISelPosition;
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2008-11-05 22:56:47 +00:00
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// Skip dead nodes. DAGCombiner is expected to eliminate all dead nodes,
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// but there are currently some corner cases that it misses. Also, this
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// makes it theoretically possible to disable the DAGCombiner.
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if (Node->use_empty())
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continue;
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2010-02-21 06:03:07 +00:00
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2010-01-05 01:24:18 +00:00
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SDNode *ResNode = Select(Node);
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2009-12-13 01:00:59 +00:00
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// If node should not be replaced, continue with the next one.
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2008-05-14 10:17:11 +00:00
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if (ResNode == Node)
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continue;
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// Replace node.
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2010-02-21 06:03:07 +00:00
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if (ResNode)
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2008-05-14 10:17:11 +00:00
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ReplaceUses(Node, ResNode);
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2010-02-21 06:03:07 +00:00
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2008-05-14 10:17:11 +00:00
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// If after the replacement this node is not used any more,
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// remove this dead node.
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if (Node->use_empty()) { // Don't delete EntryToken, etc.
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Eliminate the ISel priority queue, which used the topological order for a
priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.
The impact on most targets is that AddToISelQueue calls can be simply removed.
In the x86 target, there are two additional notable changes.
The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.
Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-05 04:14:16 +00:00
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ISelUpdater ISU(ISelPosition);
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CurDAG->RemoveDeadNode(Node, &ISU);
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2008-05-14 10:17:11 +00:00
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}
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}
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2008-08-21 16:36:34 +00:00
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CurDAG->setRoot(Dummy.getValue());
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2008-05-14 10:17:11 +00:00
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}
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2010-02-15 08:04:42 +00:00
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/// CheckInteger - Return true if the specified node is not a ConstantSDNode or
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/// if it doesn't have the specified value.
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static bool CheckInteger(SDValue V, int64_t Val) {
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ConstantSDNode *C = dyn_cast<ConstantSDNode>(V);
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return C == 0 || C->getSExtValue() != Val;
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}
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/// CheckAndImmediate - Check to see if the specified node is an and with an
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/// immediate returning true on failure.
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///
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/// FIXME: Inline this gunk into CheckAndMask.
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bool CheckAndImmediate(SDValue V, int64_t Val) {
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if (V->getOpcode() == ISD::AND)
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if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(V->getOperand(1)))
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if (CheckAndMask(V.getOperand(0), C, Val))
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return false;
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return true;
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}
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/// CheckOrImmediate - Check to see if the specified node is an or with an
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/// immediate returning true on failure.
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///
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/// FIXME: Inline this gunk into CheckOrMask.
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bool CheckOrImmediate(SDValue V, int64_t Val) {
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if (V->getOpcode() == ISD::OR)
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if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(V->getOperand(1)))
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if (CheckOrMask(V.getOperand(0), C, Val))
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return false;
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return true;
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}
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2010-02-19 07:49:56 +00:00
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void EmitInteger(int64_t Val, MVT::SimpleValueType VT,
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SmallVectorImpl<SDValue> &RecordedNodes) {
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RecordedNodes.push_back(CurDAG->getTargetConstant(Val, VT));
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}
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2010-02-16 07:21:10 +00:00
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// These functions are marked always inline so that Idx doesn't get pinned to
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// the stack.
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ALWAYS_INLINE static int8_t
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GetInt1(const unsigned char *MatcherTable, unsigned &Idx) {
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2010-02-15 08:04:42 +00:00
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return MatcherTable[Idx++];
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}
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2010-02-16 07:21:10 +00:00
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ALWAYS_INLINE static int16_t
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GetInt2(const unsigned char *MatcherTable, unsigned &Idx) {
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Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
int16_t Val = (uint8_t)GetInt1(MatcherTable, Idx);
|
2010-02-15 08:04:42 +00:00
|
|
|
Val |= int16_t(GetInt1(MatcherTable, Idx)) << 8;
|
|
|
|
return Val;
|
|
|
|
}
|
|
|
|
|
2010-02-16 07:21:10 +00:00
|
|
|
ALWAYS_INLINE static int32_t
|
|
|
|
GetInt4(const unsigned char *MatcherTable, unsigned &Idx) {
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
int32_t Val = (uint16_t)GetInt2(MatcherTable, Idx);
|
2010-02-15 08:04:42 +00:00
|
|
|
Val |= int32_t(GetInt2(MatcherTable, Idx)) << 16;
|
|
|
|
return Val;
|
|
|
|
}
|
|
|
|
|
2010-02-16 07:21:10 +00:00
|
|
|
ALWAYS_INLINE static int64_t
|
|
|
|
GetInt8(const unsigned char *MatcherTable, unsigned &Idx) {
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
int64_t Val = (uint32_t)GetInt4(MatcherTable, Idx);
|
2010-02-15 08:04:42 +00:00
|
|
|
Val |= int64_t(GetInt4(MatcherTable, Idx)) << 32;
|
|
|
|
return Val;
|
|
|
|
}
|
|
|
|
|
|
|
|
enum BuiltinOpcodes {
|
|
|
|
OPC_Push,
|
2010-02-18 22:03:03 +00:00
|
|
|
OPC_RecordNode,
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
OPC_RecordMemRef,
|
|
|
|
OPC_CaptureFlagInput,
|
2010-02-15 08:04:42 +00:00
|
|
|
OPC_MoveChild,
|
|
|
|
OPC_MoveParent,
|
|
|
|
OPC_CheckSame,
|
|
|
|
OPC_CheckPatternPredicate,
|
|
|
|
OPC_CheckPredicate,
|
|
|
|
OPC_CheckOpcode,
|
2010-02-22 22:30:37 +00:00
|
|
|
OPC_CheckMultiOpcode,
|
2010-02-15 08:04:42 +00:00
|
|
|
OPC_CheckType,
|
|
|
|
OPC_CheckInteger1, OPC_CheckInteger2, OPC_CheckInteger4, OPC_CheckInteger8,
|
|
|
|
OPC_CheckCondCode,
|
|
|
|
OPC_CheckValueType,
|
|
|
|
OPC_CheckComplexPat,
|
|
|
|
OPC_CheckAndImm1, OPC_CheckAndImm2, OPC_CheckAndImm4, OPC_CheckAndImm8,
|
2010-02-16 06:10:58 +00:00
|
|
|
OPC_CheckOrImm1, OPC_CheckOrImm2, OPC_CheckOrImm4, OPC_CheckOrImm8,
|
2010-02-17 06:23:39 +00:00
|
|
|
OPC_CheckFoldableChainNode,
|
2010-02-19 07:49:56 +00:00
|
|
|
OPC_CheckChainCompatible,
|
|
|
|
|
|
|
|
OPC_EmitInteger1, OPC_EmitInteger2, OPC_EmitInteger4, OPC_EmitInteger8,
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
OPC_EmitRegister,
|
|
|
|
OPC_EmitConvertToTarget,
|
|
|
|
OPC_EmitMergeInputChains,
|
|
|
|
OPC_EmitCopyToReg,
|
|
|
|
OPC_EmitNodeXForm,
|
2010-02-21 06:03:07 +00:00
|
|
|
OPC_EmitNode,
|
|
|
|
OPC_CompleteMatch
|
2010-02-15 08:04:42 +00:00
|
|
|
};
|
|
|
|
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
enum {
|
|
|
|
OPFL_None = 0, // Node has no chain or flag input and isn't variadic.
|
|
|
|
OPFL_Chain = 1, // Node has a chain input.
|
|
|
|
OPFL_Flag = 2, // Node has a flag input.
|
|
|
|
OPFL_MemRefs = 4, // Node gets accumulated MemRefs.
|
|
|
|
OPFL_Variadic0 = 1<<3, // Node is variadic, root has 0 fixed inputs.
|
|
|
|
OPFL_Variadic1 = 2<<3, // Node is variadic, root has 1 fixed inputs.
|
|
|
|
OPFL_Variadic2 = 3<<3, // Node is variadic, root has 2 fixed inputs.
|
|
|
|
OPFL_Variadic3 = 4<<3, // Node is variadic, root has 3 fixed inputs.
|
|
|
|
OPFL_Variadic4 = 5<<3, // Node is variadic, root has 4 fixed inputs.
|
|
|
|
OPFL_Variadic5 = 6<<3, // Node is variadic, root has 5 fixed inputs.
|
|
|
|
OPFL_Variadic6 = 7<<3, // Node is variadic, root has 6 fixed inputs.
|
|
|
|
|
|
|
|
OPFL_VariadicInfo = OPFL_Variadic6
|
|
|
|
};
|
|
|
|
|
|
|
|
/// getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the
|
|
|
|
/// number of fixed arity values that should be skipped when copying from the
|
|
|
|
/// root.
|
|
|
|
static inline int getNumFixedFromVariadicInfo(unsigned Flags) {
|
|
|
|
return ((Flags&OPFL_VariadicInfo) >> 3)-1;
|
|
|
|
}
|
|
|
|
|
2010-02-15 08:04:42 +00:00
|
|
|
struct MatchScope {
|
|
|
|
/// FailIndex - If this match fails, this is the index to continue with.
|
|
|
|
unsigned FailIndex;
|
|
|
|
|
|
|
|
/// NodeStackSize - The size of the node stack when the scope was formed.
|
|
|
|
unsigned NodeStackSize;
|
|
|
|
|
|
|
|
/// NumRecordedNodes - The number of recorded nodes when the scope was formed.
|
|
|
|
unsigned NumRecordedNodes;
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
|
|
|
|
/// NumMatchedMemRefs - The number of matched memref entries.
|
|
|
|
unsigned NumMatchedMemRefs;
|
|
|
|
|
|
|
|
/// InputChain/InputFlag - The current chain/flag
|
|
|
|
SDValue InputChain, InputFlag;
|
|
|
|
|
|
|
|
/// HasChainNodesMatched - True if the ChainNodesMatched list is non-empty.
|
|
|
|
bool HasChainNodesMatched;
|
2010-02-15 08:04:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
SDNode *SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
|
|
|
|
unsigned TableSize) {
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
// FIXME: Should these even be selected? Handle these cases in the caller?
|
2010-02-15 08:04:42 +00:00
|
|
|
switch (NodeToMatch->getOpcode()) {
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
case ISD::EntryToken: // These nodes remain the same.
|
|
|
|
case ISD::BasicBlock:
|
|
|
|
case ISD::Register:
|
|
|
|
case ISD::HANDLENODE:
|
|
|
|
case ISD::TargetConstant:
|
|
|
|
case ISD::TargetConstantFP:
|
|
|
|
case ISD::TargetConstantPool:
|
|
|
|
case ISD::TargetFrameIndex:
|
|
|
|
case ISD::TargetExternalSymbol:
|
|
|
|
case ISD::TargetBlockAddress:
|
|
|
|
case ISD::TargetJumpTable:
|
|
|
|
case ISD::TargetGlobalTLSAddress:
|
|
|
|
case ISD::TargetGlobalAddress:
|
|
|
|
case ISD::TokenFactor:
|
|
|
|
case ISD::CopyFromReg:
|
|
|
|
case ISD::CopyToReg:
|
|
|
|
return 0;
|
|
|
|
case ISD::AssertSext:
|
|
|
|
case ISD::AssertZext:
|
|
|
|
ReplaceUses(SDValue(NodeToMatch, 0), NodeToMatch->getOperand(0));
|
|
|
|
return 0;
|
|
|
|
case ISD::INLINEASM: return Select_INLINEASM(NodeToMatch);
|
|
|
|
case ISD::EH_LABEL: return Select_EH_LABEL(NodeToMatch);
|
|
|
|
case ISD::UNDEF: return Select_UNDEF(NodeToMatch);
|
|
|
|
}
|
|
|
|
|
|
|
|
assert(!NodeToMatch->isMachineOpcode() && "Node already selected!");
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
|
|
|
|
// Set up the node stack with NodeToMatch as the only node on the stack.
|
|
|
|
SmallVector<SDValue, 8> NodeStack;
|
|
|
|
SDValue N = SDValue(NodeToMatch, 0);
|
|
|
|
NodeStack.push_back(N);
|
|
|
|
|
|
|
|
// MatchScopes - Scopes used when matching, if a match failure happens, this
|
|
|
|
// indicates where to continue checking.
|
2010-02-15 08:04:42 +00:00
|
|
|
SmallVector<MatchScope, 8> MatchScopes;
|
|
|
|
|
|
|
|
// RecordedNodes - This is the set of nodes that have been recorded by the
|
|
|
|
// state machine.
|
|
|
|
SmallVector<SDValue, 8> RecordedNodes;
|
|
|
|
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
// MatchedMemRefs - This is the set of MemRef's we've seen in the input
|
|
|
|
// pattern.
|
|
|
|
SmallVector<MachineMemOperand*, 2> MatchedMemRefs;
|
|
|
|
|
|
|
|
// These are the current input chain and flag for use when generating nodes.
|
|
|
|
// Various Emit operations change these. For example, emitting a copytoreg
|
|
|
|
// uses and updates these.
|
|
|
|
SDValue InputChain, InputFlag;
|
|
|
|
|
|
|
|
// ChainNodesMatched - If a pattern matches nodes that have input/output
|
|
|
|
// chains, the OPC_EmitMergeInputChains operation is emitted which indicates
|
|
|
|
// which ones they are. The result is captured into this list so that we can
|
|
|
|
// update the chain results when the pattern is complete.
|
|
|
|
SmallVector<SDNode*, 3> ChainNodesMatched;
|
2010-02-15 08:04:42 +00:00
|
|
|
|
2010-02-22 22:15:39 +00:00
|
|
|
DEBUG(errs() << "ISEL: Starting pattern match on root node: ";
|
|
|
|
NodeToMatch->dump(CurDAG);
|
|
|
|
errs() << '\n');
|
|
|
|
|
2010-02-15 08:04:42 +00:00
|
|
|
// Interpreter starts at opcode #0.
|
|
|
|
unsigned MatcherIndex = 0;
|
|
|
|
while (1) {
|
|
|
|
assert(MatcherIndex < TableSize && "Invalid index");
|
|
|
|
switch ((BuiltinOpcodes)MatcherTable[MatcherIndex++]) {
|
|
|
|
case OPC_Push: {
|
|
|
|
unsigned NumToSkip = MatcherTable[MatcherIndex++];
|
|
|
|
MatchScope NewEntry;
|
|
|
|
NewEntry.FailIndex = MatcherIndex+NumToSkip;
|
|
|
|
NewEntry.NodeStackSize = NodeStack.size();
|
|
|
|
NewEntry.NumRecordedNodes = RecordedNodes.size();
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
NewEntry.NumMatchedMemRefs = MatchedMemRefs.size();
|
|
|
|
NewEntry.InputChain = InputChain;
|
|
|
|
NewEntry.InputFlag = InputFlag;
|
|
|
|
NewEntry.HasChainNodesMatched = !ChainNodesMatched.empty();
|
2010-02-15 08:04:42 +00:00
|
|
|
MatchScopes.push_back(NewEntry);
|
|
|
|
continue;
|
|
|
|
}
|
2010-02-18 22:03:03 +00:00
|
|
|
case OPC_RecordNode:
|
2010-02-15 08:04:42 +00:00
|
|
|
// Remember this node, it may end up being an operand in the pattern.
|
|
|
|
RecordedNodes.push_back(N);
|
|
|
|
continue;
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
case OPC_RecordMemRef:
|
|
|
|
MatchedMemRefs.push_back(cast<MemSDNode>(N)->getMemOperand());
|
|
|
|
continue;
|
|
|
|
|
|
|
|
case OPC_CaptureFlagInput:
|
|
|
|
// If the current node has an input flag, capture it in InputFlag.
|
|
|
|
if (N->getNumOperands() != 0 &&
|
|
|
|
N->getOperand(N->getNumOperands()-1).getValueType() == MVT::Flag)
|
|
|
|
InputFlag = N->getOperand(N->getNumOperands()-1);
|
|
|
|
continue;
|
2010-02-15 08:04:42 +00:00
|
|
|
|
|
|
|
case OPC_MoveChild: {
|
|
|
|
unsigned Child = MatcherTable[MatcherIndex++];
|
|
|
|
if (Child >= N.getNumOperands())
|
|
|
|
break; // Match fails if out of range child #.
|
|
|
|
N = N.getOperand(Child);
|
|
|
|
NodeStack.push_back(N);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OPC_MoveParent:
|
|
|
|
// Pop the current node off the NodeStack.
|
|
|
|
NodeStack.pop_back();
|
|
|
|
assert(!NodeStack.empty() && "Node stack imbalance!");
|
|
|
|
N = NodeStack.back();
|
|
|
|
continue;
|
|
|
|
|
|
|
|
case OPC_CheckSame: {
|
|
|
|
// Accept if it is exactly the same as a previously recorded node.
|
|
|
|
unsigned RecNo = MatcherTable[MatcherIndex++];
|
|
|
|
assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
|
|
|
|
if (N != RecordedNodes[RecNo]) break;
|
|
|
|
continue;
|
|
|
|
}
|
2010-02-16 07:21:10 +00:00
|
|
|
case OPC_CheckPatternPredicate:
|
|
|
|
if (!CheckPatternPredicate(MatcherTable[MatcherIndex++])) break;
|
2010-02-15 08:04:42 +00:00
|
|
|
continue;
|
2010-02-16 07:21:10 +00:00
|
|
|
case OPC_CheckPredicate:
|
|
|
|
if (!CheckNodePredicate(N.getNode(), MatcherTable[MatcherIndex++])) break;
|
2010-02-15 08:04:42 +00:00
|
|
|
continue;
|
2010-02-17 00:41:34 +00:00
|
|
|
case OPC_CheckComplexPat:
|
|
|
|
if (!CheckComplexPattern(NodeToMatch, N,
|
|
|
|
MatcherTable[MatcherIndex++], RecordedNodes))
|
|
|
|
break;
|
2010-02-15 08:04:42 +00:00
|
|
|
continue;
|
|
|
|
case OPC_CheckOpcode:
|
|
|
|
if (N->getOpcode() != MatcherTable[MatcherIndex++]) break;
|
|
|
|
continue;
|
2010-02-22 22:30:37 +00:00
|
|
|
|
|
|
|
case OPC_CheckMultiOpcode: {
|
|
|
|
unsigned NumOps = MatcherTable[MatcherIndex++];
|
|
|
|
bool OpcodeEquals = false;
|
|
|
|
for (unsigned i = 0; i != NumOps; ++i)
|
|
|
|
OpcodeEquals |= N->getOpcode() == MatcherTable[MatcherIndex++];
|
|
|
|
if (!OpcodeEquals) break;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2010-02-21 20:10:43 +00:00
|
|
|
case OPC_CheckType: {
|
|
|
|
MVT::SimpleValueType VT =
|
|
|
|
(MVT::SimpleValueType)MatcherTable[MatcherIndex++];
|
|
|
|
if (N.getValueType() != VT) {
|
|
|
|
// Handle the case when VT is iPTR.
|
|
|
|
if (VT != MVT::iPTR || N.getValueType() != TLI.getPointerTy())
|
|
|
|
break;
|
|
|
|
}
|
2010-02-15 08:04:42 +00:00
|
|
|
continue;
|
2010-02-21 20:10:43 +00:00
|
|
|
}
|
2010-02-15 08:04:42 +00:00
|
|
|
case OPC_CheckCondCode:
|
|
|
|
if (cast<CondCodeSDNode>(N)->get() !=
|
|
|
|
(ISD::CondCode)MatcherTable[MatcherIndex++]) break;
|
|
|
|
continue;
|
2010-02-21 20:15:25 +00:00
|
|
|
case OPC_CheckValueType: {
|
|
|
|
MVT::SimpleValueType VT =
|
|
|
|
(MVT::SimpleValueType)MatcherTable[MatcherIndex++];
|
|
|
|
if (cast<VTSDNode>(N)->getVT() != VT) {
|
|
|
|
// Handle the case when VT is iPTR.
|
|
|
|
if (VT != MVT::iPTR || cast<VTSDNode>(N)->getVT() != TLI.getPointerTy())
|
|
|
|
break;
|
|
|
|
}
|
2010-02-15 08:04:42 +00:00
|
|
|
continue;
|
2010-02-21 20:15:25 +00:00
|
|
|
}
|
2010-02-15 08:04:42 +00:00
|
|
|
case OPC_CheckInteger1:
|
|
|
|
if (CheckInteger(N, GetInt1(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckInteger2:
|
|
|
|
if (CheckInteger(N, GetInt2(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckInteger4:
|
|
|
|
if (CheckInteger(N, GetInt4(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckInteger8:
|
|
|
|
if (CheckInteger(N, GetInt8(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
|
|
|
|
case OPC_CheckAndImm1:
|
|
|
|
if (CheckAndImmediate(N, GetInt1(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckAndImm2:
|
|
|
|
if (CheckAndImmediate(N, GetInt2(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckAndImm4:
|
|
|
|
if (CheckAndImmediate(N, GetInt4(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckAndImm8:
|
|
|
|
if (CheckAndImmediate(N, GetInt8(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
|
|
|
|
case OPC_CheckOrImm1:
|
|
|
|
if (CheckOrImmediate(N, GetInt1(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckOrImm2:
|
|
|
|
if (CheckOrImmediate(N, GetInt2(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckOrImm4:
|
|
|
|
if (CheckOrImmediate(N, GetInt4(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
|
|
|
case OPC_CheckOrImm8:
|
|
|
|
if (CheckOrImmediate(N, GetInt8(MatcherTable, MatcherIndex))) break;
|
|
|
|
continue;
|
2010-02-16 06:10:58 +00:00
|
|
|
|
2010-02-16 19:15:55 +00:00
|
|
|
case OPC_CheckFoldableChainNode: {
|
2010-02-21 20:57:28 +00:00
|
|
|
assert(NodeStack.size() != 1 && "No parent node");
|
2010-02-16 19:15:55 +00:00
|
|
|
// Verify that all intermediate nodes between the root and this one have
|
|
|
|
// a single use.
|
|
|
|
bool HasMultipleUses = false;
|
|
|
|
for (unsigned i = 1, e = NodeStack.size()-1; i != e; ++i)
|
|
|
|
if (!NodeStack[i].hasOneUse()) {
|
|
|
|
HasMultipleUses = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (HasMultipleUses) break;
|
|
|
|
|
|
|
|
// Check to see that the target thinks this is profitable to fold and that
|
|
|
|
// we can fold it without inducing cycles in the graph.
|
2010-02-16 06:10:58 +00:00
|
|
|
if (!IsProfitableToFold(N, NodeStack[NodeStack.size()-2].getNode(),
|
2010-02-16 19:15:55 +00:00
|
|
|
NodeToMatch) ||
|
|
|
|
!IsLegalToFold(N, NodeStack[NodeStack.size()-2].getNode(),
|
2010-02-16 06:10:58 +00:00
|
|
|
NodeToMatch))
|
|
|
|
break;
|
2010-02-16 19:15:55 +00:00
|
|
|
|
2010-02-16 06:10:58 +00:00
|
|
|
continue;
|
2010-02-15 08:04:42 +00:00
|
|
|
}
|
2010-02-17 06:23:39 +00:00
|
|
|
case OPC_CheckChainCompatible: {
|
|
|
|
unsigned PrevNode = MatcherTable[MatcherIndex++];
|
|
|
|
assert(PrevNode < RecordedNodes.size() && "Invalid CheckChainCompatible");
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
SDValue PrevChainedNode = RecordedNodes[PrevNode];
|
|
|
|
SDValue ThisChainedNode = RecordedNodes.back();
|
|
|
|
|
|
|
|
// We have two nodes with chains, verify that their input chains are good.
|
|
|
|
assert(PrevChainedNode.getOperand(0).getValueType() == MVT::Other &&
|
|
|
|
ThisChainedNode.getOperand(0).getValueType() == MVT::Other &&
|
|
|
|
"Invalid chained nodes");
|
|
|
|
|
|
|
|
if (!IsChainCompatible(// Input chain of the previous node.
|
|
|
|
PrevChainedNode.getOperand(0).getNode(),
|
|
|
|
// Node with chain.
|
|
|
|
ThisChainedNode.getNode()))
|
2010-02-17 06:23:39 +00:00
|
|
|
break;
|
|
|
|
continue;
|
|
|
|
}
|
2010-02-19 07:49:56 +00:00
|
|
|
|
|
|
|
case OPC_EmitInteger1: {
|
|
|
|
MVT::SimpleValueType VT =
|
|
|
|
(MVT::SimpleValueType)MatcherTable[MatcherIndex++];
|
|
|
|
EmitInteger(GetInt1(MatcherTable, MatcherIndex), VT, RecordedNodes);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
case OPC_EmitInteger2: {
|
|
|
|
MVT::SimpleValueType VT =
|
|
|
|
(MVT::SimpleValueType)MatcherTable[MatcherIndex++];
|
|
|
|
EmitInteger(GetInt2(MatcherTable, MatcherIndex), VT, RecordedNodes);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
case OPC_EmitInteger4: {
|
|
|
|
MVT::SimpleValueType VT =
|
|
|
|
(MVT::SimpleValueType)MatcherTable[MatcherIndex++];
|
|
|
|
EmitInteger(GetInt4(MatcherTable, MatcherIndex), VT, RecordedNodes);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
case OPC_EmitInteger8: {
|
|
|
|
MVT::SimpleValueType VT =
|
|
|
|
(MVT::SimpleValueType)MatcherTable[MatcherIndex++];
|
|
|
|
EmitInteger(GetInt8(MatcherTable, MatcherIndex), VT, RecordedNodes);
|
|
|
|
continue;
|
|
|
|
}
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
|
|
|
|
case OPC_EmitRegister: {
|
|
|
|
MVT::SimpleValueType VT =
|
2010-02-21 06:58:27 +00:00
|
|
|
(MVT::SimpleValueType)MatcherTable[MatcherIndex++];
|
|
|
|
unsigned RegNo = MatcherTable[MatcherIndex++];
|
|
|
|
RecordedNodes.push_back(CurDAG->getRegister(RegNo, VT));
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OPC_EmitConvertToTarget: {
|
|
|
|
// Convert from IMM/FPIMM to target version.
|
|
|
|
unsigned RecNo = MatcherTable[MatcherIndex++];
|
|
|
|
assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
|
|
|
|
SDValue Imm = RecordedNodes[RecNo];
|
|
|
|
|
|
|
|
if (Imm->getOpcode() == ISD::Constant) {
|
|
|
|
int64_t Val = cast<ConstantSDNode>(Imm)->getZExtValue();
|
|
|
|
Imm = CurDAG->getTargetConstant(Val, Imm.getValueType());
|
|
|
|
} else if (Imm->getOpcode() == ISD::ConstantFP) {
|
|
|
|
const ConstantFP *Val=cast<ConstantFPSDNode>(Imm)->getConstantFPValue();
|
|
|
|
Imm = CurDAG->getTargetConstantFP(*Val, Imm.getValueType());
|
|
|
|
}
|
|
|
|
|
|
|
|
RecordedNodes.push_back(Imm);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OPC_EmitMergeInputChains: {
|
|
|
|
assert(InputChain.getNode() == 0 &&
|
|
|
|
"EmitMergeInputChains should be the first chain producing node");
|
|
|
|
// This node gets a list of nodes we matched in the input that have
|
|
|
|
// chains. We want to token factor all of the input chains to these nodes
|
|
|
|
// together. However, if any of the input chains is actually one of the
|
|
|
|
// nodes matched in this pattern, then we have an intra-match reference.
|
|
|
|
// Ignore these because the newly token factored chain should not refer to
|
|
|
|
// the old nodes.
|
|
|
|
unsigned NumChains = MatcherTable[MatcherIndex++];
|
|
|
|
assert(NumChains != 0 && "Can't TF zero chains");
|
|
|
|
|
|
|
|
// The common case here is that we have exactly one chain, which is really
|
|
|
|
// cheap to handle, just do it.
|
|
|
|
if (NumChains == 1) {
|
|
|
|
unsigned RecNo = MatcherTable[MatcherIndex++];
|
|
|
|
assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
|
2010-02-21 06:03:07 +00:00
|
|
|
ChainNodesMatched.push_back(RecordedNodes[RecNo].getNode());
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
InputChain = RecordedNodes[RecNo].getOperand(0);
|
|
|
|
assert(InputChain.getValueType() == MVT::Other && "Not a chain");
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Read all of the chained nodes.
|
|
|
|
assert(ChainNodesMatched.empty() &&
|
|
|
|
"Should only have one EmitMergeInputChains per match");
|
|
|
|
for (unsigned i = 0; i != NumChains; ++i) {
|
|
|
|
unsigned RecNo = MatcherTable[MatcherIndex++];
|
|
|
|
assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
|
|
|
|
ChainNodesMatched.push_back(RecordedNodes[RecNo].getNode());
|
|
|
|
}
|
|
|
|
|
|
|
|
// Walk all the chained nodes, adding the input chains if they are not in
|
|
|
|
// ChainedNodes (and this, not in the matched pattern). This is an N^2
|
|
|
|
// algorithm, but # chains is usually 2 here, at most 3 for MSP430.
|
|
|
|
SmallVector<SDValue, 3> InputChains;
|
|
|
|
for (unsigned i = 0, e = ChainNodesMatched.size(); i != e; ++i) {
|
|
|
|
SDValue InChain = ChainNodesMatched[i]->getOperand(0);
|
|
|
|
assert(InChain.getValueType() == MVT::Other && "Not a chain");
|
|
|
|
bool Invalid = false;
|
|
|
|
for (unsigned j = 0; j != e; ++j)
|
|
|
|
Invalid |= ChainNodesMatched[j] == InChain.getNode();
|
|
|
|
if (!Invalid)
|
|
|
|
InputChains.push_back(InChain);
|
|
|
|
}
|
|
|
|
|
|
|
|
SDValue Res;
|
|
|
|
if (InputChains.size() == 1)
|
|
|
|
InputChain = InputChains[0];
|
|
|
|
else
|
|
|
|
InputChain = CurDAG->getNode(ISD::TokenFactor,
|
|
|
|
NodeToMatch->getDebugLoc(), MVT::Other,
|
|
|
|
&InputChains[0], InputChains.size());
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OPC_EmitCopyToReg: {
|
|
|
|
unsigned RecNo = MatcherTable[MatcherIndex++];
|
|
|
|
assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
|
|
|
|
unsigned DestPhysReg = MatcherTable[MatcherIndex++];
|
|
|
|
|
|
|
|
if (InputChain.getNode() == 0)
|
|
|
|
InputChain = CurDAG->getEntryNode();
|
|
|
|
|
|
|
|
InputChain = CurDAG->getCopyToReg(InputChain, NodeToMatch->getDebugLoc(),
|
|
|
|
DestPhysReg, RecordedNodes[RecNo],
|
|
|
|
InputFlag);
|
|
|
|
|
|
|
|
InputFlag = InputChain.getValue(1);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OPC_EmitNodeXForm: {
|
|
|
|
unsigned XFormNo = MatcherTable[MatcherIndex++];
|
|
|
|
unsigned RecNo = MatcherTable[MatcherIndex++];
|
|
|
|
assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
|
|
|
|
RecordedNodes.push_back(RunSDNodeXForm(RecordedNodes[RecNo], XFormNo));
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OPC_EmitNode: {
|
|
|
|
uint16_t TargetOpc = GetInt2(MatcherTable, MatcherIndex);
|
|
|
|
unsigned EmitNodeInfo = MatcherTable[MatcherIndex++];
|
|
|
|
// Get the result VT list.
|
|
|
|
unsigned NumVTs = MatcherTable[MatcherIndex++];
|
|
|
|
assert(NumVTs != 0 && "Invalid node result");
|
|
|
|
SmallVector<EVT, 4> VTs;
|
2010-02-21 20:15:25 +00:00
|
|
|
for (unsigned i = 0; i != NumVTs; ++i) {
|
|
|
|
MVT::SimpleValueType VT =
|
|
|
|
(MVT::SimpleValueType)MatcherTable[MatcherIndex++];
|
|
|
|
if (VT == MVT::iPTR) VT = TLI.getPointerTy().SimpleTy;
|
|
|
|
VTs.push_back(VT);
|
|
|
|
}
|
2010-02-21 06:58:27 +00:00
|
|
|
|
|
|
|
// FIXME: Use faster version for the common 'one VT' case?
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
SDVTList VTList = CurDAG->getVTList(VTs.data(), VTs.size());
|
|
|
|
|
|
|
|
// Get the operand list.
|
|
|
|
unsigned NumOps = MatcherTable[MatcherIndex++];
|
|
|
|
SmallVector<SDValue, 8> Ops;
|
|
|
|
for (unsigned i = 0; i != NumOps; ++i) {
|
|
|
|
unsigned RecNo = MatcherTable[MatcherIndex++];
|
|
|
|
assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
|
|
|
|
Ops.push_back(RecordedNodes[RecNo]);
|
|
|
|
}
|
|
|
|
|
|
|
|
// If there are variadic operands to add, handle them now.
|
|
|
|
if (EmitNodeInfo & OPFL_VariadicInfo) {
|
|
|
|
// Determine the start index to copy from.
|
|
|
|
unsigned FirstOpToCopy = getNumFixedFromVariadicInfo(EmitNodeInfo);
|
|
|
|
FirstOpToCopy += (EmitNodeInfo & OPFL_Chain) ? 1 : 0;
|
|
|
|
assert(NodeToMatch->getNumOperands() >= FirstOpToCopy &&
|
|
|
|
"Invalid variadic node");
|
|
|
|
// Copy all of the variadic operands, not including a potential flag
|
|
|
|
// input.
|
|
|
|
for (unsigned i = FirstOpToCopy, e = NodeToMatch->getNumOperands();
|
|
|
|
i != e; ++i) {
|
|
|
|
SDValue V = NodeToMatch->getOperand(i);
|
|
|
|
if (V.getValueType() == MVT::Flag) break;
|
|
|
|
Ops.push_back(V);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// If this has chain/flag inputs, add them.
|
|
|
|
if (EmitNodeInfo & OPFL_Chain)
|
|
|
|
Ops.push_back(InputChain);
|
2010-02-21 07:19:06 +00:00
|
|
|
if ((EmitNodeInfo & OPFL_Flag) && InputFlag.getNode() != 0)
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
Ops.push_back(InputFlag);
|
|
|
|
|
|
|
|
// Create the node.
|
|
|
|
MachineSDNode *Res = CurDAG->getMachineNode(TargetOpc,
|
|
|
|
NodeToMatch->getDebugLoc(),
|
|
|
|
VTList,
|
|
|
|
Ops.data(), Ops.size());
|
2010-02-21 23:54:05 +00:00
|
|
|
// Add all the non-flag/non-chain results to the RecordedNodes list.
|
|
|
|
for (unsigned i = 0, e = VTs.size(); i != e; ++i) {
|
|
|
|
if (VTs[i] == MVT::Other || VTs[i] == MVT::Flag) break;
|
|
|
|
RecordedNodes.push_back(SDValue(Res, i));
|
|
|
|
}
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
|
|
|
|
// If the node had chain/flag results, update our notion of the current
|
|
|
|
// chain and flag.
|
|
|
|
if (VTs.back() == MVT::Flag) {
|
|
|
|
InputFlag = SDValue(Res, VTs.size()-1);
|
|
|
|
if (EmitNodeInfo & OPFL_Chain)
|
|
|
|
InputChain = SDValue(Res, VTs.size()-2);
|
|
|
|
} else if (EmitNodeInfo & OPFL_Chain)
|
|
|
|
InputChain = SDValue(Res, VTs.size()-1);
|
|
|
|
|
|
|
|
// If the OPFL_MemRefs flag is set on this node, slap all of the
|
|
|
|
// accumulated memrefs onto it.
|
|
|
|
//
|
|
|
|
// FIXME: This is vastly incorrect for patterns with multiple outputs
|
|
|
|
// instructions that access memory and for ComplexPatterns that match
|
|
|
|
// loads.
|
|
|
|
if (EmitNodeInfo & OPFL_MemRefs) {
|
|
|
|
MachineSDNode::mmo_iterator MemRefs =
|
|
|
|
MF->allocateMemRefsArray(MatchedMemRefs.size());
|
|
|
|
std::copy(MatchedMemRefs.begin(), MatchedMemRefs.end(), MemRefs);
|
|
|
|
Res->setMemRefs(MemRefs, MemRefs + MatchedMemRefs.size());
|
|
|
|
}
|
2010-02-22 22:15:39 +00:00
|
|
|
|
|
|
|
DEBUG(errs() << " Created node: "; Res->dump(CurDAG); errs() << "\n");
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
continue;
|
|
|
|
}
|
2010-02-21 06:03:07 +00:00
|
|
|
|
|
|
|
case OPC_CompleteMatch: {
|
|
|
|
// The match has been completed, and any new nodes (if any) have been
|
|
|
|
// created. Patch up references to the matched dag to use the newly
|
|
|
|
// created nodes.
|
|
|
|
unsigned NumResults = MatcherTable[MatcherIndex++];
|
|
|
|
|
|
|
|
for (unsigned i = 0; i != NumResults; ++i) {
|
|
|
|
unsigned ResSlot = MatcherTable[MatcherIndex++];
|
|
|
|
assert(ResSlot < RecordedNodes.size() && "Invalid CheckSame");
|
|
|
|
SDValue Res = RecordedNodes[ResSlot];
|
2010-02-21 23:54:05 +00:00
|
|
|
|
|
|
|
// FIXME2: Eliminate this horrible hack by fixing the 'Gen' program
|
|
|
|
// after (parallel) on input patterns are removed. This would also
|
|
|
|
// allow us to stop encoding #results in OPC_CompleteMatch's table
|
|
|
|
// entry.
|
2010-02-22 00:47:38 +00:00
|
|
|
if (NodeToMatch->getNumValues() <= i ||
|
2010-02-22 22:37:11 +00:00
|
|
|
NodeToMatch->getValueType(i) == MVT::Other ||
|
|
|
|
NodeToMatch->getValueType(i) == MVT::Flag)
|
2010-02-21 23:54:05 +00:00
|
|
|
break;
|
2010-02-21 19:35:07 +00:00
|
|
|
assert((NodeToMatch->getValueType(i) == Res.getValueType() ||
|
2010-02-21 20:02:15 +00:00
|
|
|
NodeToMatch->getValueType(i) == MVT::iPTR ||
|
|
|
|
Res.getValueType() == MVT::iPTR ||
|
2010-02-21 19:35:07 +00:00
|
|
|
NodeToMatch->getValueType(i).getSizeInBits() ==
|
|
|
|
Res.getValueType().getSizeInBits()) &&
|
2010-02-21 06:03:07 +00:00
|
|
|
"invalid replacement");
|
|
|
|
ReplaceUses(SDValue(NodeToMatch, i), Res);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Now that all the normal results are replaced, we replace the chain and
|
|
|
|
// flag results if present.
|
|
|
|
if (!ChainNodesMatched.empty()) {
|
|
|
|
assert(InputChain.getNode() != 0 &&
|
|
|
|
"Matched input chains but didn't produce a chain");
|
|
|
|
// Loop over all of the nodes we matched that produced a chain result.
|
|
|
|
// Replace all the chain results with the final chain we ended up with.
|
|
|
|
for (unsigned i = 0, e = ChainNodesMatched.size(); i != e; ++i) {
|
|
|
|
SDNode *ChainNode = ChainNodesMatched[i];
|
|
|
|
SDValue ChainVal = SDValue(ChainNode, ChainNode->getNumValues()-1);
|
|
|
|
if (ChainVal.getValueType() == MVT::Flag)
|
|
|
|
ChainVal = ChainVal.getValue(ChainVal->getNumValues()-2);
|
|
|
|
assert(ChainVal.getValueType() == MVT::Other && "Not a chain?");
|
|
|
|
ReplaceUses(ChainVal, InputChain);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// If the root node produces a flag, make sure to replace its flag
|
|
|
|
// result with the resultant flag.
|
|
|
|
if (NodeToMatch->getValueType(NodeToMatch->getNumValues()-1) ==
|
|
|
|
MVT::Flag)
|
|
|
|
ReplaceUses(SDValue(NodeToMatch, NodeToMatch->getNumValues()-1),
|
|
|
|
InputFlag);
|
|
|
|
|
2010-02-21 23:54:05 +00:00
|
|
|
assert(NodeToMatch->use_empty() &&
|
|
|
|
"Didn't replace all uses of the node?");
|
2010-02-22 22:15:39 +00:00
|
|
|
|
|
|
|
DEBUG(errs() << "ISEL: Match complete!\n");
|
|
|
|
|
2010-02-21 06:03:07 +00:00
|
|
|
// FIXME: We just return here, which interacts correctly with SelectRoot
|
|
|
|
// above. We should fix this to not return an SDNode* anymore.
|
|
|
|
return 0;
|
|
|
|
}
|
2010-02-16 19:15:55 +00:00
|
|
|
}
|
2010-02-15 08:04:42 +00:00
|
|
|
|
|
|
|
// If the code reached this point, then the match failed pop out to the next
|
|
|
|
// match scope.
|
|
|
|
if (MatchScopes.empty()) {
|
|
|
|
CannotYetSelect(NodeToMatch);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
const MatchScope &LastScope = MatchScopes.back();
|
|
|
|
RecordedNodes.resize(LastScope.NumRecordedNodes);
|
|
|
|
NodeStack.resize(LastScope.NodeStackSize);
|
2010-02-21 07:55:48 +00:00
|
|
|
N = NodeStack.back();
|
2010-02-22 22:15:39 +00:00
|
|
|
|
|
|
|
DEBUG(errs() << " Match failed at index " << MatcherIndex
|
|
|
|
<< " continuing at " << LastScope.FailIndex << "\n");
|
Lots of improvements to the new dagisel emitter. This gets it to
the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 03:22:59 +00:00
|
|
|
|
|
|
|
if (LastScope.NumMatchedMemRefs != MatchedMemRefs.size())
|
|
|
|
MatchedMemRefs.resize(LastScope.NumMatchedMemRefs);
|
|
|
|
MatcherIndex = LastScope.FailIndex;
|
|
|
|
|
|
|
|
InputChain = LastScope.InputChain;
|
|
|
|
InputFlag = LastScope.InputFlag;
|
|
|
|
if (!LastScope.HasChainNodesMatched)
|
|
|
|
ChainNodesMatched.clear();
|
|
|
|
|
2010-02-15 08:04:42 +00:00
|
|
|
MatchScopes.pop_back();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2008-05-14 10:17:11 +00:00
|
|
|
#endif /* LLVM_CODEGEN_DAGISEL_HEADER_H */
|