2012-02-18 12:03:15 +00:00
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//===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
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2010-11-15 00:06:54 +00:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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2011-01-10 12:39:04 +00:00
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// This file contains the X86 implementation of TargetFrameLowering class.
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2010-11-15 00:06:54 +00:00
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//
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//===----------------------------------------------------------------------===//
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2011-01-10 12:39:04 +00:00
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#include "X86FrameLowering.h"
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2010-11-15 00:06:54 +00:00
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#include "X86InstrBuilder.h"
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#include "X86InstrInfo.h"
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#include "X86MachineFunctionInfo.h"
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2011-08-30 19:39:58 +00:00
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#include "X86Subtarget.h"
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2010-11-18 23:25:52 +00:00
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#include "X86TargetMachine.h"
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2012-12-03 16:50:05 +00:00
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#include "llvm/ADT/SmallSet.h"
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2010-11-15 00:06:54 +00:00
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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2013-01-02 11:36:10 +00:00
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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2011-04-15 15:11:06 +00:00
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#include "llvm/MC/MCAsmInfo.h"
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2011-07-07 00:54:13 +00:00
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#include "llvm/MC/MCSymbol.h"
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2010-11-15 00:06:54 +00:00
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#include "llvm/Support/CommandLine.h"
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2012-12-03 16:50:05 +00:00
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#include "llvm/Target/TargetOptions.h"
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2010-11-15 00:06:54 +00:00
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using namespace llvm;
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// FIXME: completely move here.
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extern cl::opt<bool> ForceStackAlign;
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2011-01-10 12:39:04 +00:00
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bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
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2010-11-18 21:19:35 +00:00
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return !MF.getFrameInfo()->hasVarSizedObjects();
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}
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/// hasFP - Return true if the specified function should have a dedicated frame
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/// pointer register. This is true if the function has variable sized allocas
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/// or if frame pointer elimination is disabled.
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2011-01-10 12:39:04 +00:00
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bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
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2010-11-18 21:19:35 +00:00
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineModuleInfo &MMI = MF.getMMI();
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2012-05-23 23:45:10 +00:00
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const TargetRegisterInfo *RegInfo = TM.getRegisterInfo();
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2010-11-18 21:19:35 +00:00
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2011-12-02 22:16:29 +00:00
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return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
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2012-05-23 23:45:10 +00:00
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RegInfo->needsStackRealignment(MF) ||
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2010-11-18 21:19:35 +00:00
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MFI->hasVarSizedObjects() ||
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2013-02-16 01:25:28 +00:00
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MFI->isFrameAddressTaken() || MF.hasMSInlineAsm() ||
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2010-11-18 21:19:35 +00:00
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MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
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2012-06-22 03:04:27 +00:00
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MMI.callsUnwindInit() || MMI.callsEHReturn());
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2010-11-18 21:19:35 +00:00
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}
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2013-02-21 20:05:00 +00:00
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static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
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if (IsLP64) {
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2010-11-15 00:06:54 +00:00
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if (isInt<8>(Imm))
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return X86::SUB64ri8;
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return X86::SUB64ri32;
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} else {
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if (isInt<8>(Imm))
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return X86::SUB32ri8;
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return X86::SUB32ri;
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}
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}
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2013-02-06 20:43:57 +00:00
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static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
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if (IsLP64) {
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2010-11-15 00:06:54 +00:00
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if (isInt<8>(Imm))
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return X86::ADD64ri8;
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return X86::ADD64ri32;
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} else {
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if (isInt<8>(Imm))
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return X86::ADD32ri8;
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return X86::ADD32ri;
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}
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}
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2013-02-06 20:43:57 +00:00
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static unsigned getLEArOpcode(unsigned IsLP64) {
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return IsLP64 ? X86::LEA64r : X86::LEA32r;
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2012-02-07 22:50:41 +00:00
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}
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2011-01-03 22:53:22 +00:00
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/// findDeadCallerSavedReg - Return a caller-saved register that isn't live
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/// when it reaches the "return" instruction. We can then pop a stack object
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/// to this register without worry about clobbering it.
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static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MBBI,
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const TargetRegisterInfo &TRI,
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bool Is64Bit) {
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const MachineFunction *MF = MBB.getParent();
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const Function *F = MF->getFunction();
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if (!F || MF->getMMI().callsEHReturn())
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return 0;
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2012-03-04 10:43:23 +00:00
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static const uint16_t CallerSavedRegs32Bit[] = {
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2011-08-12 00:49:19 +00:00
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X86::EAX, X86::EDX, X86::ECX, 0
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2011-01-03 22:53:22 +00:00
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};
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2012-03-04 10:43:23 +00:00
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static const uint16_t CallerSavedRegs64Bit[] = {
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2011-01-03 22:53:22 +00:00
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X86::RAX, X86::RDX, X86::RCX, X86::RSI, X86::RDI,
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2011-08-12 00:49:19 +00:00
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X86::R8, X86::R9, X86::R10, X86::R11, 0
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2011-01-03 22:53:22 +00:00
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};
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unsigned Opc = MBBI->getOpcode();
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switch (Opc) {
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default: return 0;
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case X86::RET:
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case X86::RETI:
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case X86::TCRETURNdi:
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case X86::TCRETURNri:
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case X86::TCRETURNmi:
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case X86::TCRETURNdi64:
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case X86::TCRETURNri64:
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case X86::TCRETURNmi64:
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case X86::EH_RETURN:
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case X86::EH_RETURN64: {
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2012-03-04 10:43:23 +00:00
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SmallSet<uint16_t, 8> Uses;
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2011-01-03 22:53:22 +00:00
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for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MBBI->getOperand(i);
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if (!MO.isReg() || MO.isDef())
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continue;
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unsigned Reg = MO.getReg();
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if (!Reg)
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continue;
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2012-06-01 23:28:30 +00:00
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for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
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Uses.insert(*AI);
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2011-01-03 22:53:22 +00:00
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}
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2012-03-04 10:43:23 +00:00
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const uint16_t *CS = Is64Bit ? CallerSavedRegs64Bit : CallerSavedRegs32Bit;
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2011-01-03 22:53:22 +00:00
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for (; *CS; ++CS)
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if (!Uses.count(*CS))
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return *CS;
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}
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}
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return 0;
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}
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2010-11-15 00:06:54 +00:00
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/// emitSPUpdate - Emit a series of instructions to increment / decrement the
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/// stack pointer by a constant value.
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static
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void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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2011-01-03 22:53:22 +00:00
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unsigned StackPtr, int64_t NumBytes,
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2013-02-05 21:53:29 +00:00
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bool Is64Bit, bool IsLP64, bool UseLEA,
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2012-10-03 08:10:01 +00:00
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const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) {
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2010-11-15 00:06:54 +00:00
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bool isSub = NumBytes < 0;
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uint64_t Offset = isSub ? -NumBytes : NumBytes;
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2012-02-07 22:50:41 +00:00
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unsigned Opc;
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if (UseLEA)
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2013-02-06 20:43:57 +00:00
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Opc = getLEArOpcode(IsLP64);
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2012-02-07 22:50:41 +00:00
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else
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Opc = isSub
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2013-02-05 21:53:29 +00:00
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? getSUBriOpcode(IsLP64, Offset)
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: getADDriOpcode(IsLP64, Offset);
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2012-02-07 22:50:41 +00:00
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2010-11-15 00:06:54 +00:00
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uint64_t Chunk = (1LL << 31) - 1;
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2012-10-03 08:10:01 +00:00
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DebugLoc DL = MBB.findDebugLoc(MBBI);
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2010-11-15 00:06:54 +00:00
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while (Offset) {
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uint64_t ThisVal = (Offset > Chunk) ? Chunk : Offset;
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2011-01-03 22:53:22 +00:00
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if (ThisVal == (Is64Bit ? 8 : 4)) {
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// Use push / pop instead.
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unsigned Reg = isSub
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2011-01-04 19:31:24 +00:00
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? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
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2011-01-03 22:53:22 +00:00
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: findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
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if (Reg) {
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Opc = isSub
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? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
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: (Is64Bit ? X86::POP64r : X86::POP32r);
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2011-06-12 01:45:54 +00:00
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MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc))
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2011-01-03 22:53:22 +00:00
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.addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub));
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2011-06-12 01:45:54 +00:00
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if (isSub)
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MI->setFlag(MachineInstr::FrameSetup);
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2011-01-03 22:53:22 +00:00
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Offset -= ThisVal;
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continue;
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}
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}
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2012-02-07 22:50:41 +00:00
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MachineInstr *MI = NULL;
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if (UseLEA) {
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MI = addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
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StackPtr, false, isSub ? -ThisVal : ThisVal);
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} else {
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MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
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.addReg(StackPtr)
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.addImm(ThisVal);
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MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
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}
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2011-06-12 01:45:54 +00:00
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if (isSub)
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MI->setFlag(MachineInstr::FrameSetup);
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2012-02-07 22:50:41 +00:00
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2010-11-15 00:06:54 +00:00
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Offset -= ThisVal;
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}
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}
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/// mergeSPUpdatesUp - Merge two stack-manipulating instructions upper iterator.
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static
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void mergeSPUpdatesUp(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
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unsigned StackPtr, uint64_t *NumBytes = NULL) {
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if (MBBI == MBB.begin()) return;
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MachineBasicBlock::iterator PI = prior(MBBI);
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unsigned Opc = PI->getOpcode();
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if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
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2012-02-07 22:50:41 +00:00
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Opc == X86::ADD32ri || Opc == X86::ADD32ri8 ||
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Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
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2010-11-15 00:06:54 +00:00
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PI->getOperand(0).getReg() == StackPtr) {
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if (NumBytes)
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*NumBytes += PI->getOperand(2).getImm();
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MBB.erase(PI);
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} else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
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Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
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PI->getOperand(0).getReg() == StackPtr) {
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if (NumBytes)
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*NumBytes -= PI->getOperand(2).getImm();
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MBB.erase(PI);
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}
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}
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/// mergeSPUpdatesDown - Merge two stack-manipulating instructions lower iterator.
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static
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void mergeSPUpdatesDown(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MBBI,
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unsigned StackPtr, uint64_t *NumBytes = NULL) {
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2011-12-01 19:15:08 +00:00
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// FIXME: THIS ISN'T RUN!!!
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2010-11-15 00:06:54 +00:00
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return;
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if (MBBI == MBB.end()) return;
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MachineBasicBlock::iterator NI = llvm::next(MBBI);
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if (NI == MBB.end()) return;
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unsigned Opc = NI->getOpcode();
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if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
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Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
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NI->getOperand(0).getReg() == StackPtr) {
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if (NumBytes)
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*NumBytes -= NI->getOperand(2).getImm();
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MBB.erase(NI);
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MBBI = NI;
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} else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
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Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
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NI->getOperand(0).getReg() == StackPtr) {
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if (NumBytes)
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*NumBytes += NI->getOperand(2).getImm();
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MBB.erase(NI);
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MBBI = NI;
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}
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}
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/// mergeSPUpdates - Checks the instruction before/after the passed
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2012-02-07 22:50:41 +00:00
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/// instruction. If it is an ADD/SUB/LEA instruction it is deleted argument and the
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/// stack adjustment is returned as a positive value for ADD/LEA and a negative for
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2010-11-15 00:06:54 +00:00
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/// SUB.
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static int mergeSPUpdates(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MBBI,
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unsigned StackPtr,
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bool doMergeWithPrevious) {
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if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
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(!doMergeWithPrevious && MBBI == MBB.end()))
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return 0;
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MachineBasicBlock::iterator PI = doMergeWithPrevious ? prior(MBBI) : MBBI;
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MachineBasicBlock::iterator NI = doMergeWithPrevious ? 0 : llvm::next(MBBI);
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unsigned Opc = PI->getOpcode();
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int Offset = 0;
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if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
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2012-02-07 22:50:41 +00:00
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Opc == X86::ADD32ri || Opc == X86::ADD32ri8 ||
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Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
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2010-11-15 00:06:54 +00:00
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PI->getOperand(0).getReg() == StackPtr){
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Offset += PI->getOperand(2).getImm();
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MBB.erase(PI);
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if (!doMergeWithPrevious) MBBI = NI;
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} else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
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Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
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PI->getOperand(0).getReg() == StackPtr) {
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Offset -= PI->getOperand(2).getImm();
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MBB.erase(PI);
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if (!doMergeWithPrevious) MBBI = NI;
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}
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return Offset;
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}
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static bool isEAXLiveIn(MachineFunction &MF) {
|
|
|
|
for (MachineRegisterInfo::livein_iterator II = MF.getRegInfo().livein_begin(),
|
|
|
|
EE = MF.getRegInfo().livein_end(); II != EE; ++II) {
|
|
|
|
unsigned Reg = II->first;
|
|
|
|
|
|
|
|
if (Reg == X86::EAX || Reg == X86::AX ||
|
|
|
|
Reg == X86::AH || Reg == X86::AL)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2011-01-10 12:39:04 +00:00
|
|
|
void X86FrameLowering::emitCalleeSavedFrameMoves(MachineFunction &MF,
|
2011-07-25 18:00:28 +00:00
|
|
|
MCSymbol *Label,
|
|
|
|
unsigned FramePtr) const {
|
2010-11-15 00:06:54 +00:00
|
|
|
MachineFrameInfo *MFI = MF.getFrameInfo();
|
|
|
|
MachineModuleInfo &MMI = MF.getMMI();
|
2013-05-16 21:02:15 +00:00
|
|
|
const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// Add callee saved registers to move list.
|
|
|
|
const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
|
|
|
|
if (CSI.empty()) return;
|
|
|
|
|
2012-10-25 06:29:14 +00:00
|
|
|
const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
|
2010-11-18 21:19:35 +00:00
|
|
|
bool HasFP = hasFP(MF);
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// Calculate amount of bytes used for return address storing.
|
2012-10-25 06:29:14 +00:00
|
|
|
int stackGrowth = -RegInfo->getSlotSize();
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// FIXME: This is dirty hack. The code itself is pretty mess right now.
|
|
|
|
// It should be rewritten from scratch and generalized sometimes.
|
|
|
|
|
2011-04-15 05:18:47 +00:00
|
|
|
// Determine maximum offset (minimum due to stack growth).
|
2010-11-15 00:06:54 +00:00
|
|
|
int64_t MaxOffset = 0;
|
|
|
|
for (std::vector<CalleeSavedInfo>::const_iterator
|
|
|
|
I = CSI.begin(), E = CSI.end(); I != E; ++I)
|
|
|
|
MaxOffset = std::min(MaxOffset,
|
|
|
|
MFI->getObjectOffset(I->getFrameIdx()));
|
|
|
|
|
|
|
|
// Calculate offsets.
|
|
|
|
int64_t saveAreaOffset = (HasFP ? 3 : 2) * stackGrowth;
|
|
|
|
for (std::vector<CalleeSavedInfo>::const_iterator
|
|
|
|
I = CSI.begin(), E = CSI.end(); I != E; ++I) {
|
|
|
|
int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
|
|
|
|
unsigned Reg = I->getReg();
|
|
|
|
Offset = MaxOffset - Offset + saveAreaOffset;
|
|
|
|
|
|
|
|
// Don't output a new machine move if we're re-saving the frame
|
|
|
|
// pointer. This happens when the PrologEpilogInserter has inserted an extra
|
|
|
|
// "PUSH" of the frame pointer -- the "emitPrologue" method automatically
|
|
|
|
// generates one when frame pointers are used. If we generate a "machine
|
|
|
|
// move" for this extra "PUSH", the linker will lose track of the fact that
|
|
|
|
// the frame pointer should have the value of the first "PUSH" when it's
|
|
|
|
// trying to unwind.
|
2011-02-05 15:10:54 +00:00
|
|
|
//
|
2010-11-15 00:06:54 +00:00
|
|
|
// FIXME: This looks inelegant. It's possibly correct, but it's covering up
|
|
|
|
// another bug. I.e., one where we generate a prolog like this:
|
|
|
|
//
|
|
|
|
// pushl %ebp
|
|
|
|
// movl %esp, %ebp
|
|
|
|
// pushl %ebp
|
|
|
|
// pushl %esi
|
|
|
|
// ...
|
|
|
|
//
|
|
|
|
// The immediate re-push of EBP is unnecessary. At the least, it's an
|
|
|
|
// optimization bug. EBP can be used as a scratch register in certain
|
|
|
|
// cases, but probably not when we have a frame pointer.
|
|
|
|
if (HasFP && FramePtr == Reg)
|
|
|
|
continue;
|
|
|
|
|
2013-05-16 21:02:15 +00:00
|
|
|
unsigned DwarfReg = MRI.getDwarfRegNum(Reg, true);
|
|
|
|
MMI.addFrameInst(MCCFIInstruction::createOffset(Label, DwarfReg, Offset));
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-07-25 18:00:28 +00:00
|
|
|
/// getCompactUnwindRegNum - Get the compact unwind number for a given
|
|
|
|
/// register. The number corresponds to the enum lists in
|
|
|
|
/// compact_unwind_encoding.h.
|
2013-05-09 18:21:45 +00:00
|
|
|
static int getCompactUnwindRegNum(unsigned Reg, bool is64Bit) {
|
|
|
|
static const uint16_t CU32BitRegs[] = {
|
|
|
|
X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
|
|
|
|
};
|
|
|
|
static const uint16_t CU64BitRegs[] = {
|
|
|
|
X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0
|
|
|
|
};
|
|
|
|
const uint16_t *CURegs = is64Bit ? CU64BitRegs : CU32BitRegs;
|
2011-12-14 23:53:24 +00:00
|
|
|
for (int Idx = 1; *CURegs; ++CURegs, ++Idx)
|
2011-07-25 18:00:28 +00:00
|
|
|
if (*CURegs == Reg)
|
|
|
|
return Idx;
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2011-12-06 21:23:42 +00:00
|
|
|
// Number of registers that can be saved in a compact unwind encoding.
|
|
|
|
#define CU_NUM_SAVED_REGS 6
|
|
|
|
|
2011-07-25 18:00:28 +00:00
|
|
|
/// encodeCompactUnwindRegistersWithoutFrame - Create the permutation encoding
|
|
|
|
/// used with frameless stacks. It is passed the number of registers to be saved
|
|
|
|
/// and an array of the registers saved.
|
2011-12-06 21:23:42 +00:00
|
|
|
static uint32_t
|
|
|
|
encodeCompactUnwindRegistersWithoutFrame(unsigned SavedRegs[CU_NUM_SAVED_REGS],
|
|
|
|
unsigned RegCount, bool Is64Bit) {
|
2011-07-25 18:00:28 +00:00
|
|
|
// The saved registers are numbered from 1 to 6. In order to encode the order
|
|
|
|
// in which they were saved, we re-number them according to their place in the
|
|
|
|
// register order. The re-numbering is relative to the last re-numbered
|
|
|
|
// register. E.g., if we have registers {6, 2, 4, 5} saved in that order:
|
|
|
|
//
|
|
|
|
// Orig Re-Num
|
|
|
|
// ---- ------
|
|
|
|
// 6 6
|
|
|
|
// 2 2
|
|
|
|
// 4 3
|
|
|
|
// 5 3
|
|
|
|
//
|
2011-12-14 23:53:24 +00:00
|
|
|
for (unsigned i = 0; i != CU_NUM_SAVED_REGS; ++i) {
|
2013-05-09 18:21:45 +00:00
|
|
|
int CUReg = getCompactUnwindRegNum(SavedRegs[i], Is64Bit);
|
2011-07-25 18:00:28 +00:00
|
|
|
if (CUReg == -1) return ~0U;
|
|
|
|
SavedRegs[i] = CUReg;
|
2011-12-06 01:26:14 +00:00
|
|
|
}
|
2011-07-25 18:00:28 +00:00
|
|
|
|
2011-12-14 23:53:24 +00:00
|
|
|
// Reverse the list.
|
|
|
|
std::swap(SavedRegs[0], SavedRegs[5]);
|
|
|
|
std::swap(SavedRegs[1], SavedRegs[4]);
|
|
|
|
std::swap(SavedRegs[2], SavedRegs[3]);
|
|
|
|
|
2011-12-06 21:23:42 +00:00
|
|
|
uint32_t RenumRegs[CU_NUM_SAVED_REGS];
|
|
|
|
for (unsigned i = CU_NUM_SAVED_REGS - RegCount; i < CU_NUM_SAVED_REGS; ++i) {
|
2011-07-25 18:00:28 +00:00
|
|
|
unsigned Countless = 0;
|
2011-12-06 21:23:42 +00:00
|
|
|
for (unsigned j = CU_NUM_SAVED_REGS - RegCount; j < i; ++j)
|
2011-07-25 18:00:28 +00:00
|
|
|
if (SavedRegs[j] < SavedRegs[i])
|
|
|
|
++Countless;
|
|
|
|
|
|
|
|
RenumRegs[i] = SavedRegs[i] - Countless - 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Take the renumbered values and encode them into a 10-bit number.
|
|
|
|
uint32_t permutationEncoding = 0;
|
|
|
|
switch (RegCount) {
|
|
|
|
case 6:
|
|
|
|
permutationEncoding |= 120 * RenumRegs[0] + 24 * RenumRegs[1]
|
|
|
|
+ 6 * RenumRegs[2] + 2 * RenumRegs[3]
|
|
|
|
+ RenumRegs[4];
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
permutationEncoding |= 120 * RenumRegs[1] + 24 * RenumRegs[2]
|
|
|
|
+ 6 * RenumRegs[3] + 2 * RenumRegs[4]
|
|
|
|
+ RenumRegs[5];
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
permutationEncoding |= 60 * RenumRegs[2] + 12 * RenumRegs[3]
|
|
|
|
+ 3 * RenumRegs[4] + RenumRegs[5];
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
permutationEncoding |= 20 * RenumRegs[3] + 4 * RenumRegs[4]
|
|
|
|
+ RenumRegs[5];
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
permutationEncoding |= 5 * RenumRegs[4] + RenumRegs[5];
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
permutationEncoding |= RenumRegs[5];
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
assert((permutationEncoding & 0x3FF) == permutationEncoding &&
|
|
|
|
"Invalid compact register encoding!");
|
|
|
|
return permutationEncoding;
|
|
|
|
}
|
|
|
|
|
|
|
|
/// encodeCompactUnwindRegistersWithFrame - Return the registers encoded for a
|
|
|
|
/// compact encoding with a frame pointer.
|
2011-12-06 21:23:42 +00:00
|
|
|
static uint32_t
|
|
|
|
encodeCompactUnwindRegistersWithFrame(unsigned SavedRegs[CU_NUM_SAVED_REGS],
|
|
|
|
bool Is64Bit) {
|
2011-07-25 18:00:28 +00:00
|
|
|
// Encode the registers in the order they were saved, 3-bits per register. The
|
2012-01-12 23:05:03 +00:00
|
|
|
// registers are numbered from 1 to CU_NUM_SAVED_REGS.
|
2011-07-25 18:00:28 +00:00
|
|
|
uint32_t RegEnc = 0;
|
2012-01-13 00:41:53 +00:00
|
|
|
for (int I = CU_NUM_SAVED_REGS - 1, Idx = 0; I != -1; --I) {
|
2011-07-25 18:00:28 +00:00
|
|
|
unsigned Reg = SavedRegs[I];
|
2012-01-12 23:05:03 +00:00
|
|
|
if (Reg == 0) continue;
|
|
|
|
|
2013-05-09 18:21:45 +00:00
|
|
|
int CURegNum = getCompactUnwindRegNum(Reg, Is64Bit);
|
2012-01-12 23:05:03 +00:00
|
|
|
if (CURegNum == -1) return ~0U;
|
2011-12-06 01:57:48 +00:00
|
|
|
|
|
|
|
// Encode the 3-bit register number in order, skipping over 3-bits for each
|
|
|
|
// register.
|
2012-01-12 23:05:03 +00:00
|
|
|
RegEnc |= (CURegNum & 0x7) << (Idx++ * 3);
|
2011-07-25 18:00:28 +00:00
|
|
|
}
|
|
|
|
|
2012-01-11 09:08:04 +00:00
|
|
|
assert((RegEnc & 0x3FFFF) == RegEnc && "Invalid compact register encoding!");
|
2011-07-25 18:00:28 +00:00
|
|
|
return RegEnc;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t X86FrameLowering::getCompactUnwindEncoding(MachineFunction &MF) const {
|
|
|
|
const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
|
|
|
|
unsigned FramePtr = RegInfo->getFrameRegister(MF);
|
|
|
|
unsigned StackPtr = RegInfo->getStackRegister();
|
|
|
|
|
|
|
|
bool Is64Bit = STI.is64Bit();
|
|
|
|
bool HasFP = hasFP(MF);
|
|
|
|
|
2011-12-06 21:23:42 +00:00
|
|
|
unsigned SavedRegs[CU_NUM_SAVED_REGS] = { 0, 0, 0, 0, 0, 0 };
|
2011-12-14 23:53:24 +00:00
|
|
|
unsigned SavedRegIdx = 0;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
|
|
|
unsigned OffsetSize = (Is64Bit ? 8 : 4);
|
|
|
|
|
|
|
|
unsigned PushInstr = (Is64Bit ? X86::PUSH64r : X86::PUSH32r);
|
|
|
|
unsigned PushInstrSize = 1;
|
|
|
|
unsigned MoveInstr = (Is64Bit ? X86::MOV64rr : X86::MOV32rr);
|
|
|
|
unsigned MoveInstrSize = (Is64Bit ? 3 : 2);
|
|
|
|
unsigned SubtractInstrIdx = (Is64Bit ? 3 : 2);
|
|
|
|
|
2011-07-26 08:03:49 +00:00
|
|
|
unsigned StackDivide = (Is64Bit ? 8 : 4);
|
|
|
|
|
2011-07-25 18:00:28 +00:00
|
|
|
unsigned InstrOffset = 0;
|
|
|
|
unsigned StackAdjust = 0;
|
2011-12-06 21:23:42 +00:00
|
|
|
unsigned StackSize = 0;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
|
|
|
MachineBasicBlock &MBB = MF.front(); // Prologue is in entry BB.
|
|
|
|
bool ExpectEnd = false;
|
|
|
|
for (MachineBasicBlock::iterator
|
|
|
|
MBBI = MBB.begin(), MBBE = MBB.end(); MBBI != MBBE; ++MBBI) {
|
|
|
|
MachineInstr &MI = *MBBI;
|
|
|
|
unsigned Opc = MI.getOpcode();
|
|
|
|
if (Opc == X86::PROLOG_LABEL) continue;
|
|
|
|
if (!MI.getFlag(MachineInstr::FrameSetup)) break;
|
|
|
|
|
|
|
|
// We don't exect any more prolog instructions.
|
2013-04-19 00:05:59 +00:00
|
|
|
if (ExpectEnd) return CU::UNWIND_MODE_DWARF;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
|
|
|
if (Opc == PushInstr) {
|
|
|
|
// If there are too many saved registers, we cannot use compact encoding.
|
2013-04-19 00:05:59 +00:00
|
|
|
if (SavedRegIdx >= CU_NUM_SAVED_REGS) return CU::UNWIND_MODE_DWARF;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
2013-05-09 20:10:38 +00:00
|
|
|
unsigned Reg = MI.getOperand(0).getReg();
|
|
|
|
if (Reg == (Is64Bit ? X86::RAX : X86::EAX)) {
|
|
|
|
ExpectEnd = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2011-12-14 23:53:24 +00:00
|
|
|
SavedRegs[SavedRegIdx++] = MI.getOperand(0).getReg();
|
2011-12-06 21:23:42 +00:00
|
|
|
StackAdjust += OffsetSize;
|
2011-07-25 18:00:28 +00:00
|
|
|
InstrOffset += PushInstrSize;
|
|
|
|
} else if (Opc == MoveInstr) {
|
|
|
|
unsigned SrcReg = MI.getOperand(1).getReg();
|
|
|
|
unsigned DstReg = MI.getOperand(0).getReg();
|
|
|
|
|
|
|
|
if (DstReg != FramePtr || SrcReg != StackPtr)
|
2013-04-19 00:05:59 +00:00
|
|
|
return CU::UNWIND_MODE_DWARF;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
2011-12-06 21:23:42 +00:00
|
|
|
StackAdjust = 0;
|
2011-07-25 18:00:28 +00:00
|
|
|
memset(SavedRegs, 0, sizeof(SavedRegs));
|
2011-12-14 23:53:24 +00:00
|
|
|
SavedRegIdx = 0;
|
2011-07-25 18:00:28 +00:00
|
|
|
InstrOffset += MoveInstrSize;
|
2011-12-06 22:14:27 +00:00
|
|
|
} else if (Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
|
|
|
|
Opc == X86::SUB32ri || Opc == X86::SUB32ri8) {
|
2011-12-06 21:23:42 +00:00
|
|
|
if (StackSize)
|
|
|
|
// We already have a stack size.
|
2013-04-19 00:05:59 +00:00
|
|
|
return CU::UNWIND_MODE_DWARF;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
|
|
|
if (!MI.getOperand(0).isReg() ||
|
|
|
|
MI.getOperand(0).getReg() != MI.getOperand(1).getReg() ||
|
|
|
|
MI.getOperand(0).getReg() != StackPtr || !MI.getOperand(2).isImm())
|
|
|
|
// We need this to be a stack adjustment pointer. Something like:
|
|
|
|
//
|
|
|
|
// %RSP<def> = SUB64ri8 %RSP, 48
|
2013-04-19 00:05:59 +00:00
|
|
|
return CU::UNWIND_MODE_DWARF;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
2011-12-06 21:23:42 +00:00
|
|
|
StackSize = MI.getOperand(2).getImm() / StackDivide;
|
2011-07-25 18:00:28 +00:00
|
|
|
SubtractInstrIdx += InstrOffset;
|
|
|
|
ExpectEnd = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Encode that we are using EBP/RBP as the frame pointer.
|
|
|
|
uint32_t CompactUnwindEncoding = 0;
|
2011-12-06 21:23:42 +00:00
|
|
|
StackAdjust /= StackDivide;
|
2011-07-25 18:00:28 +00:00
|
|
|
if (HasFP) {
|
2011-12-06 21:23:42 +00:00
|
|
|
if ((StackAdjust & 0xFF) != StackAdjust)
|
2011-07-25 18:00:28 +00:00
|
|
|
// Offset was too big for compact encoding.
|
2013-04-19 00:05:59 +00:00
|
|
|
return CU::UNWIND_MODE_DWARF;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
|
|
|
// Get the encoding of the saved registers when we have a frame pointer.
|
|
|
|
uint32_t RegEnc = encodeCompactUnwindRegistersWithFrame(SavedRegs, Is64Bit);
|
2013-04-19 00:05:59 +00:00
|
|
|
if (RegEnc == ~0U) return CU::UNWIND_MODE_DWARF;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
2013-04-19 00:05:59 +00:00
|
|
|
CompactUnwindEncoding |= CU::UNWIND_MODE_BP_FRAME;
|
2011-12-06 21:23:42 +00:00
|
|
|
CompactUnwindEncoding |= (StackAdjust & 0xFF) << 16;
|
2013-04-19 00:05:59 +00:00
|
|
|
CompactUnwindEncoding |= RegEnc & CU::UNWIND_BP_FRAME_REGISTERS;
|
2011-07-25 18:00:28 +00:00
|
|
|
} else {
|
2011-12-07 07:58:55 +00:00
|
|
|
++StackAdjust;
|
|
|
|
uint32_t TotalStackSize = StackAdjust + StackSize;
|
2011-12-06 21:34:01 +00:00
|
|
|
if ((TotalStackSize & 0xFF) == TotalStackSize) {
|
2011-12-06 19:16:17 +00:00
|
|
|
// Frameless stack with a small stack size.
|
2013-04-19 00:05:59 +00:00
|
|
|
CompactUnwindEncoding |= CU::UNWIND_MODE_STACK_IMMD;
|
2011-12-06 19:16:17 +00:00
|
|
|
|
|
|
|
// Encode the stack size.
|
2011-12-06 21:34:01 +00:00
|
|
|
CompactUnwindEncoding |= (TotalStackSize & 0xFF) << 16;
|
2011-07-25 18:00:28 +00:00
|
|
|
} else {
|
2011-12-06 21:23:42 +00:00
|
|
|
if ((StackAdjust & 0x7) != StackAdjust)
|
2011-07-25 18:00:28 +00:00
|
|
|
// The extra stack adjustments are too big for us to handle.
|
2013-04-19 00:05:59 +00:00
|
|
|
return CU::UNWIND_MODE_DWARF;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
|
|
|
// Frameless stack with an offset too large for us to encode compactly.
|
2013-04-19 00:05:59 +00:00
|
|
|
CompactUnwindEncoding |= CU::UNWIND_MODE_STACK_IND;
|
2011-07-25 18:00:28 +00:00
|
|
|
|
|
|
|
// Encode the offset to the nnnnnn value in the 'subl $nnnnnn, ESP'
|
|
|
|
// instruction.
|
|
|
|
CompactUnwindEncoding |= (SubtractInstrIdx & 0xFF) << 16;
|
|
|
|
|
2011-12-06 21:23:42 +00:00
|
|
|
// Encode any extra stack stack adjustments (done via push instructions).
|
|
|
|
CompactUnwindEncoding |= (StackAdjust & 0x7) << 13;
|
2011-07-25 18:00:28 +00:00
|
|
|
}
|
|
|
|
|
2011-12-06 19:16:17 +00:00
|
|
|
// Encode the number of registers saved.
|
2011-12-14 23:53:24 +00:00
|
|
|
CompactUnwindEncoding |= (SavedRegIdx & 0x7) << 10;
|
2011-12-06 19:09:06 +00:00
|
|
|
|
2011-07-25 18:00:28 +00:00
|
|
|
// Get the encoding of the saved registers when we don't have a frame
|
|
|
|
// pointer.
|
2011-12-06 21:23:42 +00:00
|
|
|
uint32_t RegEnc =
|
2011-12-14 23:53:24 +00:00
|
|
|
encodeCompactUnwindRegistersWithoutFrame(SavedRegs, SavedRegIdx,
|
2011-12-06 21:23:42 +00:00
|
|
|
Is64Bit);
|
2013-04-19 00:05:59 +00:00
|
|
|
if (RegEnc == ~0U) return CU::UNWIND_MODE_DWARF;
|
2011-12-06 19:16:17 +00:00
|
|
|
|
|
|
|
// Encode the register encoding.
|
2013-04-19 00:05:59 +00:00
|
|
|
CompactUnwindEncoding |=
|
|
|
|
RegEnc & CU::UNWIND_FRAMELESS_STACK_REG_PERMUTATION;
|
2011-07-25 18:00:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return CompactUnwindEncoding;
|
|
|
|
}
|
|
|
|
|
2012-12-23 07:30:09 +00:00
|
|
|
/// usesTheStack - This function checks if any of the users of EFLAGS
|
2012-12-21 23:48:49 +00:00
|
|
|
/// copies the EFLAGS. We know that the code that lowers COPY of EFLAGS has
|
|
|
|
/// to use the stack, and if we don't adjust the stack we clobber the first
|
|
|
|
/// frame index.
|
2012-12-23 07:30:09 +00:00
|
|
|
/// See X86InstrInfo::copyPhysReg.
|
|
|
|
static bool usesTheStack(MachineFunction &MF) {
|
2012-12-21 23:48:49 +00:00
|
|
|
MachineRegisterInfo &MRI = MF.getRegInfo();
|
|
|
|
|
|
|
|
for (MachineRegisterInfo::reg_iterator ri = MRI.reg_begin(X86::EFLAGS),
|
|
|
|
re = MRI.reg_end(); ri != re; ++ri)
|
|
|
|
if (ri->isCopy())
|
|
|
|
return true;
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2010-11-15 00:06:54 +00:00
|
|
|
/// emitPrologue - Push callee-saved registers onto the stack, which
|
|
|
|
/// automatically adjust the stack pointer. Adjust the stack pointer to allocate
|
|
|
|
/// space for local variables. Also emit labels used by the exception handler to
|
|
|
|
/// generate the exception handling frames.
|
2011-01-10 12:39:04 +00:00
|
|
|
void X86FrameLowering::emitPrologue(MachineFunction &MF) const {
|
2010-11-15 00:06:54 +00:00
|
|
|
MachineBasicBlock &MBB = MF.front(); // Prologue goes in entry BB.
|
|
|
|
MachineBasicBlock::iterator MBBI = MBB.begin();
|
|
|
|
MachineFrameInfo *MFI = MF.getFrameInfo();
|
|
|
|
const Function *Fn = MF.getFunction();
|
2010-11-18 23:25:52 +00:00
|
|
|
const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
|
|
|
|
const X86InstrInfo &TII = *TM.getInstrInfo();
|
2010-11-15 00:06:54 +00:00
|
|
|
MachineModuleInfo &MMI = MF.getMMI();
|
|
|
|
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
|
|
|
|
bool needsFrameMoves = MMI.hasDebugInfo() ||
|
2011-05-25 03:44:17 +00:00
|
|
|
Fn->needsUnwindTableEntry();
|
2010-11-15 00:06:54 +00:00
|
|
|
uint64_t MaxAlign = MFI->getMaxAlignment(); // Desired stack alignment.
|
|
|
|
uint64_t StackSize = MFI->getStackSize(); // Number of bytes to allocate.
|
2010-11-18 21:19:35 +00:00
|
|
|
bool HasFP = hasFP(MF);
|
2010-11-15 00:06:54 +00:00
|
|
|
bool Is64Bit = STI.is64Bit();
|
2013-02-05 21:53:29 +00:00
|
|
|
bool IsLP64 = STI.isTarget64BitLP64();
|
2010-11-15 00:06:54 +00:00
|
|
|
bool IsWin64 = STI.isTargetWin64();
|
2012-02-07 22:50:41 +00:00
|
|
|
bool UseLEA = STI.useLeaForSP();
|
2010-11-15 00:06:54 +00:00
|
|
|
unsigned StackAlign = getStackAlignment();
|
|
|
|
unsigned SlotSize = RegInfo->getSlotSize();
|
|
|
|
unsigned FramePtr = RegInfo->getFrameRegister(MF);
|
|
|
|
unsigned StackPtr = RegInfo->getStackRegister();
|
2012-07-10 17:45:53 +00:00
|
|
|
unsigned BasePtr = RegInfo->getBaseRegister();
|
2010-11-15 00:06:54 +00:00
|
|
|
DebugLoc DL;
|
|
|
|
|
|
|
|
// If we're forcing a stack realignment we can't rely on just the frame
|
|
|
|
// info, we need to know the ABI stack alignment as well in case we
|
|
|
|
// have a call out. Otherwise just make sure we have some alignment - we'll
|
|
|
|
// go with the minimum SlotSize.
|
|
|
|
if (ForceStackAlign) {
|
|
|
|
if (MFI->hasCalls())
|
|
|
|
MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
|
|
|
|
else if (MaxAlign < SlotSize)
|
|
|
|
MaxAlign = SlotSize;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Add RETADDR move area to callee saved frame size.
|
|
|
|
int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
|
|
|
|
if (TailCallReturnAddrDelta < 0)
|
|
|
|
X86FI->setCalleeSavedFrameSize(
|
|
|
|
X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
|
|
|
|
|
|
|
|
// If this is x86-64 and the Red Zone is not disabled, if we are a leaf
|
|
|
|
// function, and use up to 128 bytes of stack space, don't have a frame
|
|
|
|
// pointer, calls, or dynamic alloca then we do not need to adjust the
|
2012-12-21 23:48:49 +00:00
|
|
|
// stack pointer (we fit in the Red Zone). We also check that we don't
|
|
|
|
// push and pop from the stack.
|
2012-12-30 10:32:01 +00:00
|
|
|
if (Is64Bit && !Fn->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
|
|
|
|
Attribute::NoRedZone) &&
|
2010-11-15 00:06:54 +00:00
|
|
|
!RegInfo->needsStackRealignment(MF) &&
|
2011-12-02 22:16:29 +00:00
|
|
|
!MFI->hasVarSizedObjects() && // No dynamic alloca.
|
|
|
|
!MFI->adjustsStack() && // No calls.
|
|
|
|
!IsWin64 && // Win64 has no Red Zone
|
2012-12-23 07:30:09 +00:00
|
|
|
!usesTheStack(MF) && // Don't push and pop.
|
2011-12-02 22:16:29 +00:00
|
|
|
!MF.getTarget().Options.EnableSegmentedStacks) { // Regular stack
|
2010-11-15 00:06:54 +00:00
|
|
|
uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
|
|
|
|
if (HasFP) MinSize += SlotSize;
|
|
|
|
StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
|
|
|
|
MFI->setStackSize(StackSize);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Insert stack pointer adjustment for later moving of return addr. Only
|
|
|
|
// applies to tail call optimized functions where the callee argument stack
|
|
|
|
// size is bigger than the callers.
|
|
|
|
if (TailCallReturnAddrDelta < 0) {
|
|
|
|
MachineInstr *MI =
|
|
|
|
BuildMI(MBB, MBBI, DL,
|
2013-02-05 21:53:29 +00:00
|
|
|
TII.get(getSUBriOpcode(IsLP64, -TailCallReturnAddrDelta)),
|
2010-11-15 00:06:54 +00:00
|
|
|
StackPtr)
|
|
|
|
.addReg(StackPtr)
|
2011-06-12 01:45:54 +00:00
|
|
|
.addImm(-TailCallReturnAddrDelta)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
2010-11-15 00:06:54 +00:00
|
|
|
MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
|
|
|
|
}
|
|
|
|
|
|
|
|
// Mapping for machine moves:
|
|
|
|
//
|
|
|
|
// DST: VirtualFP AND
|
|
|
|
// SRC: VirtualFP => DW_CFA_def_cfa_offset
|
|
|
|
// ELSE => DW_CFA_def_cfa
|
|
|
|
//
|
|
|
|
// SRC: VirtualFP AND
|
|
|
|
// DST: Register => DW_CFA_def_cfa_register
|
|
|
|
//
|
|
|
|
// ELSE
|
|
|
|
// OFFSET < 0 => DW_CFA_offset_extended_sf
|
|
|
|
// REG < 64 => DW_CFA_offset + Reg
|
|
|
|
// ELSE => DW_CFA_offset_extended
|
|
|
|
|
|
|
|
uint64_t NumBytes = 0;
|
2012-10-25 06:29:14 +00:00
|
|
|
int stackGrowth = -SlotSize;
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
if (HasFP) {
|
|
|
|
// Calculate required stack adjustment.
|
|
|
|
uint64_t FrameSize = StackSize - SlotSize;
|
2012-07-16 06:54:09 +00:00
|
|
|
if (RegInfo->needsStackRealignment(MF)) {
|
|
|
|
// Callee-saved registers are pushed on stack before the stack
|
|
|
|
// is realigned.
|
|
|
|
FrameSize -= X86FI->getCalleeSavedFrameSize();
|
|
|
|
NumBytes = (FrameSize + MaxAlign - 1) / MaxAlign * MaxAlign;
|
|
|
|
} else {
|
|
|
|
NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
|
|
|
|
}
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// Get the offset of the stack slot for the EBP register, which is
|
|
|
|
// guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
|
|
|
|
// Update the frame offset adjustment.
|
|
|
|
MFI->setOffsetAdjustment(-NumBytes);
|
|
|
|
|
|
|
|
// Save EBP/RBP into the appropriate stack slot.
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
|
2011-06-12 01:45:54 +00:00
|
|
|
.addReg(FramePtr, RegState::Kill)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
if (needsFrameMoves) {
|
|
|
|
// Mark the place where EBP/RBP was saved.
|
|
|
|
MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
|
2011-07-21 00:44:56 +00:00
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL))
|
|
|
|
.addSym(FrameLabel);
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// Define the current CFA rule to use the provided offset.
|
2013-05-15 22:27:35 +00:00
|
|
|
assert(StackSize);
|
2013-05-16 21:02:15 +00:00
|
|
|
MMI.addFrameInst(
|
|
|
|
MCCFIInstruction::createDefCfaOffset(FrameLabel, 2 * stackGrowth));
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// Change the rule for the FramePtr to be an "offset" rule.
|
2013-05-16 21:02:15 +00:00
|
|
|
unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true);
|
|
|
|
MMI.addFrameInst(MCCFIInstruction::createOffset(FrameLabel, DwarfFramePtr,
|
|
|
|
2 * stackGrowth));
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
|
2011-07-25 18:00:28 +00:00
|
|
|
// Update EBP with the new base value.
|
2010-11-15 00:06:54 +00:00
|
|
|
BuildMI(MBB, MBBI, DL,
|
|
|
|
TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr)
|
2011-06-12 01:45:54 +00:00
|
|
|
.addReg(StackPtr)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
if (needsFrameMoves) {
|
|
|
|
// Mark effective beginning of when frame pointer becomes valid.
|
|
|
|
MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
|
2011-07-21 00:44:56 +00:00
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL))
|
|
|
|
.addSym(FrameLabel);
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// Define the current CFA to use the EBP/RBP register.
|
2013-05-16 21:02:15 +00:00
|
|
|
unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true);
|
|
|
|
MMI.addFrameInst(
|
|
|
|
MCCFIInstruction::createDefCfaRegister(FrameLabel, DwarfFramePtr));
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Mark the FramePtr as live-in in every block except the entry.
|
|
|
|
for (MachineFunction::iterator I = llvm::next(MF.begin()), E = MF.end();
|
|
|
|
I != E; ++I)
|
|
|
|
I->addLiveIn(FramePtr);
|
|
|
|
} else {
|
|
|
|
NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
|
|
|
|
}
|
|
|
|
|
|
|
|
// Skip the callee-saved push instructions.
|
|
|
|
bool PushedRegs = false;
|
|
|
|
int StackOffset = 2 * stackGrowth;
|
|
|
|
|
|
|
|
while (MBBI != MBB.end() &&
|
|
|
|
(MBBI->getOpcode() == X86::PUSH32r ||
|
|
|
|
MBBI->getOpcode() == X86::PUSH64r)) {
|
|
|
|
PushedRegs = true;
|
2011-07-21 00:44:56 +00:00
|
|
|
MBBI->setFlag(MachineInstr::FrameSetup);
|
2010-11-15 00:06:54 +00:00
|
|
|
++MBBI;
|
|
|
|
|
|
|
|
if (!HasFP && needsFrameMoves) {
|
|
|
|
// Mark callee-saved push instruction.
|
|
|
|
MCSymbol *Label = MMI.getContext().CreateTempSymbol();
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL)).addSym(Label);
|
|
|
|
|
|
|
|
// Define the current CFA rule to use the provided offset.
|
2013-05-16 04:59:17 +00:00
|
|
|
assert(StackSize);
|
2013-05-16 21:02:15 +00:00
|
|
|
MMI.addFrameInst(
|
|
|
|
MCCFIInstruction::createDefCfaOffset(Label, StackOffset));
|
2010-11-15 00:06:54 +00:00
|
|
|
StackOffset += stackGrowth;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-07-16 06:54:09 +00:00
|
|
|
// Realign stack after we pushed callee-saved registers (so that we'll be
|
|
|
|
// able to calculate their offsets from the frame pointer).
|
|
|
|
|
|
|
|
// NOTE: We push the registers before realigning the stack, so
|
|
|
|
// vector callee-saved (xmm) registers may be saved w/o proper
|
|
|
|
// alignment in this way. However, currently these regs are saved in
|
|
|
|
// stack slots (see X86FrameLowering::spillCalleeSavedRegisters()), so
|
|
|
|
// this shouldn't be a problem.
|
|
|
|
if (RegInfo->needsStackRealignment(MF)) {
|
|
|
|
assert(HasFP && "There should be a frame pointer if stack is realigned.");
|
|
|
|
MachineInstr *MI =
|
|
|
|
BuildMI(MBB, MBBI, DL,
|
|
|
|
TII.get(Is64Bit ? X86::AND64ri32 : X86::AND32ri), StackPtr)
|
|
|
|
.addReg(StackPtr)
|
|
|
|
.addImm(-MaxAlign)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
|
|
|
|
|
|
|
// The EFLAGS implicit def is dead.
|
|
|
|
MI->getOperand(3).setIsDead();
|
|
|
|
}
|
|
|
|
|
2010-11-15 00:06:54 +00:00
|
|
|
// If there is an SUB32ri of ESP immediately before this instruction, merge
|
|
|
|
// the two. This can be the case when tail call elimination is enabled and
|
|
|
|
// the callee has more arguments then the caller.
|
|
|
|
NumBytes -= mergeSPUpdates(MBB, MBBI, StackPtr, true);
|
|
|
|
|
|
|
|
// If there is an ADD32ri or SUB32ri of ESP immediately after this
|
|
|
|
// instruction, merge the two instructions.
|
|
|
|
mergeSPUpdatesDown(MBB, MBBI, StackPtr, &NumBytes);
|
|
|
|
|
|
|
|
// Adjust stack pointer: ESP -= numbytes.
|
|
|
|
|
|
|
|
// Windows and cygwin/mingw require a prologue helper routine when allocating
|
|
|
|
// more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
|
|
|
|
// uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
|
|
|
|
// stack and adjust the stack pointer in one go. The 64-bit version of
|
|
|
|
// __chkstk is only responsible for probing the stack. The 64-bit prologue is
|
|
|
|
// responsible for adjusting the stack pointer. Touching the stack at 4K
|
|
|
|
// increments is necessary to ensure that the guard pages used by the OS
|
|
|
|
// virtual memory manager are allocated in correct sequence.
|
2011-03-24 07:07:00 +00:00
|
|
|
if (NumBytes >= 4096 && STI.isTargetCOFF() && !STI.isTargetEnvMacho()) {
|
|
|
|
const char *StackProbeSymbol;
|
|
|
|
bool isSPUpdateNeeded = false;
|
|
|
|
|
|
|
|
if (Is64Bit) {
|
|
|
|
if (STI.isTargetCygMing())
|
|
|
|
StackProbeSymbol = "___chkstk";
|
|
|
|
else {
|
|
|
|
StackProbeSymbol = "__chkstk";
|
|
|
|
isSPUpdateNeeded = true;
|
|
|
|
}
|
|
|
|
} else if (STI.isTargetCygMing())
|
|
|
|
StackProbeSymbol = "_alloca";
|
|
|
|
else
|
|
|
|
StackProbeSymbol = "_chkstk";
|
|
|
|
|
2010-11-15 00:06:54 +00:00
|
|
|
// Check whether EAX is livein for this function.
|
|
|
|
bool isEAXAlive = isEAXLiveIn(MF);
|
|
|
|
|
2011-03-24 07:07:00 +00:00
|
|
|
if (isEAXAlive) {
|
|
|
|
// Sanity check that EAX is not livein for this function.
|
|
|
|
// It should not be, so throw an assert.
|
|
|
|
assert(!Is64Bit && "EAX is livein in x64 case!");
|
|
|
|
|
2010-11-15 00:06:54 +00:00
|
|
|
// Save EAX
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
|
2011-07-21 00:44:56 +00:00
|
|
|
.addReg(X86::EAX, RegState::Kill)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
2011-03-24 07:07:00 +00:00
|
|
|
}
|
2010-11-15 00:06:54 +00:00
|
|
|
|
2011-03-24 07:07:00 +00:00
|
|
|
if (Is64Bit) {
|
|
|
|
// Handle the 64-bit Windows ABI case where we need to call __chkstk.
|
|
|
|
// Function prologue is responsible for adjusting the stack pointer.
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
|
2011-07-21 00:44:56 +00:00
|
|
|
.addImm(NumBytes)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
2011-03-24 07:07:00 +00:00
|
|
|
} else {
|
|
|
|
// Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
|
|
|
|
// We'll also use 4 already allocated bytes for EAX.
|
2010-11-15 00:06:54 +00:00
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
|
2011-07-21 00:44:56 +00:00
|
|
|
.addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
2011-03-24 07:07:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
BuildMI(MBB, MBBI, DL,
|
|
|
|
TII.get(Is64Bit ? X86::W64ALLOCA : X86::CALLpcrel32))
|
|
|
|
.addExternalSymbol(StackProbeSymbol)
|
|
|
|
.addReg(StackPtr, RegState::Define | RegState::Implicit)
|
2011-07-21 00:44:56 +00:00
|
|
|
.addReg(X86::EFLAGS, RegState::Define | RegState::Implicit)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
2011-03-24 07:07:00 +00:00
|
|
|
|
|
|
|
// MSVC x64's __chkstk needs to adjust %rsp.
|
|
|
|
// FIXME: %rax preserves the offset and should be available.
|
|
|
|
if (isSPUpdateNeeded)
|
2013-02-05 21:53:29 +00:00
|
|
|
emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit, IsLP64,
|
2012-10-03 08:10:01 +00:00
|
|
|
UseLEA, TII, *RegInfo);
|
2011-03-24 07:07:00 +00:00
|
|
|
|
|
|
|
if (isEAXAlive) {
|
|
|
|
// Restore EAX
|
|
|
|
MachineInstr *MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm),
|
|
|
|
X86::EAX),
|
|
|
|
StackPtr, false, NumBytes - 4);
|
2011-07-21 00:44:56 +00:00
|
|
|
MI->setFlag(MachineInstr::FrameSetup);
|
2011-03-24 07:07:00 +00:00
|
|
|
MBB.insert(MBBI, MI);
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
} else if (NumBytes)
|
2013-02-05 21:53:29 +00:00
|
|
|
emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit, IsLP64,
|
2012-10-03 08:10:01 +00:00
|
|
|
UseLEA, TII, *RegInfo);
|
2010-11-15 00:06:54 +00:00
|
|
|
|
2012-07-10 17:45:53 +00:00
|
|
|
// If we need a base pointer, set it up here. It's whatever the value
|
|
|
|
// of the stack pointer is at this point. Any variable size objects
|
|
|
|
// will be allocated after this, so we can still use the base pointer
|
|
|
|
// to reference locals.
|
|
|
|
if (RegInfo->hasBasePointer(MF)) {
|
|
|
|
// Update the frame pointer with the current stack pointer.
|
|
|
|
unsigned Opc = Is64Bit ? X86::MOV64rr : X86::MOV32rr;
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
|
|
|
|
.addReg(StackPtr)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
|
|
|
}
|
|
|
|
|
2011-04-15 15:11:06 +00:00
|
|
|
if (( (!HasFP && NumBytes) || PushedRegs) && needsFrameMoves) {
|
2010-11-15 00:06:54 +00:00
|
|
|
// Mark end of stack pointer adjustment.
|
|
|
|
MCSymbol *Label = MMI.getContext().CreateTempSymbol();
|
2011-07-21 00:44:56 +00:00
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::PROLOG_LABEL))
|
|
|
|
.addSym(Label);
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
if (!HasFP && NumBytes) {
|
|
|
|
// Define the current CFA rule to use the provided offset.
|
2013-05-15 22:27:35 +00:00
|
|
|
assert(StackSize);
|
2013-05-16 21:02:15 +00:00
|
|
|
MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset(
|
|
|
|
Label, -StackSize + stackGrowth));
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Emit DWARF info specifying the offsets of the callee-saved registers.
|
|
|
|
if (PushedRegs)
|
|
|
|
emitCalleeSavedFrameMoves(MF, Label, HasFP ? FramePtr : StackPtr);
|
|
|
|
}
|
2011-07-25 18:00:28 +00:00
|
|
|
|
|
|
|
// Darwin 10.7 and greater has support for compact unwind encoding.
|
2011-09-06 23:47:14 +00:00
|
|
|
if (STI.getTargetTriple().isMacOSX() &&
|
2011-08-31 16:19:51 +00:00
|
|
|
!STI.getTargetTriple().isMacOSXVersionLT(10, 7))
|
2011-07-25 18:00:28 +00:00
|
|
|
MMI.setCompactUnwindEncoding(getCompactUnwindEncoding(MF));
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
|
2011-01-10 12:39:04 +00:00
|
|
|
void X86FrameLowering::emitEpilogue(MachineFunction &MF,
|
2011-06-14 03:23:52 +00:00
|
|
|
MachineBasicBlock &MBB) const {
|
2010-11-15 00:06:54 +00:00
|
|
|
const MachineFrameInfo *MFI = MF.getFrameInfo();
|
|
|
|
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
|
2010-11-18 23:25:52 +00:00
|
|
|
const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
|
|
|
|
const X86InstrInfo &TII = *TM.getInstrInfo();
|
2011-01-13 21:28:52 +00:00
|
|
|
MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
|
|
|
|
assert(MBBI != MBB.end() && "Returning block has no instructions");
|
2010-11-15 00:06:54 +00:00
|
|
|
unsigned RetOpcode = MBBI->getOpcode();
|
|
|
|
DebugLoc DL = MBBI->getDebugLoc();
|
|
|
|
bool Is64Bit = STI.is64Bit();
|
2013-02-05 21:53:29 +00:00
|
|
|
bool IsLP64 = STI.isTarget64BitLP64();
|
2012-02-07 22:50:41 +00:00
|
|
|
bool UseLEA = STI.useLeaForSP();
|
2010-11-15 00:06:54 +00:00
|
|
|
unsigned StackAlign = getStackAlignment();
|
|
|
|
unsigned SlotSize = RegInfo->getSlotSize();
|
|
|
|
unsigned FramePtr = RegInfo->getFrameRegister(MF);
|
|
|
|
unsigned StackPtr = RegInfo->getStackRegister();
|
|
|
|
|
|
|
|
switch (RetOpcode) {
|
|
|
|
default:
|
|
|
|
llvm_unreachable("Can only insert epilog into returning blocks");
|
|
|
|
case X86::RET:
|
|
|
|
case X86::RETI:
|
|
|
|
case X86::TCRETURNdi:
|
|
|
|
case X86::TCRETURNri:
|
|
|
|
case X86::TCRETURNmi:
|
|
|
|
case X86::TCRETURNdi64:
|
|
|
|
case X86::TCRETURNri64:
|
|
|
|
case X86::TCRETURNmi64:
|
|
|
|
case X86::EH_RETURN:
|
|
|
|
case X86::EH_RETURN64:
|
|
|
|
break; // These are ok
|
|
|
|
}
|
|
|
|
|
|
|
|
// Get the number of bytes to allocate from the FrameInfo.
|
|
|
|
uint64_t StackSize = MFI->getStackSize();
|
|
|
|
uint64_t MaxAlign = MFI->getMaxAlignment();
|
|
|
|
unsigned CSSize = X86FI->getCalleeSavedFrameSize();
|
|
|
|
uint64_t NumBytes = 0;
|
|
|
|
|
|
|
|
// If we're forcing a stack realignment we can't rely on just the frame
|
|
|
|
// info, we need to know the ABI stack alignment as well in case we
|
|
|
|
// have a call out. Otherwise just make sure we have some alignment - we'll
|
|
|
|
// go with the minimum.
|
|
|
|
if (ForceStackAlign) {
|
|
|
|
if (MFI->hasCalls())
|
|
|
|
MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
|
|
|
|
else
|
|
|
|
MaxAlign = MaxAlign ? MaxAlign : 4;
|
|
|
|
}
|
|
|
|
|
2010-11-18 21:19:35 +00:00
|
|
|
if (hasFP(MF)) {
|
2010-11-15 00:06:54 +00:00
|
|
|
// Calculate required stack adjustment.
|
|
|
|
uint64_t FrameSize = StackSize - SlotSize;
|
2012-07-16 06:54:09 +00:00
|
|
|
if (RegInfo->needsStackRealignment(MF)) {
|
|
|
|
// Callee-saved registers were pushed on stack before the stack
|
|
|
|
// was realigned.
|
|
|
|
FrameSize -= CSSize;
|
|
|
|
NumBytes = (FrameSize + MaxAlign - 1) / MaxAlign * MaxAlign;
|
|
|
|
} else {
|
|
|
|
NumBytes = FrameSize - CSSize;
|
|
|
|
}
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// Pop EBP.
|
|
|
|
BuildMI(MBB, MBBI, DL,
|
|
|
|
TII.get(Is64Bit ? X86::POP64r : X86::POP32r), FramePtr);
|
|
|
|
} else {
|
|
|
|
NumBytes = StackSize - CSSize;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Skip the callee-saved pop instructions.
|
|
|
|
while (MBBI != MBB.begin()) {
|
|
|
|
MachineBasicBlock::iterator PI = prior(MBBI);
|
|
|
|
unsigned Opc = PI->getOpcode();
|
|
|
|
|
2011-01-13 21:28:52 +00:00
|
|
|
if (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::DBG_VALUE &&
|
2011-12-07 07:15:52 +00:00
|
|
|
!PI->isTerminator())
|
2010-11-15 00:06:54 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
--MBBI;
|
|
|
|
}
|
2012-07-16 06:54:09 +00:00
|
|
|
MachineBasicBlock::iterator FirstCSPop = MBBI;
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
DL = MBBI->getDebugLoc();
|
|
|
|
|
|
|
|
// If there is an ADD32ri or SUB32ri of ESP immediately before this
|
|
|
|
// instruction, merge the two instructions.
|
|
|
|
if (NumBytes || MFI->hasVarSizedObjects())
|
|
|
|
mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);
|
|
|
|
|
|
|
|
// If dynamic alloca is used, then reset esp to point to the last callee-saved
|
|
|
|
// slot before popping them off! Same applies for the case, when stack was
|
|
|
|
// realigned.
|
2012-07-16 06:54:09 +00:00
|
|
|
if (RegInfo->needsStackRealignment(MF) || MFI->hasVarSizedObjects()) {
|
|
|
|
if (RegInfo->needsStackRealignment(MF))
|
|
|
|
MBBI = FirstCSPop;
|
|
|
|
if (CSSize != 0) {
|
2013-02-06 20:43:57 +00:00
|
|
|
unsigned Opc = getLEArOpcode(IsLP64);
|
2012-07-16 06:54:09 +00:00
|
|
|
addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
|
|
|
|
FramePtr, false, -CSSize);
|
2010-11-15 00:06:54 +00:00
|
|
|
} else {
|
2012-07-16 06:54:09 +00:00
|
|
|
unsigned Opc = (Is64Bit ? X86::MOV64rr : X86::MOV32rr);
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
|
2010-11-15 00:06:54 +00:00
|
|
|
.addReg(FramePtr);
|
|
|
|
}
|
|
|
|
} else if (NumBytes) {
|
|
|
|
// Adjust stack pointer back: ESP += numbytes.
|
2013-02-05 21:53:29 +00:00
|
|
|
emitSPUpdate(MBB, MBBI, StackPtr, NumBytes, Is64Bit, IsLP64, UseLEA,
|
|
|
|
TII, *RegInfo);
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// We're returning from function via eh_return.
|
|
|
|
if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) {
|
2011-01-13 21:28:52 +00:00
|
|
|
MBBI = MBB.getLastNonDebugInstr();
|
2010-11-15 00:06:54 +00:00
|
|
|
MachineOperand &DestAddr = MBBI->getOperand(0);
|
|
|
|
assert(DestAddr.isReg() && "Offset should be in register!");
|
|
|
|
BuildMI(MBB, MBBI, DL,
|
|
|
|
TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),
|
|
|
|
StackPtr).addReg(DestAddr.getReg());
|
|
|
|
} else if (RetOpcode == X86::TCRETURNri || RetOpcode == X86::TCRETURNdi ||
|
|
|
|
RetOpcode == X86::TCRETURNmi ||
|
|
|
|
RetOpcode == X86::TCRETURNri64 || RetOpcode == X86::TCRETURNdi64 ||
|
|
|
|
RetOpcode == X86::TCRETURNmi64) {
|
|
|
|
bool isMem = RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64;
|
|
|
|
// Tail call return: adjust the stack pointer and jump to callee.
|
2011-01-13 22:47:43 +00:00
|
|
|
MBBI = MBB.getLastNonDebugInstr();
|
2010-11-15 00:06:54 +00:00
|
|
|
MachineOperand &JumpTarget = MBBI->getOperand(0);
|
|
|
|
MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);
|
|
|
|
assert(StackAdjust.isImm() && "Expecting immediate value.");
|
|
|
|
|
|
|
|
// Adjust stack pointer.
|
|
|
|
int StackAdj = StackAdjust.getImm();
|
|
|
|
int MaxTCDelta = X86FI->getTCReturnAddrDelta();
|
|
|
|
int Offset = 0;
|
|
|
|
assert(MaxTCDelta <= 0 && "MaxTCDelta should never be positive");
|
|
|
|
|
|
|
|
// Incoporate the retaddr area.
|
|
|
|
Offset = StackAdj-MaxTCDelta;
|
|
|
|
assert(Offset >= 0 && "Offset should never be negative");
|
|
|
|
|
|
|
|
if (Offset) {
|
2011-04-15 05:18:47 +00:00
|
|
|
// Check for possible merge with preceding ADD instruction.
|
2010-11-15 00:06:54 +00:00
|
|
|
Offset += mergeSPUpdates(MBB, MBBI, StackPtr, true);
|
2013-02-05 21:53:29 +00:00
|
|
|
emitSPUpdate(MBB, MBBI, StackPtr, Offset, Is64Bit, IsLP64,
|
|
|
|
UseLEA, TII, *RegInfo);
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Jump to label or value in register.
|
|
|
|
if (RetOpcode == X86::TCRETURNdi || RetOpcode == X86::TCRETURNdi64) {
|
2010-11-30 23:55:39 +00:00
|
|
|
MachineInstrBuilder MIB =
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNdi)
|
|
|
|
? X86::TAILJMPd : X86::TAILJMPd64));
|
|
|
|
if (JumpTarget.isGlobal())
|
|
|
|
MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),
|
|
|
|
JumpTarget.getTargetFlags());
|
|
|
|
else {
|
|
|
|
assert(JumpTarget.isSymbol());
|
|
|
|
MIB.addExternalSymbol(JumpTarget.getSymbolName(),
|
|
|
|
JumpTarget.getTargetFlags());
|
|
|
|
}
|
2010-11-15 00:06:54 +00:00
|
|
|
} else if (RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64) {
|
|
|
|
MachineInstrBuilder MIB =
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get((RetOpcode == X86::TCRETURNmi)
|
|
|
|
? X86::TAILJMPm : X86::TAILJMPm64));
|
|
|
|
for (unsigned i = 0; i != 5; ++i)
|
|
|
|
MIB.addOperand(MBBI->getOperand(i));
|
|
|
|
} else if (RetOpcode == X86::TCRETURNri64) {
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::TAILJMPr64)).
|
|
|
|
addReg(JumpTarget.getReg(), RegState::Kill);
|
|
|
|
} else {
|
|
|
|
BuildMI(MBB, MBBI, DL, TII.get(X86::TAILJMPr)).
|
|
|
|
addReg(JumpTarget.getReg(), RegState::Kill);
|
|
|
|
}
|
|
|
|
|
|
|
|
MachineInstr *NewMI = prior(MBBI);
|
2012-12-20 22:54:02 +00:00
|
|
|
NewMI->copyImplicitOps(MF, MBBI);
|
2010-11-15 00:06:54 +00:00
|
|
|
|
|
|
|
// Delete the pseudo instruction TCRETURN.
|
|
|
|
MBB.erase(MBBI);
|
|
|
|
} else if ((RetOpcode == X86::RET || RetOpcode == X86::RETI) &&
|
|
|
|
(X86FI->getTCReturnAddrDelta() < 0)) {
|
|
|
|
// Add the return addr area delta back since we are not tail calling.
|
|
|
|
int delta = -1*X86FI->getTCReturnAddrDelta();
|
2011-01-13 21:28:52 +00:00
|
|
|
MBBI = MBB.getLastNonDebugInstr();
|
2010-11-15 00:06:54 +00:00
|
|
|
|
2011-04-15 05:18:47 +00:00
|
|
|
// Check for possible merge with preceding ADD instruction.
|
2010-11-15 00:06:54 +00:00
|
|
|
delta += mergeSPUpdates(MBB, MBBI, StackPtr, true);
|
2013-02-05 21:53:29 +00:00
|
|
|
emitSPUpdate(MBB, MBBI, StackPtr, delta, Is64Bit, IsLP64, UseLEA, TII,
|
|
|
|
*RegInfo);
|
2010-11-15 00:06:54 +00:00
|
|
|
}
|
|
|
|
}
|
2010-11-18 23:25:52 +00:00
|
|
|
|
2011-01-10 12:39:04 +00:00
|
|
|
int X86FrameLowering::getFrameIndexOffset(const MachineFunction &MF, int FI) const {
|
2012-05-23 23:45:10 +00:00
|
|
|
const X86RegisterInfo *RegInfo =
|
2010-11-20 15:59:32 +00:00
|
|
|
static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());
|
|
|
|
const MachineFrameInfo *MFI = MF.getFrameInfo();
|
|
|
|
int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea();
|
|
|
|
uint64_t StackSize = MFI->getStackSize();
|
|
|
|
|
2012-07-10 17:45:53 +00:00
|
|
|
if (RegInfo->hasBasePointer(MF)) {
|
|
|
|
assert (hasFP(MF) && "VLAs and dynamic stack realign, but no FP?!");
|
|
|
|
if (FI < 0) {
|
|
|
|
// Skip the saved EBP.
|
|
|
|
return Offset + RegInfo->getSlotSize();
|
|
|
|
} else {
|
|
|
|
assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0);
|
|
|
|
return Offset + StackSize;
|
|
|
|
}
|
|
|
|
} else if (RegInfo->needsStackRealignment(MF)) {
|
2010-11-20 15:59:32 +00:00
|
|
|
if (FI < 0) {
|
|
|
|
// Skip the saved EBP.
|
2012-05-23 23:45:10 +00:00
|
|
|
return Offset + RegInfo->getSlotSize();
|
2010-11-20 15:59:32 +00:00
|
|
|
} else {
|
2011-10-18 12:44:00 +00:00
|
|
|
assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0);
|
2010-11-20 15:59:32 +00:00
|
|
|
return Offset + StackSize;
|
|
|
|
}
|
|
|
|
// FIXME: Support tail calls
|
|
|
|
} else {
|
|
|
|
if (!hasFP(MF))
|
|
|
|
return Offset + StackSize;
|
|
|
|
|
|
|
|
// Skip the saved EBP.
|
2012-05-23 23:45:10 +00:00
|
|
|
Offset += RegInfo->getSlotSize();
|
2010-11-20 15:59:32 +00:00
|
|
|
|
|
|
|
// Skip the RETADDR move area
|
|
|
|
const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
|
|
|
|
int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
|
|
|
|
if (TailCallReturnAddrDelta < 0)
|
|
|
|
Offset -= TailCallReturnAddrDelta;
|
|
|
|
}
|
|
|
|
|
|
|
|
return Offset;
|
|
|
|
}
|
2010-11-27 23:05:03 +00:00
|
|
|
|
2012-05-01 15:16:06 +00:00
|
|
|
int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
|
|
|
|
unsigned &FrameReg) const {
|
2012-05-23 23:45:10 +00:00
|
|
|
const X86RegisterInfo *RegInfo =
|
2012-05-01 15:16:06 +00:00
|
|
|
static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());
|
|
|
|
// We can't calculate offset from frame pointer if the stack is realigned,
|
2012-07-10 17:45:53 +00:00
|
|
|
// so enforce usage of stack/base pointer. The base pointer is used when we
|
|
|
|
// have dynamic allocas in addition to dynamic realignment.
|
|
|
|
if (RegInfo->hasBasePointer(MF))
|
|
|
|
FrameReg = RegInfo->getBaseRegister();
|
|
|
|
else if (RegInfo->needsStackRealignment(MF))
|
|
|
|
FrameReg = RegInfo->getStackRegister();
|
|
|
|
else
|
|
|
|
FrameReg = RegInfo->getFrameRegister(MF);
|
2012-05-01 15:16:06 +00:00
|
|
|
return getFrameIndexOffset(MF, FI);
|
|
|
|
}
|
|
|
|
|
2011-01-10 12:39:04 +00:00
|
|
|
bool X86FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
|
2010-11-27 23:05:03 +00:00
|
|
|
MachineBasicBlock::iterator MI,
|
|
|
|
const std::vector<CalleeSavedInfo> &CSI,
|
|
|
|
const TargetRegisterInfo *TRI) const {
|
|
|
|
if (CSI.empty())
|
|
|
|
return false;
|
|
|
|
|
|
|
|
DebugLoc DL = MBB.findDebugLoc(MI);
|
|
|
|
|
|
|
|
MachineFunction &MF = *MBB.getParent();
|
|
|
|
|
|
|
|
unsigned SlotSize = STI.is64Bit() ? 8 : 4;
|
|
|
|
unsigned FPReg = TRI->getFrameRegister(MF);
|
|
|
|
unsigned CalleeFrameSize = 0;
|
|
|
|
|
|
|
|
const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
|
|
|
|
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
|
|
|
|
|
2011-02-27 08:47:19 +00:00
|
|
|
// Push GPRs. It increases frame size.
|
2010-11-27 23:05:03 +00:00
|
|
|
unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
|
|
|
|
for (unsigned i = CSI.size(); i != 0; --i) {
|
|
|
|
unsigned Reg = CSI[i-1].getReg();
|
2011-02-27 08:47:19 +00:00
|
|
|
if (!X86::GR64RegClass.contains(Reg) &&
|
|
|
|
!X86::GR32RegClass.contains(Reg))
|
|
|
|
continue;
|
2010-11-27 23:05:03 +00:00
|
|
|
// Add the callee-saved register as live-in. It's killed at the spill.
|
|
|
|
MBB.addLiveIn(Reg);
|
|
|
|
if (Reg == FPReg)
|
|
|
|
// X86RegisterInfo::emitPrologue will handle spilling of frame register.
|
|
|
|
continue;
|
2011-02-27 08:47:19 +00:00
|
|
|
CalleeFrameSize += SlotSize;
|
2011-06-12 01:45:54 +00:00
|
|
|
BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, RegState::Kill)
|
|
|
|
.setMIFlag(MachineInstr::FrameSetup);
|
2010-11-27 23:05:03 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
X86FI->setCalleeSavedFrameSize(CalleeFrameSize);
|
2011-02-27 08:47:19 +00:00
|
|
|
|
|
|
|
// Make XMM regs spilled. X86 does not have ability of push/pop XMM.
|
|
|
|
// It can be done by spilling XMMs to stack frame.
|
|
|
|
// Note that only Win64 ABI might spill XMMs.
|
|
|
|
for (unsigned i = CSI.size(); i != 0; --i) {
|
|
|
|
unsigned Reg = CSI[i-1].getReg();
|
|
|
|
if (X86::GR64RegClass.contains(Reg) ||
|
|
|
|
X86::GR32RegClass.contains(Reg))
|
|
|
|
continue;
|
|
|
|
// Add the callee-saved register as live-in. It's killed at the spill.
|
|
|
|
MBB.addLiveIn(Reg);
|
|
|
|
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
|
|
|
|
TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i-1].getFrameIdx(),
|
|
|
|
RC, TRI);
|
|
|
|
}
|
|
|
|
|
2010-11-27 23:05:03 +00:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2011-01-10 12:39:04 +00:00
|
|
|
bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
|
2010-11-27 23:05:03 +00:00
|
|
|
MachineBasicBlock::iterator MI,
|
|
|
|
const std::vector<CalleeSavedInfo> &CSI,
|
|
|
|
const TargetRegisterInfo *TRI) const {
|
|
|
|
if (CSI.empty())
|
|
|
|
return false;
|
|
|
|
|
|
|
|
DebugLoc DL = MBB.findDebugLoc(MI);
|
|
|
|
|
|
|
|
MachineFunction &MF = *MBB.getParent();
|
|
|
|
const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
|
2011-02-27 08:47:19 +00:00
|
|
|
|
|
|
|
// Reload XMMs from stack frame.
|
|
|
|
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
|
|
|
|
unsigned Reg = CSI[i].getReg();
|
|
|
|
if (X86::GR64RegClass.contains(Reg) ||
|
|
|
|
X86::GR32RegClass.contains(Reg))
|
|
|
|
continue;
|
|
|
|
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
|
|
|
|
TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(),
|
|
|
|
RC, TRI);
|
|
|
|
}
|
|
|
|
|
|
|
|
// POP GPRs.
|
2010-11-27 23:05:03 +00:00
|
|
|
unsigned FPReg = TRI->getFrameRegister(MF);
|
|
|
|
unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
|
|
|
|
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
|
|
|
|
unsigned Reg = CSI[i].getReg();
|
2011-02-27 08:47:19 +00:00
|
|
|
if (!X86::GR64RegClass.contains(Reg) &&
|
|
|
|
!X86::GR32RegClass.contains(Reg))
|
|
|
|
continue;
|
2010-11-27 23:05:03 +00:00
|
|
|
if (Reg == FPReg)
|
|
|
|
// X86RegisterInfo::emitEpilogue will handle restoring of frame register.
|
|
|
|
continue;
|
2011-02-27 08:47:19 +00:00
|
|
|
BuildMI(MBB, MI, DL, TII.get(Opc), Reg);
|
2010-11-27 23:05:03 +00:00
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
2010-11-27 23:05:25 +00:00
|
|
|
|
|
|
|
void
|
2011-01-10 12:39:04 +00:00
|
|
|
X86FrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
|
2010-11-27 23:05:25 +00:00
|
|
|
RegScavenger *RS) const {
|
|
|
|
MachineFrameInfo *MFI = MF.getFrameInfo();
|
|
|
|
const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
|
|
|
|
unsigned SlotSize = RegInfo->getSlotSize();
|
|
|
|
|
|
|
|
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
|
|
|
|
int32_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
|
|
|
|
|
|
|
|
if (TailCallReturnAddrDelta < 0) {
|
|
|
|
// create RETURNADDR area
|
|
|
|
// arg
|
|
|
|
// arg
|
|
|
|
// RETADDR
|
|
|
|
// { ...
|
|
|
|
// RETADDR area
|
|
|
|
// ...
|
|
|
|
// }
|
|
|
|
// [EBP]
|
|
|
|
MFI->CreateFixedObject(-TailCallReturnAddrDelta,
|
|
|
|
(-1U*SlotSize)+TailCallReturnAddrDelta, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (hasFP(MF)) {
|
|
|
|
assert((TailCallReturnAddrDelta <= 0) &&
|
|
|
|
"The Delta should always be zero or negative");
|
2011-01-10 12:39:04 +00:00
|
|
|
const TargetFrameLowering &TFI = *MF.getTarget().getFrameLowering();
|
2010-11-27 23:05:25 +00:00
|
|
|
|
|
|
|
// Create a frame entry for the EBP register that must be saved.
|
|
|
|
int FrameIdx = MFI->CreateFixedObject(SlotSize,
|
|
|
|
-(int)SlotSize +
|
|
|
|
TFI.getOffsetOfLocalArea() +
|
|
|
|
TailCallReturnAddrDelta,
|
|
|
|
true);
|
|
|
|
assert(FrameIdx == MFI->getObjectIndexBegin() &&
|
|
|
|
"Slot for EBP register must be last in order to be found!");
|
2011-10-18 12:44:00 +00:00
|
|
|
(void)FrameIdx;
|
2010-11-27 23:05:25 +00:00
|
|
|
}
|
2012-07-10 17:45:53 +00:00
|
|
|
|
|
|
|
// Spill the BasePtr if it's used.
|
|
|
|
if (RegInfo->hasBasePointer(MF))
|
|
|
|
MF.getRegInfo().setPhysRegUsed(RegInfo->getBaseRegister());
|
2010-11-27 23:05:25 +00:00
|
|
|
}
|
2011-08-30 19:39:58 +00:00
|
|
|
|
|
|
|
static bool
|
|
|
|
HasNestArgument(const MachineFunction *MF) {
|
|
|
|
const Function *F = MF->getFunction();
|
|
|
|
for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
|
|
|
|
I != E; I++) {
|
|
|
|
if (I->hasNestAttr())
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2013-02-18 20:55:12 +00:00
|
|
|
/// GetScratchRegister - Get a temp register for performing work in the
|
|
|
|
/// segmented stack and the Erlang/HiPE stack prologue. Depending on platform
|
|
|
|
/// and the properties of the function either one or two registers will be
|
|
|
|
/// needed. Set primary to true for the first register, false for the second.
|
2011-08-30 19:39:58 +00:00
|
|
|
static unsigned
|
2012-01-11 19:00:37 +00:00
|
|
|
GetScratchRegister(bool Is64Bit, const MachineFunction &MF, bool Primary) {
|
2013-02-18 20:55:12 +00:00
|
|
|
CallingConv::ID CallingConvention = MF.getFunction()->getCallingConv();
|
|
|
|
|
|
|
|
// Erlang stuff.
|
|
|
|
if (CallingConvention == CallingConv::HiPE) {
|
|
|
|
if (Is64Bit)
|
|
|
|
return Primary ? X86::R14 : X86::R13;
|
|
|
|
else
|
|
|
|
return Primary ? X86::EBX : X86::EDI;
|
|
|
|
}
|
|
|
|
|
2012-01-20 21:51:11 +00:00
|
|
|
if (Is64Bit)
|
2012-01-11 19:00:37 +00:00
|
|
|
return Primary ? X86::R11 : X86::R12;
|
2012-01-20 21:51:11 +00:00
|
|
|
|
|
|
|
bool IsNested = HasNestArgument(&MF);
|
|
|
|
|
|
|
|
if (CallingConvention == CallingConv::X86_FastCall ||
|
|
|
|
CallingConvention == CallingConv::Fast) {
|
|
|
|
if (IsNested)
|
|
|
|
report_fatal_error("Segmented stacks does not support fastcall with "
|
|
|
|
"nested function.");
|
|
|
|
return Primary ? X86::EAX : X86::ECX;
|
2011-08-30 19:39:58 +00:00
|
|
|
}
|
2012-01-20 21:51:11 +00:00
|
|
|
if (IsNested)
|
|
|
|
return Primary ? X86::EDX : X86::EAX;
|
|
|
|
return Primary ? X86::ECX : X86::EAX;
|
2011-08-30 19:39:58 +00:00
|
|
|
}
|
|
|
|
|
2011-12-03 09:32:07 +00:00
|
|
|
// The stack limit in the TCB is set to this many bytes above the actual stack
|
|
|
|
// limit.
|
|
|
|
static const uint64_t kSplitStackAvailable = 256;
|
|
|
|
|
2011-08-30 19:39:58 +00:00
|
|
|
void
|
|
|
|
X86FrameLowering::adjustForSegmentedStacks(MachineFunction &MF) const {
|
|
|
|
MachineBasicBlock &prologueMBB = MF.front();
|
|
|
|
MachineFrameInfo *MFI = MF.getFrameInfo();
|
|
|
|
const X86InstrInfo &TII = *TM.getInstrInfo();
|
|
|
|
uint64_t StackSize;
|
|
|
|
bool Is64Bit = STI.is64Bit();
|
|
|
|
unsigned TlsReg, TlsOffset;
|
|
|
|
DebugLoc DL;
|
|
|
|
|
2012-01-11 19:00:37 +00:00
|
|
|
unsigned ScratchReg = GetScratchRegister(Is64Bit, MF, true);
|
2011-08-30 19:39:58 +00:00
|
|
|
assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
|
|
|
|
"Scratch register is live-in");
|
|
|
|
|
|
|
|
if (MF.getFunction()->isVarArg())
|
|
|
|
report_fatal_error("Segmented stacks do not support vararg functions.");
|
2013-02-19 17:32:57 +00:00
|
|
|
if (!STI.isTargetLinux() && !STI.isTargetDarwin() &&
|
|
|
|
!STI.isTargetWin32() && !STI.isTargetFreeBSD())
|
2012-01-12 20:24:30 +00:00
|
|
|
report_fatal_error("Segmented stacks not supported on this platform.");
|
2011-08-30 19:39:58 +00:00
|
|
|
|
|
|
|
MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
|
|
|
|
MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
|
|
|
|
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
|
|
|
|
bool IsNested = false;
|
|
|
|
|
|
|
|
// We need to know if the function has a nest argument only in 64 bit mode.
|
|
|
|
if (Is64Bit)
|
|
|
|
IsNested = HasNestArgument(&MF);
|
|
|
|
|
2011-10-13 08:24:19 +00:00
|
|
|
// The MOV R10, RAX needs to be in a different block, since the RET we emit in
|
|
|
|
// allocMBB needs to be last (terminating) instruction.
|
|
|
|
|
2011-08-30 19:39:58 +00:00
|
|
|
for (MachineBasicBlock::livein_iterator i = prologueMBB.livein_begin(),
|
|
|
|
e = prologueMBB.livein_end(); i != e; i++) {
|
|
|
|
allocMBB->addLiveIn(*i);
|
|
|
|
checkMBB->addLiveIn(*i);
|
|
|
|
}
|
|
|
|
|
2011-10-26 21:12:27 +00:00
|
|
|
if (IsNested)
|
2011-08-30 19:39:58 +00:00
|
|
|
allocMBB->addLiveIn(X86::R10);
|
|
|
|
|
|
|
|
MF.push_front(allocMBB);
|
|
|
|
MF.push_front(checkMBB);
|
|
|
|
|
|
|
|
// Eventually StackSize will be calculated by a link-time pass; which will
|
|
|
|
// also decide whether checking code needs to be injected into this particular
|
|
|
|
// prologue.
|
|
|
|
StackSize = MFI->getStackSize();
|
|
|
|
|
2012-01-11 19:00:37 +00:00
|
|
|
// When the frame size is less than 256 we just compare the stack
|
|
|
|
// boundary directly to the value of the stack pointer, per gcc.
|
|
|
|
bool CompareStackPointer = StackSize < kSplitStackAvailable;
|
|
|
|
|
2011-08-30 19:39:58 +00:00
|
|
|
// Read the limit off the current stacklet off the stack_guard location.
|
|
|
|
if (Is64Bit) {
|
2013-02-19 17:32:57 +00:00
|
|
|
if (STI.isTargetLinux()) {
|
2012-01-11 19:00:37 +00:00
|
|
|
TlsReg = X86::FS;
|
|
|
|
TlsOffset = 0x70;
|
2013-02-19 17:32:57 +00:00
|
|
|
} else if (STI.isTargetDarwin()) {
|
2012-01-11 19:00:37 +00:00
|
|
|
TlsReg = X86::GS;
|
|
|
|
TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90.
|
2013-02-19 17:32:57 +00:00
|
|
|
} else if (STI.isTargetFreeBSD()) {
|
2012-01-12 20:24:30 +00:00
|
|
|
TlsReg = X86::FS;
|
|
|
|
TlsOffset = 0x18;
|
2012-01-12 20:22:08 +00:00
|
|
|
} else {
|
|
|
|
report_fatal_error("Segmented stacks not supported on this platform.");
|
2012-01-11 19:00:37 +00:00
|
|
|
}
|
2011-08-30 19:39:58 +00:00
|
|
|
|
2012-01-11 19:00:37 +00:00
|
|
|
if (CompareStackPointer)
|
2011-12-03 09:32:07 +00:00
|
|
|
ScratchReg = X86::RSP;
|
|
|
|
else
|
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::LEA64r), ScratchReg).addReg(X86::RSP)
|
2012-01-11 18:14:03 +00:00
|
|
|
.addImm(1).addReg(0).addImm(-StackSize).addReg(0);
|
2011-12-03 09:32:07 +00:00
|
|
|
|
2011-08-30 19:39:58 +00:00
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::CMP64rm)).addReg(ScratchReg)
|
2012-01-11 18:14:03 +00:00
|
|
|
.addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg);
|
2011-08-30 19:39:58 +00:00
|
|
|
} else {
|
2013-02-19 17:32:57 +00:00
|
|
|
if (STI.isTargetLinux()) {
|
2012-01-12 20:22:08 +00:00
|
|
|
TlsReg = X86::GS;
|
|
|
|
TlsOffset = 0x30;
|
2013-02-19 17:32:57 +00:00
|
|
|
} else if (STI.isTargetDarwin()) {
|
2012-01-12 20:22:08 +00:00
|
|
|
TlsReg = X86::GS;
|
|
|
|
TlsOffset = 0x48 + 90*4;
|
2013-02-19 17:32:57 +00:00
|
|
|
} else if (STI.isTargetWin32()) {
|
2012-01-12 20:22:08 +00:00
|
|
|
TlsReg = X86::FS;
|
|
|
|
TlsOffset = 0x14; // pvArbitrary, reserved for application use
|
2013-02-19 17:32:57 +00:00
|
|
|
} else if (STI.isTargetFreeBSD()) {
|
2012-01-12 20:24:30 +00:00
|
|
|
report_fatal_error("Segmented stacks not supported on FreeBSD i386.");
|
2012-01-12 20:22:08 +00:00
|
|
|
} else {
|
|
|
|
report_fatal_error("Segmented stacks not supported on this platform.");
|
|
|
|
}
|
2011-08-30 19:39:58 +00:00
|
|
|
|
2012-01-11 19:00:37 +00:00
|
|
|
if (CompareStackPointer)
|
2011-12-03 09:32:07 +00:00
|
|
|
ScratchReg = X86::ESP;
|
|
|
|
else
|
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
|
2012-01-11 18:14:03 +00:00
|
|
|
.addImm(1).addReg(0).addImm(-StackSize).addReg(0);
|
2011-12-03 09:32:07 +00:00
|
|
|
|
2013-02-19 17:32:57 +00:00
|
|
|
if (STI.isTargetLinux() || STI.isTargetWin32()) {
|
2012-01-11 19:00:37 +00:00
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg)
|
|
|
|
.addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg);
|
2013-02-19 17:32:57 +00:00
|
|
|
} else if (STI.isTargetDarwin()) {
|
2012-01-11 19:00:37 +00:00
|
|
|
|
|
|
|
// TlsOffset doesn't fit into a mod r/m byte so we need an extra register
|
|
|
|
unsigned ScratchReg2;
|
|
|
|
bool SaveScratch2;
|
|
|
|
if (CompareStackPointer) {
|
|
|
|
// The primary scratch register is available for holding the TLS offset
|
|
|
|
ScratchReg2 = GetScratchRegister(Is64Bit, MF, true);
|
|
|
|
SaveScratch2 = false;
|
|
|
|
} else {
|
|
|
|
// Need to use a second register to hold the TLS offset
|
|
|
|
ScratchReg2 = GetScratchRegister(Is64Bit, MF, false);
|
|
|
|
|
|
|
|
// Unfortunately, with fastcc the second scratch register may hold an arg
|
|
|
|
SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
|
|
|
|
}
|
|
|
|
|
|
|
|
// If Scratch2 is live-in then it needs to be saved
|
|
|
|
assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
|
|
|
|
"Scratch register is live-in and not saved");
|
|
|
|
|
|
|
|
if (SaveScratch2)
|
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))
|
|
|
|
.addReg(ScratchReg2, RegState::Kill);
|
|
|
|
|
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)
|
|
|
|
.addImm(TlsOffset);
|
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))
|
|
|
|
.addReg(ScratchReg)
|
|
|
|
.addReg(ScratchReg2).addImm(1).addReg(0)
|
|
|
|
.addImm(0)
|
|
|
|
.addReg(TlsReg);
|
|
|
|
|
|
|
|
if (SaveScratch2)
|
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);
|
|
|
|
}
|
2011-08-30 19:39:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// This jump is taken if SP >= (Stacklet Limit + Stack Space required).
|
|
|
|
// It jumps to normal execution of the function body.
|
2012-01-11 18:23:35 +00:00
|
|
|
BuildMI(checkMBB, DL, TII.get(X86::JA_4)).addMBB(&prologueMBB);
|
2011-08-30 19:39:58 +00:00
|
|
|
|
|
|
|
// On 32 bit we first push the arguments size and then the frame size. On 64
|
|
|
|
// bit, we pass the stack frame size in r10 and the argument size in r11.
|
|
|
|
if (Is64Bit) {
|
|
|
|
// Functions with nested arguments use R10, so it needs to be saved across
|
|
|
|
// the call to _morestack
|
|
|
|
|
|
|
|
if (IsNested)
|
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::MOV64rr), X86::RAX).addReg(X86::R10);
|
|
|
|
|
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::MOV64ri), X86::R10)
|
|
|
|
.addImm(StackSize);
|
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::MOV64ri), X86::R11)
|
|
|
|
.addImm(X86FI->getArgumentStackSize());
|
|
|
|
MF.getRegInfo().setPhysRegUsed(X86::R10);
|
|
|
|
MF.getRegInfo().setPhysRegUsed(X86::R11);
|
|
|
|
} else {
|
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
|
|
|
|
.addImm(X86FI->getArgumentStackSize());
|
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
|
|
|
|
.addImm(StackSize);
|
|
|
|
}
|
|
|
|
|
|
|
|
// __morestack is in libgcc
|
|
|
|
if (Is64Bit)
|
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))
|
|
|
|
.addExternalSymbol("__morestack");
|
|
|
|
else
|
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))
|
|
|
|
.addExternalSymbol("__morestack");
|
|
|
|
|
2011-10-13 08:24:19 +00:00
|
|
|
if (IsNested)
|
2011-10-26 21:12:27 +00:00
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));
|
|
|
|
else
|
|
|
|
BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));
|
2011-08-30 19:39:58 +00:00
|
|
|
|
2011-10-26 21:12:27 +00:00
|
|
|
allocMBB->addSuccessor(&prologueMBB);
|
2011-10-13 07:42:32 +00:00
|
|
|
|
2011-08-30 19:39:58 +00:00
|
|
|
checkMBB->addSuccessor(allocMBB);
|
|
|
|
checkMBB->addSuccessor(&prologueMBB);
|
|
|
|
|
2011-09-24 01:11:19 +00:00
|
|
|
#ifdef XDEBUG
|
2011-08-30 19:39:58 +00:00
|
|
|
MF.verify();
|
|
|
|
#endif
|
|
|
|
}
|
2013-02-18 20:55:12 +00:00
|
|
|
|
2013-02-28 16:59:10 +00:00
|
|
|
/// Erlang programs may need a special prologue to handle the stack size they
|
|
|
|
/// might need at runtime. That is because Erlang/OTP does not implement a C
|
|
|
|
/// stack but uses a custom implementation of hybrid stack/heap architecture.
|
|
|
|
/// (for more information see Eric Stenman's Ph.D. thesis:
|
|
|
|
/// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf)
|
|
|
|
///
|
|
|
|
/// CheckStack:
|
|
|
|
/// temp0 = sp - MaxStack
|
|
|
|
/// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
|
|
|
|
/// OldStart:
|
|
|
|
/// ...
|
|
|
|
/// IncStack:
|
|
|
|
/// call inc_stack # doubles the stack space
|
|
|
|
/// temp0 = sp - MaxStack
|
|
|
|
/// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
|
2013-02-18 20:55:12 +00:00
|
|
|
void X86FrameLowering::adjustForHiPEPrologue(MachineFunction &MF) const {
|
|
|
|
const X86InstrInfo &TII = *TM.getInstrInfo();
|
|
|
|
MachineFrameInfo *MFI = MF.getFrameInfo();
|
2013-02-19 17:32:57 +00:00
|
|
|
const unsigned SlotSize = TM.getRegisterInfo()->getSlotSize();
|
2013-02-18 20:55:12 +00:00
|
|
|
const bool Is64Bit = STI.is64Bit();
|
|
|
|
DebugLoc DL;
|
|
|
|
// HiPE-specific values
|
|
|
|
const unsigned HipeLeafWords = 24;
|
|
|
|
const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5;
|
|
|
|
const unsigned Guaranteed = HipeLeafWords * SlotSize;
|
2013-02-19 17:32:57 +00:00
|
|
|
unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ?
|
|
|
|
MF.getFunction()->arg_size() - CCRegisteredArgs : 0;
|
|
|
|
unsigned MaxStack = MFI->getStackSize() + CallerStkArity*SlotSize + SlotSize;
|
2013-02-18 20:55:12 +00:00
|
|
|
|
2013-02-19 17:32:57 +00:00
|
|
|
assert(STI.isTargetLinux() &&
|
2013-02-18 20:55:12 +00:00
|
|
|
"HiPE prologue is only supported on Linux operating systems.");
|
|
|
|
|
|
|
|
// Compute the largest caller's frame that is needed to fit the callees'
|
|
|
|
// frames. This 'MaxStack' is computed from:
|
|
|
|
//
|
|
|
|
// a) the fixed frame size, which is the space needed for all spilled temps,
|
|
|
|
// b) outgoing on-stack parameter areas, and
|
|
|
|
// c) the minimum stack space this function needs to make available for the
|
|
|
|
// functions it calls (a tunable ABI property).
|
|
|
|
if (MFI->hasCalls()) {
|
|
|
|
unsigned MoreStackForCalls = 0;
|
|
|
|
|
|
|
|
for (MachineFunction::iterator MBBI = MF.begin(), MBBE = MF.end();
|
|
|
|
MBBI != MBBE; ++MBBI)
|
|
|
|
for (MachineBasicBlock::iterator MI = MBBI->begin(), ME = MBBI->end();
|
2013-02-19 17:32:57 +00:00
|
|
|
MI != ME; ++MI) {
|
|
|
|
if (!MI->isCall())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// Get callee operand.
|
|
|
|
const MachineOperand &MO = MI->getOperand(0);
|
|
|
|
|
|
|
|
// Only take account of global function calls (no closures etc.).
|
|
|
|
if (!MO.isGlobal())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
const Function *F = dyn_cast<Function>(MO.getGlobal());
|
|
|
|
if (!F)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
// Do not update 'MaxStack' for primitive and built-in functions
|
|
|
|
// (encoded with names either starting with "erlang."/"bif_" or not
|
|
|
|
// having a ".", such as a simple <Module>.<Function>.<Arity>, or an
|
|
|
|
// "_", such as the BIF "suspend_0") as they are executed on another
|
|
|
|
// stack.
|
|
|
|
if (F->getName().find("erlang.") != StringRef::npos ||
|
|
|
|
F->getName().find("bif_") != StringRef::npos ||
|
|
|
|
F->getName().find_first_of("._") == StringRef::npos)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
unsigned CalleeStkArity =
|
|
|
|
F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0;
|
|
|
|
if (HipeLeafWords - 1 > CalleeStkArity)
|
|
|
|
MoreStackForCalls = std::max(MoreStackForCalls,
|
|
|
|
(HipeLeafWords - 1 - CalleeStkArity) * SlotSize);
|
|
|
|
}
|
2013-02-18 20:55:12 +00:00
|
|
|
MaxStack += MoreStackForCalls;
|
|
|
|
}
|
|
|
|
|
|
|
|
// If the stack frame needed is larger than the guaranteed then runtime checks
|
|
|
|
// and calls to "inc_stack_0" BIF should be inserted in the assembly prologue.
|
|
|
|
if (MaxStack > Guaranteed) {
|
|
|
|
MachineBasicBlock &prologueMBB = MF.front();
|
|
|
|
MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
|
|
|
|
MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
|
|
|
|
|
|
|
|
for (MachineBasicBlock::livein_iterator I = prologueMBB.livein_begin(),
|
|
|
|
E = prologueMBB.livein_end(); I != E; I++) {
|
|
|
|
stackCheckMBB->addLiveIn(*I);
|
|
|
|
incStackMBB->addLiveIn(*I);
|
|
|
|
}
|
|
|
|
|
|
|
|
MF.push_front(incStackMBB);
|
|
|
|
MF.push_front(stackCheckMBB);
|
|
|
|
|
|
|
|
unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
|
|
|
|
unsigned LEAop, CMPop, CALLop;
|
|
|
|
if (Is64Bit) {
|
|
|
|
SPReg = X86::RSP;
|
|
|
|
PReg = X86::RBP;
|
|
|
|
LEAop = X86::LEA64r;
|
|
|
|
CMPop = X86::CMP64rm;
|
|
|
|
CALLop = X86::CALL64pcrel32;
|
|
|
|
SPLimitOffset = 0x90;
|
|
|
|
} else {
|
|
|
|
SPReg = X86::ESP;
|
|
|
|
PReg = X86::EBP;
|
|
|
|
LEAop = X86::LEA32r;
|
|
|
|
CMPop = X86::CMP32rm;
|
|
|
|
CALLop = X86::CALLpcrel32;
|
|
|
|
SPLimitOffset = 0x4c;
|
|
|
|
}
|
|
|
|
|
|
|
|
ScratchReg = GetScratchRegister(Is64Bit, MF, true);
|
|
|
|
assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
|
|
|
|
"HiPE prologue scratch register is live-in");
|
|
|
|
|
|
|
|
// Create new MBB for StackCheck:
|
|
|
|
addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg),
|
|
|
|
SPReg, false, -MaxStack);
|
|
|
|
// SPLimitOffset is in a fixed heap location (pointed by BP).
|
|
|
|
addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop))
|
|
|
|
.addReg(ScratchReg), PReg, false, SPLimitOffset);
|
|
|
|
BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_4)).addMBB(&prologueMBB);
|
|
|
|
|
|
|
|
// Create new MBB for IncStack:
|
|
|
|
BuildMI(incStackMBB, DL, TII.get(CALLop)).
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addExternalSymbol("inc_stack_0");
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addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg),
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SPReg, false, -MaxStack);
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addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop))
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|
.addReg(ScratchReg), PReg, false, SPLimitOffset);
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BuildMI(incStackMBB, DL, TII.get(X86::JLE_4)).addMBB(incStackMBB);
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|
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stackCheckMBB->addSuccessor(&prologueMBB, 99);
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stackCheckMBB->addSuccessor(incStackMBB, 1);
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incStackMBB->addSuccessor(&prologueMBB, 99);
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incStackMBB->addSuccessor(incStackMBB, 1);
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}
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|
#ifdef XDEBUG
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|
MF.verify();
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|
#endif
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|
}
|
2013-02-21 20:05:00 +00:00
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|
void X86FrameLowering::
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|
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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|
|
|
MachineBasicBlock::iterator I) const {
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|
|
|
const X86InstrInfo &TII = *TM.getInstrInfo();
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|
|
|
const X86RegisterInfo &RegInfo = *TM.getRegisterInfo();
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|
|
unsigned StackPtr = RegInfo.getStackRegister();
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|
|
|
bool reseveCallFrame = hasReservedCallFrame(MF);
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|
|
int Opcode = I->getOpcode();
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|
|
bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
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|
|
bool IsLP64 = STI.isTarget64BitLP64();
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|
|
|
DebugLoc DL = I->getDebugLoc();
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|
|
|
uint64_t Amount = !reseveCallFrame ? I->getOperand(0).getImm() : 0;
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|
|
|
uint64_t CalleeAmt = isDestroy ? I->getOperand(1).getImm() : 0;
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|
|
I = MBB.erase(I);
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|
|
|
|
|
|
|
if (!reseveCallFrame) {
|
|
|
|
// If the stack pointer can be changed after prologue, turn the
|
|
|
|
// adjcallstackup instruction into a 'sub ESP, <amt>' and the
|
|
|
|
// adjcallstackdown instruction into 'add ESP, <amt>'
|
|
|
|
// TODO: consider using push / pop instead of sub + store / add
|
|
|
|
if (Amount == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
// We need to keep the stack aligned properly. To do this, we round the
|
|
|
|
// amount of space needed for the outgoing arguments up to the next
|
|
|
|
// alignment boundary.
|
|
|
|
unsigned StackAlign = TM.getFrameLowering()->getStackAlignment();
|
|
|
|
Amount = (Amount + StackAlign - 1) / StackAlign * StackAlign;
|
|
|
|
|
|
|
|
MachineInstr *New = 0;
|
|
|
|
if (Opcode == TII.getCallFrameSetupOpcode()) {
|
|
|
|
New = BuildMI(MF, DL, TII.get(getSUBriOpcode(IsLP64, Amount)),
|
|
|
|
StackPtr)
|
|
|
|
.addReg(StackPtr)
|
|
|
|
.addImm(Amount);
|
|
|
|
} else {
|
|
|
|
assert(Opcode == TII.getCallFrameDestroyOpcode());
|
|
|
|
|
|
|
|
// Factor out the amount the callee already popped.
|
|
|
|
Amount -= CalleeAmt;
|
|
|
|
|
|
|
|
if (Amount) {
|
|
|
|
unsigned Opc = getADDriOpcode(IsLP64, Amount);
|
|
|
|
New = BuildMI(MF, DL, TII.get(Opc), StackPtr)
|
|
|
|
.addReg(StackPtr).addImm(Amount);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (New) {
|
|
|
|
// The EFLAGS implicit def is dead.
|
|
|
|
New->getOperand(3).setIsDead();
|
|
|
|
|
|
|
|
// Replace the pseudo instruction with a new instruction.
|
|
|
|
MBB.insert(I, New);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Opcode == TII.getCallFrameDestroyOpcode() && CalleeAmt) {
|
|
|
|
// If we are performing frame pointer elimination and if the callee pops
|
|
|
|
// something off the stack pointer, add it back. We do this until we have
|
|
|
|
// more advanced stack pointer tracking ability.
|
|
|
|
unsigned Opc = getSUBriOpcode(IsLP64, CalleeAmt);
|
|
|
|
MachineInstr *New = BuildMI(MF, DL, TII.get(Opc), StackPtr)
|
|
|
|
.addReg(StackPtr).addImm(CalleeAmt);
|
|
|
|
|
|
|
|
// The EFLAGS implicit def is dead.
|
|
|
|
New->getOperand(3).setIsDead();
|
|
|
|
|
|
|
|
// We are not tracking the stack pointer adjustment by the callee, so make
|
|
|
|
// sure we restore the stack pointer immediately after the call, there may
|
|
|
|
// be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
|
|
|
|
MachineBasicBlock::iterator B = MBB.begin();
|
|
|
|
while (I != B && !llvm::prior(I)->isCall())
|
|
|
|
--I;
|
|
|
|
MBB.insert(I, New);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|