llvm-6502/test/CodeGen/XCore/licm-ldwcp.ll

; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s

; MachineLICM should hoist the LDWCP out of the loop.

; CHECK: f:
; CHECK-NEXT: ldw [[REG:r[0-9]+]], cp[.LCPI0_0]
; CHECK-NEXT: .LBB0_1:
; CHECK-NEXT: stw [[REG]], r0[0]
; CHECK-NEXT: bu .LBB0_1

define void @f(i32* nocapture %p) noreturn nounwind {
entry:
  br label %bb

bb:                                               ; preds = %bb, %entry
  store volatile i32 525509670, i32* %p, align 4
  br label %bb
}
Associate a MemOperand with LDWCP nodes introduced during ISel. This information is required if we want LDWCP to be hoisted out of loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139495 91177308-0d34-0410-b5e6-96231b3b80d8 2011-09-12 14:43:23 +00:00			`; RUN: llc < %s -march=xcore -asm-verbose=0 \| FileCheck %s`

			`; MachineLICM should hoist the LDWCP out of the loop.`

			`; CHECK: f:`
			`; CHECK-NEXT: ldw [[REG:r[0-9]+]], cp[.LCPI0_0]`
			`; CHECK-NEXT: .LBB0_1:`
			`; CHECK-NEXT: stw [[REG]], r0[0]`
			`; CHECK-NEXT: bu .LBB0_1`

			`define void @f(i32* nocapture %p) noreturn nounwind {`
			`entry:`
			`br label %bb`

			`bb: ; preds = %bb, %entry`
Upgrade syntax of tests using volatile instructions to use 'load volatile' instead of 'volatile load', which is archaic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145171 91177308-0d34-0410-b5e6-96231b3b80d8 2011-11-27 06:54:59 +00:00			`store volatile i32 525509670, i32* %p, align 4`
Associate a MemOperand with LDWCP nodes introduced during ISel. This information is required if we want LDWCP to be hoisted out of loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139495 91177308-0d34-0410-b5e6-96231b3b80d8 2011-09-12 14:43:23 +00:00			`br label %bb`
			`}`