2014-05-30 10:09:59 +00:00
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; RUN: llc -mtriple=arm-eabi -arm-atomic-cfg-tidy=0 %s -o - | FileCheck -check-prefix=ARM %s
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; RUN: llc -mtriple=thumb-eabi -arm-atomic-cfg-tidy=0 %s -o - | FileCheck -check-prefix=THUMB %s
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; RUN: llc -mtriple=thumb-eabi -arm-atomic-cfg-tidy=0 -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - \
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2013-12-13 11:16:00 +00:00
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; RUN: | FileCheck -check-prefix=T2 %s
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2014-05-30 10:09:59 +00:00
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; RUN: llc -mtriple=thumbv8-eabi -arm-atomic-cfg-tidy=0 %s -o - | FileCheck -check-prefix=V8 %s
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When we look at instructions to convert to setting the 's' flag, we need to look
at more than those which define CPSR. You can have this situation:
(1) subs ...
(2) sub r6, r5, r4
(3) movge ...
(4) cmp r6, 0
(5) movge ...
We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:
(1) sub r1, r2, r3
(2) sub r4, r5, r6
(3) cmp r4, ...
(5) movge ...
(6) cmp r1, ...
(7) movge ...
We cannot convert (1) to "subs" because of the intervening use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 20:41:43 +00:00
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; FIXME: The -march=thumb test doesn't change if -disable-peephole is specified.
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2010-09-14 08:50:43 +00:00
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%struct.Foo = type { i8* }
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When we look at instructions to convert to setting the 's' flag, we need to look
at more than those which define CPSR. You can have this situation:
(1) subs ...
(2) sub r6, r5, r4
(3) movge ...
(4) cmp r6, 0
(5) movge ...
We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:
(1) sub r1, r2, r3
(2) sub r4, r5, r6
(3) cmp r4, ...
(5) movge ...
(6) cmp r1, ...
(7) movge ...
We cannot convert (1) to "subs" because of the intervening use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 20:41:43 +00:00
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; ARM: foo
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; THUMB: foo
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; T2: foo
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define %struct.Foo* @foo(%struct.Foo* %this, i32 %acc) nounwind readonly align 2 {
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2010-09-14 08:50:43 +00:00
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entry:
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%scevgep = getelementptr %struct.Foo* %this, i32 1
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br label %tailrecurse
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tailrecurse: ; preds = %sw.bb, %entry
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%lsr.iv2 = phi %struct.Foo* [ %scevgep3, %sw.bb ], [ %scevgep, %entry ]
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%lsr.iv = phi i32 [ %lsr.iv.next, %sw.bb ], [ 1, %entry ]
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%acc.tr = phi i32 [ %or, %sw.bb ], [ %acc, %entry ]
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%lsr.iv24 = bitcast %struct.Foo* %lsr.iv2 to i8**
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%scevgep5 = getelementptr i8** %lsr.iv24, i32 -1
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%tmp2 = load i8** %scevgep5
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%0 = ptrtoint i8* %tmp2 to i32
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2011-04-30 01:37:52 +00:00
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; ARM: ands {{r[0-9]+}}, {{r[0-9]+}}, #3
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When we look at instructions to convert to setting the 's' flag, we need to look
at more than those which define CPSR. You can have this situation:
(1) subs ...
(2) sub r6, r5, r4
(3) movge ...
(4) cmp r6, 0
(5) movge ...
We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:
(1) sub r1, r2, r3
(2) sub r4, r5, r6
(3) cmp r4, ...
(5) movge ...
(6) cmp r1, ...
(7) movge ...
We cannot convert (1) to "subs" because of the intervening use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 20:41:43 +00:00
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; ARM-NEXT: beq
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2010-09-14 08:50:43 +00:00
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2011-03-31 22:14:03 +00:00
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; THUMB: movs r[[R0:[0-9]+]], #3
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; THUMB-NEXT: ands r[[R0]], r
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; THUMB-NEXT: cmp r[[R0]], #0
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2010-09-29 10:45:43 +00:00
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; THUMB-NEXT: beq
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2010-09-29 10:12:08 +00:00
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2011-04-30 01:37:52 +00:00
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; T2: ands {{r[0-9]+}}, {{r[0-9]+}}, #3
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2010-09-29 10:45:43 +00:00
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; T2-NEXT: beq
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2010-09-14 08:50:43 +00:00
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%and = and i32 %0, 3
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%tst = icmp eq i32 %and, 0
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br i1 %tst, label %sw.bb, label %tailrecurse.switch
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tailrecurse.switch: ; preds = %tailrecurse
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2013-09-09 14:21:49 +00:00
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; V8-LABEL: %tailrecurse.switch
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; V8: cmp
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; V8-NEXT: beq
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; V8-NEXT: %tailrecurse.switch
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; V8: cmp
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; V8-NEXT: beq
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; V8-NEXT: %tailrecurse.switch
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; V8: cmp
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; V8-NEXT: beq
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; V8-NEXT: b
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; The trailing space in the last line checks that the branch is unconditional
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2010-09-14 08:50:43 +00:00
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switch i32 %and, label %sw.epilog [
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i32 1, label %sw.bb
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i32 3, label %sw.bb6
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i32 2, label %sw.bb8
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]
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sw.bb: ; preds = %tailrecurse.switch, %tailrecurse
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%shl = shl i32 %acc.tr, 1
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%or = or i32 %and, %shl
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%lsr.iv.next = add i32 %lsr.iv, 1
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%scevgep3 = getelementptr %struct.Foo* %lsr.iv2, i32 1
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br label %tailrecurse
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sw.bb6: ; preds = %tailrecurse.switch
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ret %struct.Foo* %lsr.iv2
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sw.bb8: ; preds = %tailrecurse.switch
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%tmp1 = add i32 %acc.tr, %lsr.iv
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%add.ptr11 = getelementptr inbounds %struct.Foo* %this, i32 %tmp1
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ret %struct.Foo* %add.ptr11
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sw.epilog: ; preds = %tailrecurse.switch
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ret %struct.Foo* undef
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}
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2010-10-15 03:23:44 +00:00
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; Another test that exercises the AND/TST peephole optimization and also
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; generates a predicated ANDS instruction. Check that the predicate is printed
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; after the "S" modifier on the instruction.
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%struct.S = type { i8* (i8*)*, [1 x i8] }
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When we look at instructions to convert to setting the 's' flag, we need to look
at more than those which define CPSR. You can have this situation:
(1) subs ...
(2) sub r6, r5, r4
(3) movge ...
(4) cmp r6, 0
(5) movge ...
We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:
(1) sub r1, r2, r3
(2) sub r4, r5, r6
(3) cmp r4, ...
(5) movge ...
(6) cmp r1, ...
(7) movge ...
We cannot convert (1) to "subs" because of the intervening use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 20:41:43 +00:00
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; ARM: bar
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2010-10-15 03:23:44 +00:00
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; THUMB: bar
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; T2: bar
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2013-09-09 14:21:49 +00:00
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; V8-LABEL: bar:
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2010-10-15 03:23:44 +00:00
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define internal zeroext i8 @bar(%struct.S* %x, %struct.S* nocapture %y) nounwind readonly {
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entry:
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%0 = getelementptr inbounds %struct.S* %x, i32 0, i32 1, i32 0
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%1 = load i8* %0, align 1
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%2 = zext i8 %1 to i32
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When we look at instructions to convert to setting the 's' flag, we need to look
at more than those which define CPSR. You can have this situation:
(1) subs ...
(2) sub r6, r5, r4
(3) movge ...
(4) cmp r6, 0
(5) movge ...
We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:
(1) sub r1, r2, r3
(2) sub r4, r5, r6
(3) cmp r4, ...
(5) movge ...
(6) cmp r1, ...
(7) movge ...
We cannot convert (1) to "subs" because of the intervening use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 20:41:43 +00:00
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; ARM: ands
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2010-10-15 03:23:44 +00:00
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; THUMB: ands
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; T2: ands
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2013-09-09 14:21:49 +00:00
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; V8: ands
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; V8-NEXT: beq
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2010-10-15 03:23:44 +00:00
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%3 = and i32 %2, 112
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%4 = icmp eq i32 %3, 0
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br i1 %4, label %return, label %bb
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bb: ; preds = %entry
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2013-09-09 14:21:49 +00:00
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; V8-NEXT: %bb
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2010-10-15 03:23:44 +00:00
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%5 = getelementptr inbounds %struct.S* %y, i32 0, i32 1, i32 0
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%6 = load i8* %5, align 1
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%7 = zext i8 %6 to i32
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When we look at instructions to convert to setting the 's' flag, we need to look
at more than those which define CPSR. You can have this situation:
(1) subs ...
(2) sub r6, r5, r4
(3) movge ...
(4) cmp r6, 0
(5) movge ...
We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:
(1) sub r1, r2, r3
(2) sub r4, r5, r6
(3) cmp r4, ...
(5) movge ...
(6) cmp r1, ...
(7) movge ...
We cannot convert (1) to "subs" because of the intervening use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-01 20:41:43 +00:00
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; ARM: andsne
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2010-10-15 03:23:44 +00:00
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; THUMB: ands
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; T2: andsne
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2013-09-09 14:21:49 +00:00
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; V8: ands
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; V8-NEXT: beq
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2010-10-15 03:23:44 +00:00
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%8 = and i32 %7, 112
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%9 = icmp eq i32 %8, 0
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br i1 %9, label %return, label %bb2
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bb2: ; preds = %bb
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2013-09-09 14:21:49 +00:00
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; V8-NEXT: %bb2
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; V8-NEXT: cmp
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; V8-NEXT: it ne
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; V8-NEXT: cmpne
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; V8-NEXT: bne
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2010-10-15 03:23:44 +00:00
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%10 = icmp eq i32 %3, 16
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%11 = icmp eq i32 %8, 16
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%or.cond = or i1 %10, %11
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br i1 %or.cond, label %bb4, label %return
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bb4: ; preds = %bb2
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%12 = ptrtoint %struct.S* %x to i32
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%phitmp = trunc i32 %12 to i8
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ret i8 %phitmp
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return: ; preds = %bb2, %bb, %entry
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ret i8 1
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}
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