mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
Fix 80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138356 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
726ebd6ff3
commit
1dafa70585
@ -5877,9 +5877,11 @@ void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
|
||||
|
||||
if (OpInfo.ConstraintVT != Input.ConstraintVT) {
|
||||
std::pair<unsigned, const TargetRegisterClass*> MatchRC =
|
||||
TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, OpInfo.ConstraintVT);
|
||||
TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
|
||||
OpInfo.ConstraintVT);
|
||||
std::pair<unsigned, const TargetRegisterClass*> InputRC =
|
||||
TLI.getRegForInlineAsmConstraint(Input.ConstraintCode, Input.ConstraintVT);
|
||||
TLI.getRegForInlineAsmConstraint(Input.ConstraintCode,
|
||||
Input.ConstraintVT);
|
||||
if ((OpInfo.ConstraintVT.isInteger() !=
|
||||
Input.ConstraintVT.isInteger()) ||
|
||||
(MatchRC.second != InputRC.second)) {
|
||||
|
Loading…
Reference in New Issue
Block a user