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Codegen pass definition cleanup. No functionality.

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Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.

While cleaning up declarations, cleaned up comments (sorry for large diff).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150100 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2012-02-08 21:23:13 +00:00
parent 9d41bd5c78
commit 1dd8c8560d
28 changed files with 176 additions and 256 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/llvm/CodeGen/LinkAllCodegenComponents.h
-2
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@@ -31,8 +31,6 @@ namespace {
if (std::getenv("bar") != (char*) -1)
return;
(void) llvm::createDeadMachineInstructionElimPass();
(void) llvm::createFastRegisterAllocator();
(void) llvm::createBasicRegisterAllocator();
(void) llvm::createGreedyRegisterAllocator();
include/llvm/CodeGen/Passes.h
+63 -77
View File
@@ -175,31 +175,25 @@ namespace llvm {
createMachineFunctionPrinterPass(raw_ostream &OS,
const std::string &Banner ="");
/// MachineLoopInfo pass - This pass is a loop analysis pass.
///
/// MachineLoopInfo - This pass is a loop analysis pass.
extern char &MachineLoopInfoID;
/// MachineLoopRanges pass - This pass is an on-demand loop coverage
/// analysis pass.
///
/// MachineLoopRanges - This pass is an on-demand loop coverage analysis.
extern char &MachineLoopRangesID;
/// MachineDominators pass - This pass is a machine dominators analysis pass.
///
/// MachineDominators - This pass is a machine dominators analysis pass.
extern char &MachineDominatorsID;
/// EdgeBundles analysis - Bundle machine CFG edges.
///
extern char &EdgeBundlesID;
/// PHIElimination pass - This pass eliminates machine instruction PHI nodes
/// PHIElimination - This pass eliminates machine instruction PHI nodes
/// by inserting copy instructions. This destroys SSA information, but is the
/// desired input for some register allocators. This pass is "required" by
/// these register allocator like this: AU.addRequiredID(PHIEliminationID);
///
extern char &PHIEliminationID;
/// StrongPHIElimination pass - This pass eliminates machine instruction PHI
/// StrongPHIElimination - This pass eliminates machine instruction PHI
/// nodes by inserting copy instructions. This destroys SSA information, but
/// is the desired input for some register allocators. This pass is
/// "required" by these register allocator like this:
@@ -210,30 +204,27 @@ namespace llvm {
/// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
extern char &LiveStacksID;
/// TwoAddressInstruction pass - This pass reduces two-address instructions to
/// TwoAddressInstruction - This pass reduces two-address instructions to
/// use two operands. This destroys SSA information but it is desired by
/// register allocators.
extern char &TwoAddressInstructionPassID;
/// RegisteCoalescer pass - This pass merges live ranges to eliminate copies.
/// RegisteCoalescer - This pass merges live ranges to eliminate copies.
extern char &RegisterCoalescerPassID;
/// MachineScheduler pass - This pass schedules machine instructions.
/// MachineScheduler - This pass schedules machine instructions.
extern char &MachineSchedulerID;
/// SpillPlacement analysis. Suggest optimal placement of spill code between
/// basic blocks.
///
extern char &SpillPlacementID;
/// UnreachableMachineBlockElimination pass - This pass removes unreachable
/// UnreachableMachineBlockElimination - This pass removes unreachable
/// machine basic blocks.
extern char &UnreachableMachineBlockElimID;
/// DeadMachineInstructionElim pass - This pass removes dead machine
/// instructions.
///
FunctionPass *createDeadMachineInstructionElimPass();
/// DeadMachineInstructionElim - This pass removes dead machine instructions.
extern char &DeadMachineInstructionElimID;
/// Creates a register allocator as the user specified on the command line, or
/// picks one that matches OptLevel.
@@ -260,55 +251,54 @@ namespace llvm {
///
FunctionPass *createDefaultPBQPRegisterAllocator();
/// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
/// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
/// and eliminates abstract frame references.
///
FunctionPass *createPrologEpilogCodeInserter();
extern char &PrologEpilogCodeInserterID;
/// ExpandPostRAPseudos Pass - This pass expands pseudo instructions after
/// ExpandPostRAPseudos - This pass expands pseudo instructions after
/// register allocation.
///
FunctionPass *createExpandPostRAPseudosPass();
extern char &ExpandPostRAPseudosID;
/// createPostRAScheduler - This pass performs post register allocation
/// scheduling.
FunctionPass *createPostRAScheduler();
extern char &PostRASchedulerID;
/// BranchFolding Pass - This pass performs machine code CFG based
/// BranchFolding - This pass performs machine code CFG based
/// optimizations to delete branches to branches, eliminate branches to
/// successor blocks (creating fall throughs), and eliminating branches over
/// branches.
extern char &BranchFolderPassID;
/// TailDuplicate Pass - Duplicate blocks with unconditional branches
/// TailDuplicate - Duplicate blocks with unconditional branches
/// into tails of their predecessors.
FunctionPass *createTailDuplicatePass();
extern char &TailDuplicateID;
/// IfConverter Pass - This pass performs machine code if conversion.
FunctionPass *createIfConverterPass();
/// IfConverter - This pass performs machine code if conversion.
extern char &IfConverterID;
/// MachineBlockPlacement Pass - This pass places basic blocks based on branch
/// MachineBlockPlacement - This pass places basic blocks based on branch
/// probabilities.
FunctionPass *createMachineBlockPlacementPass();
extern char &MachineBlockPlacementID;
/// MachineBlockPlacementStats Pass - This pass collects statistics about the
/// MachineBlockPlacementStats - This pass collects statistics about the
/// basic block placement using branch probabilities and block frequency
/// information.
FunctionPass *createMachineBlockPlacementStatsPass();
extern char &MachineBlockPlacementStatsID;
/// Code Placement Pass - This pass optimize code placement and aligns loop
/// Code Placement - This pass optimize code placement and aligns loop
/// headers to target specific alignment boundary.
FunctionPass *createCodePlacementOptPass();
extern char &CodePlacementOptID;
/// IntrinsicLowering Pass - Performs target-independent LLVM IR
/// transformations for highly portable strategies.
/// GCLowering Pass - Performs target-independent LLVM IR transformations for
/// highly portable strategies.
///
FunctionPass *createGCLoweringPass();
/// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
/// machine code. Must be added very late during code generation, just prior
/// to output, and importantly after all CFG transformations (such as branch
/// folding).
FunctionPass *createGCMachineCodeAnalysisPass();
/// GCMachineCodeAnalysis - Target-independent pass to mark safe points
/// in machine code. Must be added very late during code generation, just
/// prior to output, and importantly after all CFG transformations (such as
/// branch folding).
extern char &GCMachineCodeAnalysisID;
/// Deleter Pass - Releases GC metadata.
///
@@ -318,38 +308,37 @@ namespace llvm {
///
FunctionPass *createGCInfoPrinter(raw_ostream &OS);
/// createMachineCSEPass - This pass performs global CSE on machine
/// instructions.
FunctionPass *createMachineCSEPass();
/// MachineCSE - This pass performs global CSE on machine instructions.
extern char &MachineCSEID;
/// createMachineLICMPass - This pass performs LICM on machine instructions.
///
FunctionPass *createMachineLICMPass();
/// MachineLICM - This pass performs LICM on machine instructions.
extern char &MachineLICMID;
/// createMachineSinkingPass - This pass performs sinking on machine
/// instructions.
FunctionPass *createMachineSinkingPass();
/// MachineSinking - This pass performs sinking on machine instructions.
extern char &MachineSinkingID;
/// createMachineCopyPropagationPass - This pass performs copy propagation on
/// MachineCopyPropagation - This pass performs copy propagation on
/// machine instructions.
FunctionPass *createMachineCopyPropagationPass();
extern char &MachineCopyPropagationID;
/// createPeepholeOptimizerPass - This pass performs peephole optimizations -
/// PeepholeOptimizer - This pass performs peephole optimizations -
/// like extension and comparison eliminations.
FunctionPass *createPeepholeOptimizerPass();
extern char &PeepholeOptimizerID;
/// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
/// OptimizePHIs - This pass optimizes machine instruction PHIs
/// to take advantage of opportunities created during DAG legalization.
FunctionPass *createOptimizePHIsPass();
extern char &OptimizePHIsID;
/// createStackSlotColoringPass - This pass performs stack slot coloring.
FunctionPass *createStackSlotColoringPass();
/// StackSlotColoring - This pass performs stack slot coloring.
extern char &StackSlotColoringID;
/// createStackProtectorPass - This pass adds stack protectors to functions.
///
FunctionPass *createStackProtectorPass(const TargetLowering *tli);
/// createMachineVerifierPass - This pass verifies cenerated machine code
/// instructions for correctness.
///
FunctionPass *createMachineVerifierPass(const char *Banner = 0);
/// createDwarfEHPass - This pass mulches exception handling code into a form
@@ -358,18 +347,17 @@ namespace llvm {
/// createSjLjEHPass - This pass adapts exception handling code to use
/// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
///
FunctionPass *createSjLjEHPass(const TargetLowering *tli);
/// createLocalStackSlotAllocationPass - This pass assigns local frame
/// indices to stack slots relative to one another and allocates
/// base registers to access them when it is estimated by the target to
/// be out of range of normal frame pointer or stack pointer index
/// addressing.
FunctionPass *createLocalStackSlotAllocationPass();
/// LocalStackSlotAllocation - This pass assigns local frame indices to stack
/// slots relative to one another and allocates base registers to access them
/// when it is estimated by the target to be out of range of normal frame
/// pointer or stack pointer index addressing.
extern char &LocalStackSlotAllocationID;
/// createExpandISelPseudosPass - This pass expands pseudo-instructions.
///
FunctionPass *createExpandISelPseudosPass();
/// ExpandISelPseudos - This pass expands pseudo-instructions.
extern char &ExpandISelPseudosID;
/// createExecutionDependencyFixPass - This pass fixes execution time
/// problems with dependent instructions, such as switching execution
@@ -379,14 +367,12 @@ namespace llvm {
///
FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
/// createUnpackMachineBundles - This pass unpack machine instruction bundles.
///
FunctionPass *createUnpackMachineBundlesPass();
/// UnpackMachineBundles - This pass unpack machine instruction bundles.
extern char &UnpackMachineBundlesID;
/// createFinalizeMachineBundles - This pass finalize machine instruction
/// FinalizeMachineBundles - This pass finalize machine instruction
/// bundles (created earlier, e.g. during pre-RA scheduling).
///
FunctionPass *createFinalizeMachineBundlesPass();
extern char &FinalizeMachineBundlesID;
} // End llvm namespace
include/llvm/InitializePasses.h
+7
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@@ -82,6 +82,7 @@ void initializeCFGViewerPass(PassRegistry&);
void initializeCalculateSpillWeightsPass(PassRegistry&);
void initializeCallGraphAnalysisGroup(PassRegistry&);
void initializeCodeGenPreparePass(PassRegistry&);
void initializeCodePlacementOptPass(PassRegistry&);
void initializeConstantMergePass(PassRegistry&);
void initializeConstantPropagationPass(PassRegistry&);
void initializeMachineCopyPropagationPass(PassRegistry&);
@@ -100,6 +101,7 @@ void initializeDominanceFrontierPass(PassRegistry&);
void initializeDominatorTreePass(PassRegistry&);
void initializeEdgeBundlesPass(PassRegistry&);
void initializeEdgeProfilerPass(PassRegistry&);
void initializeExpandPostRAPass(PassRegistry&);
void initializePathProfilerPass(PassRegistry&);
void initializeGCOVProfilerPass(PassRegistry&);
void initializeAddressSanitizerPass(PassRegistry&);
@@ -107,6 +109,8 @@ void initializeEarlyCSEPass(PassRegistry&);
void initializeExpandISelPseudosPass(PassRegistry&);
void initializeFindUsedTypesPass(PassRegistry&);
void initializeFunctionAttrsPass(PassRegistry&);
void initializeGCInfoDeleterPass(PassRegistry&);
void initializeGCMachineCodeAnalysisPass(PassRegistry&);
void initializeGCModuleInfoPass(PassRegistry&);
void initializeGVNPass(PassRegistry&);
void initializeGlobalDCEPass(PassRegistry&);
@@ -134,6 +138,7 @@ void initializeLiveStacksPass(PassRegistry&);
void initializeLiveVariablesPass(PassRegistry&);
void initializeLoaderPassPass(PassRegistry&);
void initializePathProfileLoaderPassPass(PassRegistry&);
void initializeLocalStackSlotPassPass(PassRegistry&);
void initializeLoopDeletionPass(PassRegistry&);
void initializeLoopDependenceAnalysisPass(PassRegistry&);
void initializeLoopExtractorPass(PassRegistry&);
@@ -188,6 +193,7 @@ void initializePostDomOnlyViewerPass(PassRegistry&);
void initializePostDomPrinterPass(PassRegistry&);
void initializePostDomViewerPass(PassRegistry&);
void initializePostDominatorTreePass(PassRegistry&);
void initializePostRASchedulerPass(PassRegistry&);
void initializePreVerifierPass(PassRegistry&);
void initializePrintDbgInfoPass(PassRegistry&);
void initializePrintFunctionPassPass(PassRegistry&);
@@ -229,6 +235,7 @@ void initializeStripNonDebugSymbolsPass(PassRegistry&);
void initializeStripSymbolsPass(PassRegistry&);
void initializeStrongPHIEliminationPass(PassRegistry&);
void initializeTailCallElimPass(PassRegistry&);
void initializeTailDuplicatePassPass(PassRegistry&);
void initializeTargetPassConfigPass(PassRegistry&);
void initializeTargetDataPass(PassRegistry&);
void initializeTargetLibraryInfoPass(PassRegistry&);
lib/CodeGen/CodeGen.cpp
+11 -1
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@@ -21,37 +21,47 @@ using namespace llvm;
void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeBranchFolderPassPass(Registry);
initializeCalculateSpillWeightsPass(Registry);
initializeCodePlacementOptPass(Registry);
initializeDeadMachineInstructionElimPass(Registry);
initializeExpandPostRAPass(Registry);
initializeExpandISelPseudosPass(Registry);
initializeFinalizeMachineBundlesPass(Registry);
initializeGCMachineCodeAnalysisPass(Registry);
initializeGCModuleInfoPass(Registry);
initializeIfConverterPass(Registry);
initializeLiveDebugVariablesPass(Registry);
initializeLiveIntervalsPass(Registry);
initializeLiveStacksPass(Registry);
initializeLiveVariablesPass(Registry);
initializeLocalStackSlotPassPass(Registry);
initializeMachineBlockFrequencyInfoPass(Registry);
initializeMachineBlockPlacementPass(Registry);
initializeMachineBlockPlacementStatsPass(Registry);
initializeMachineCopyPropagationPass(Registry);
initializeMachineCSEPass(Registry);
initializeMachineDominatorTreePass(Registry);
initializeMachineLICMPass(Registry);
initializeMachineLoopInfoPass(Registry);
initializeMachineModuleInfoPass(Registry);
initializeMachineSchedulerPass(Registry);
initializeMachineSinkingPass(Registry);
initializeMachineVerifierPassPass(Registry);
initializeOptimizePHIsPass(Registry);
initializePHIEliminationPass(Registry);
initializePeepholeOptimizerPass(Registry);
initializePostRASchedulerPass(Registry);
initializeProcessImplicitDefsPass(Registry);
initializePEIPass(Registry);
initializeRegisterCoalescerPass(Registry);
initializeMachineSchedulerPass(Registry);
initializeRenderMachineFunctionPass(Registry);
initializeSlotIndexesPass(Registry);
initializeStackProtectorPass(Registry);
initializeStackSlotColoringPass(Registry);
initializeStrongPHIEliminationPass(Registry);
initializeTailDuplicatePassPass(Registry);
initializeTargetPassConfigPass(Registry);
initializeTwoAddressInstructionPassPass(Registry);
initializeUnpackMachineBundlesPass(Registry);
initializeUnreachableBlockElimPass(Registry);
initializeUnreachableMachineBlockElimPass(Registry);
initializeVirtRegMapPass(Registry);
lib/CodeGen/CodePlacementOpt.cpp
+3 -6
View File
@@ -39,9 +39,6 @@ namespace {
CodePlacementOpt() : MachineFunctionPass(ID) {}
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const {
return "Code Placement Optimizer";
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineLoopInfo>();
@@ -69,9 +66,9 @@ namespace {
char CodePlacementOpt::ID = 0;
} // end anonymous namespace
FunctionPass *llvm::createCodePlacementOptPass() {
return new CodePlacementOpt();
}
char &llvm::CodePlacementOptID = CodePlacementOpt::ID;
INITIALIZE_PASS(CodePlacementOpt, "code-placement",
"Code Placement Optimizer", false, false)
/// HasFallthrough - Test whether the given branch has a fallthrough, either as
/// a plain fallthrough or as a fallthrough case of a conditional branch.
lib/CodeGen/DeadMachineInstructionElim.cpp
+1 -4
View File
@@ -45,14 +45,11 @@ namespace {
};
}
char DeadMachineInstructionElim::ID = 0;
char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
"Remove dead machine instructions", false, false)
FunctionPass *llvm::createDeadMachineInstructionElimPass() {
return new DeadMachineInstructionElim();
}
bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
// Technically speaking inline asm without side effects and no defs can still
// be deleted. But there is so much bad inline asm code out there, we should
lib/CodeGen/ExpandISelPseudos.cpp
+2 -9
View File
@@ -32,10 +32,6 @@ namespace {
private:
virtual bool runOnMachineFunction(MachineFunction &MF);
const char *getPassName() const {
return "Expand ISel Pseudo-instructions";
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -43,12 +39,9 @@ namespace {
} // end anonymous namespace
char ExpandISelPseudos::ID = 0;
char &llvm::ExpandISelPseudosID = ExpandISelPseudos::ID;
INITIALIZE_PASS(ExpandISelPseudos, "expand-isel-pseudos",
"Expand CodeGen Pseudo-instructions", false, false)
FunctionPass *llvm::createExpandISelPseudosPass() {
return new ExpandISelPseudos();
}
"Expand ISel Pseudo-instructions", false, false)
bool ExpandISelPseudos::runOnMachineFunction(MachineFunction &MF) {
bool Changed = false;
lib/CodeGen/ExpandPostRAPseudos.cpp
+3 -7
View File
@@ -36,10 +36,6 @@ public:
static char ID; // Pass identification, replacement for typeid
ExpandPostRA() : MachineFunctionPass(ID) {}
const char *getPassName() const {
return "Post-RA pseudo instruction expansion pass";
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addPreservedID(MachineLoopInfoID);
@@ -61,10 +57,10 @@ private:
} // end anonymous namespace
char ExpandPostRA::ID = 0;
char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
FunctionPass *llvm::createExpandPostRAPseudosPass() {
return new ExpandPostRA();
}
INITIALIZE_PASS(ExpandPostRA, "postrapseudos",
"Post-RA pseudo instruction expansion pass", false, false)
/// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead,
/// and the lowered replacement instructions immediately precede it.
lib/CodeGen/GCStrategy.cpp
+18 -23
View File
@@ -10,8 +10,8 @@
// This file implements target- and collector-independent garbage collection
// infrastructure.
//
// MachineCodeAnalysis identifies the GC safe points in the machine code. Roots
// are identified in SelectionDAGISel.
// GCMachineCodeAnalysis identifies the GC safe points in the machine code.
// Roots are identified in SelectionDAGISel.
//
//===----------------------------------------------------------------------===//
@@ -60,11 +60,11 @@ namespace {
};
/// MachineCodeAnalysis - This is a target-independent pass over the machine
/// GCMachineCodeAnalysis - This is a target-independent pass over the machine
/// function representation to identify safe points for the garbage collector
/// in the machine code. It inserts labels at safe points and populates a
/// GCMetadata record for each function.
class MachineCodeAnalysis : public MachineFunctionPass {
class GCMachineCodeAnalysis : public MachineFunctionPass {
const TargetMachine *TM;
GCFunctionInfo *FI;
MachineModuleInfo *MMI;
@@ -81,8 +81,7 @@ namespace {
public:
static char ID;
MachineCodeAnalysis();
const char *getPassName() const;
GCMachineCodeAnalysis();
void getAnalysisUsage(AnalysisUsage &AU) const;
bool runOnMachineFunction(MachineFunction &MF);
@@ -334,35 +333,31 @@ bool LowerIntrinsics::PerformDefaultLowering(Function &F, GCStrategy &S) {
// -----------------------------------------------------------------------------
FunctionPass *llvm::createGCMachineCodeAnalysisPass() {
return new MachineCodeAnalysis();
}
char GCMachineCodeAnalysis::ID = 0;
char &llvm::GCMachineCodeAnalysisID = GCMachineCodeAnalysis::ID;
char MachineCodeAnalysis::ID = 0;
INITIALIZE_PASS(GCMachineCodeAnalysis, "gc-analysis",
"Analyze Machine Code For Garbage Collection", false, false)
MachineCodeAnalysis::MachineCodeAnalysis()
GCMachineCodeAnalysis::GCMachineCodeAnalysis()
: MachineFunctionPass(ID) {}
const char *MachineCodeAnalysis::getPassName() const {
return "Analyze Machine Code For Garbage Collection";
}
void MachineCodeAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
void GCMachineCodeAnalysis::getAnalysisUsage(AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
AU.setPreservesAll();
AU.addRequired<MachineModuleInfo>();
AU.addRequired<GCModuleInfo>();
}
MCSymbol *MachineCodeAnalysis::InsertLabel(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
DebugLoc DL) const {
MCSymbol *GCMachineCodeAnalysis::InsertLabel(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
DebugLoc DL) const {
MCSymbol *Label = MBB.getParent()->getContext().CreateTempSymbol();
BuildMI(MBB, MI, DL, TII->get(TargetOpcode::GC_LABEL)).addSym(Label);
return Label;
}
void MachineCodeAnalysis::VisitCallPoint(MachineBasicBlock::iterator CI) {
void GCMachineCodeAnalysis::VisitCallPoint(MachineBasicBlock::iterator CI) {
// Find the return address (next instruction), too, so as to bracket the call
// instruction.
MachineBasicBlock::iterator RAI = CI;
@@ -379,7 +374,7 @@ void MachineCodeAnalysis::VisitCallPoint(MachineBasicBlock::iterator CI) {
}
}
void MachineCodeAnalysis::FindSafePoints(MachineFunction &MF) {
void GCMachineCodeAnalysis::FindSafePoints(MachineFunction &MF) {
for (MachineFunction::iterator BBI = MF.begin(),
BBE = MF.end(); BBI != BBE; ++BBI)
for (MachineBasicBlock::iterator MI = BBI->begin(),
@@ -388,7 +383,7 @@ void MachineCodeAnalysis::FindSafePoints(MachineFunction &MF) {
VisitCallPoint(MI);
}
void MachineCodeAnalysis::FindStackOffsets(MachineFunction &MF) {
void GCMachineCodeAnalysis::FindStackOffsets(MachineFunction &MF) {
const TargetFrameLowering *TFI = TM->getFrameLowering();
assert(TFI && "TargetRegisterInfo not available!");
@@ -397,7 +392,7 @@ void MachineCodeAnalysis::FindStackOffsets(MachineFunction &MF) {
RI->StackOffset = TFI->getFrameIndexOffset(MF, RI->Num);
}
bool MachineCodeAnalysis::runOnMachineFunction(MachineFunction &MF) {
bool GCMachineCodeAnalysis::runOnMachineFunction(MachineFunction &MF) {
// Quick exit for functions that do not use GC.
if (!MF.getFunction()->hasGC())
return false;
lib/CodeGen/IfConversion.cpp
+2 -3
View File
@@ -170,7 +170,6 @@ namespace {
}
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const { return "If Converter"; }
private:
bool ReverseBranchCondition(BBInfo &BBI);
@@ -253,12 +252,12 @@ namespace {
char IfConverter::ID = 0;
}
char &llvm::IfConverterID = IfConverter::ID;
INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
FunctionPass *llvm::createIfConverterPass() { return new IfConverter(); }
bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
TLI = MF.getTarget().getTargetLowering();
TII = MF.getTarget().getInstrInfo();
lib/CodeGen/LocalStackSlotAllocation.cpp
+3 -7
View File
@@ -71,19 +71,15 @@ namespace {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
const char *getPassName() const {
return "Local Stack Slot Allocation";
}
private:
};
} // end anonymous namespace
char LocalStackSlotPass::ID = 0;
FunctionPass *llvm::createLocalStackSlotAllocationPass() {
return new LocalStackSlotPass();
}
char &llvm::LocalStackSlotAllocationID = LocalStackSlotPass::ID;
INITIALIZE_PASS(LocalStackSlotPass, "localstackalloc",
"Local Stack Slot Allocation", false, false)
bool LocalStackSlotPass::runOnMachineFunction(MachineFunction &MF) {
MachineFrameInfo *MFI = MF.getFrameInfo();
lib/CodeGen/MachineBlockPlacement.cpp
+2 -12
View File
@@ -224,12 +224,11 @@ public:
AU.addRequired<MachineLoopInfo>();
MachineFunctionPass::getAnalysisUsage(AU);
}
const char *getPassName() const { return "Block Placement"; }
};
}
char MachineBlockPlacement::ID = 0;
char &llvm::MachineBlockPlacementID = MachineBlockPlacement::ID;
INITIALIZE_PASS_BEGIN(MachineBlockPlacement, "block-placement2",
"Branch Probability Basic Block Placement", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
@@ -238,10 +237,6 @@ INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
INITIALIZE_PASS_END(MachineBlockPlacement, "block-placement2",
"Branch Probability Basic Block Placement", false, false)
FunctionPass *llvm::createMachineBlockPlacementPass() {
return new MachineBlockPlacement();
}
#ifndef NDEBUG
/// \brief Helper to print the name of a MBB.
///
@@ -943,12 +938,11 @@ public:
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
const char *getPassName() const { return "Block Placement Stats"; }
};
}
char MachineBlockPlacementStats::ID = 0;
char &llvm::MachineBlockPlacementStatsID = MachineBlockPlacementStats::ID;
INITIALIZE_PASS_BEGIN(MachineBlockPlacementStats, "block-placement-stats",
"Basic Block Placement Stats", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
@@ -956,10 +950,6 @@ INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
INITIALIZE_PASS_END(MachineBlockPlacementStats, "block-placement-stats",
"Basic Block Placement Stats", false, false)
FunctionPass *llvm::createMachineBlockPlacementStatsPass() {
return new MachineBlockPlacementStats();
}
bool MachineBlockPlacementStats::runOnMachineFunction(MachineFunction &F) {
// Check for single-block functions and skip them.
if (llvm::next(F.begin()) == F.end())
lib/CodeGen/MachineCSE.cpp
+1 -2
View File
@@ -103,6 +103,7 @@ namespace {
} // end anonymous namespace
char MachineCSE::ID = 0;
char &llvm::MachineCSEID = MachineCSE::ID;
INITIALIZE_PASS_BEGIN(MachineCSE, "machine-cse",
"Machine Common Subexpression Elimination", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
@@ -110,8 +111,6 @@ INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_END(MachineCSE, "machine-cse",
"Machine Common Subexpression Elimination", false, false)
FunctionPass *llvm::createMachineCSEPass() { return new MachineCSE(); }
bool MachineCSE::PerformTrivialCoalescing(MachineInstr *MI,
MachineBasicBlock *MBB) {
bool Changed = false;
lib/CodeGen/MachineCopyPropagation.cpp
+1 -4
View File
@@ -50,14 +50,11 @@ namespace {
};
}
char MachineCopyPropagation::ID = 0;
char &llvm::MachineCopyPropagationID = MachineCopyPropagation::ID;
INITIALIZE_PASS(MachineCopyPropagation, "machine-cp",
"Machine Copy Propagation Pass", false, false)
FunctionPass *llvm::createMachineCopyPropagationPass() {
return new MachineCopyPropagation();
}
void
MachineCopyPropagation::SourceNoLongerAvailable(unsigned Reg,
DenseMap<unsigned, unsigned> &SrcMap,
lib/CodeGen/MachineInstrBundle.cpp
+2 -8
View File
@@ -31,13 +31,10 @@ namespace {
} // end anonymous namespace
char UnpackMachineBundles::ID = 0;
char &llvm::UnpackMachineBundlesID = UnpackMachineBundles::ID;
INITIALIZE_PASS(UnpackMachineBundles, "unpack-mi-bundles",
"Unpack machine instruction bundles", false, false)
FunctionPass *llvm::createUnpackMachineBundlesPass() {
return new UnpackMachineBundles();
}
bool UnpackMachineBundles::runOnMachineFunction(MachineFunction &MF) {
bool Changed = false;
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
@@ -85,13 +82,10 @@ namespace {
} // end anonymous namespace
char FinalizeMachineBundles::ID = 0;
char &llvm::FinalizeMachineBundlesID = FinalizeMachineBundles::ID;
INITIALIZE_PASS(FinalizeMachineBundles, "finalize-mi-bundles",
"Finalize machine instruction bundles", false, false)
FunctionPass *llvm::createFinalizeMachineBundlesPass() {
return new FinalizeMachineBundles();
}
bool FinalizeMachineBundles::runOnMachineFunction(MachineFunction &MF) {
return llvm::finalizeBundles(MF);
}
lib/CodeGen/MachineLICM.cpp
+1 -6
View File
@@ -119,8 +119,6 @@ namespace {
virtual bool runOnMachineFunction(MachineFunction &MF);
const char *getPassName() const { return "Machine Instruction LICM"; }
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineLoopInfo>();
AU.addRequired<MachineDominatorTree>();
@@ -289,6 +287,7 @@ namespace {
} // end anonymous namespace
char MachineLICM::ID = 0;
char &llvm::MachineLICMID = MachineLICM::ID;
INITIALIZE_PASS_BEGIN(MachineLICM, "machinelicm",
"Machine Loop Invariant Code Motion", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
@@ -297,10 +296,6 @@ INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_END(MachineLICM, "machinelicm",
"Machine Loop Invariant Code Motion", false, false)
FunctionPass *llvm::createMachineLICMPass() {
return new MachineLICM();
}
/// LoopIsOuterMostWithPredecessor - Test if the given loop is the outer-most
/// loop that has a unique predecessor.
static bool LoopIsOuterMostWithPredecessor(MachineLoop *CurLoop) {
lib/CodeGen/MachineSink.cpp
+1 -2
View File
@@ -102,6 +102,7 @@ namespace {
} // end anonymous namespace
char MachineSinking::ID = 0;
char &llvm::MachineSinkingID = MachineSinking::ID;
INITIALIZE_PASS_BEGIN(MachineSinking, "machine-sink",
"Machine code sinking", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
@@ -110,8 +111,6 @@ INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_END(MachineSinking, "machine-sink",
"Machine code sinking", false, false)
FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); }
bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr *MI,
MachineBasicBlock *MBB) {
if (!MI->isCopy())
lib/CodeGen/OptimizePHIs.cpp
+1 -2
View File
@@ -56,11 +56,10 @@ namespace {
}
char OptimizePHIs::ID = 0;
char &llvm::OptimizePHIsID = OptimizePHIs::ID;
INITIALIZE_PASS(OptimizePHIs, "opt-phis",
"Optimize machine instruction PHIs", false, false)
FunctionPass *llvm::createOptimizePHIsPass() { return new OptimizePHIs(); }
bool OptimizePHIs::runOnMachineFunction(MachineFunction &Fn) {
MRI = &Fn.getRegInfo();
TII = Fn.getTarget().getInstrInfo();
lib/CodeGen/Passes.cpp
+20 -20
View File
@@ -189,22 +189,22 @@ void TargetPassConfig::addMachinePasses() {
printAndVerify("After Instruction Selection");
// Expand pseudo-instructions emitted by ISel.
PM.add(createExpandISelPseudosPass());
addPass(ExpandISelPseudosID);
// Pre-ra tail duplication.
if (getOptLevel() != CodeGenOpt::None && !DisableEarlyTailDup) {
PM.add(createTailDuplicatePass());
addPass(TailDuplicateID);
printAndVerify("After Pre-RegAlloc TailDuplicate");
}
// Optimize PHIs before DCE: removing dead PHI cycles may make more
// instructions dead.
if (getOptLevel() != CodeGenOpt::None)
PM.add(createOptimizePHIsPass());
addPass(OptimizePHIsID);
// If the target requests it, assign local variables to stack slots relative
// to one another and simplify frame index references where possible.
PM.add(createLocalStackSlotAllocationPass());
addPass(LocalStackSlotAllocationID);
if (getOptLevel() != CodeGenOpt::None) {
// With optimization, dead code should already be eliminated. However
@@ -212,18 +212,18 @@ void TargetPassConfig::addMachinePasses() {
// used by tail calls, where the tail calls reuse the incoming stack
// arguments directly (see t11 in test/CodeGen/X86/sibcall.ll).
if (!DisableMachineDCE)
PM.add(createDeadMachineInstructionElimPass());
addPass(DeadMachineInstructionElimID);
printAndVerify("After codegen DCE pass");
if (!DisableMachineLICM)
PM.add(createMachineLICMPass());
addPass(MachineLICMID);
if (!DisableMachineCSE)
PM.add(createMachineCSEPass());
addPass(MachineCSEID);
if (!DisableMachineSink)
PM.add(createMachineSinkingPass());
addPass(MachineSinkingID);
printAndVerify("After Machine LICM, CSE and Sinking passes");
PM.add(createPeepholeOptimizerPass());
addPass(PeepholeOptimizerID);
printAndVerify("After codegen peephole optimization pass");
}
@@ -240,11 +240,11 @@ void TargetPassConfig::addMachinePasses() {
// FIXME: Re-enable coloring with register when it's capable of adding
// kill markers.
if (!DisableSSC)
PM.add(createStackSlotColoringPass());
addPass(StackSlotColoringID);
// Run post-ra machine LICM to hoist reloads / remats.
if (!DisablePostRAMachineLICM)
PM.add(createMachineLICMPass());
addPass(MachineLICMID);
printAndVerify("After StackSlotColoring and postra Machine LICM");
}
@@ -254,7 +254,7 @@ void TargetPassConfig::addMachinePasses() {
printAndVerify("After PostRegAlloc passes");
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
addPass(PrologEpilogCodeInserterID);
printAndVerify("After PrologEpilogCodeInserter");
// Branch folding must be run after regalloc and prolog/epilog insertion.
@@ -265,18 +265,18 @@ void TargetPassConfig::addMachinePasses() {
// Tail duplication.
if (getOptLevel() != CodeGenOpt::None && !DisableTailDuplicate) {
PM.add(createTailDuplicatePass());
addPass(TailDuplicateID);
printNoVerify("After TailDuplicate");
}
// Copy propagation.
if (getOptLevel() != CodeGenOpt::None && !DisableCopyProp) {
PM.add(createMachineCopyPropagationPass());
addPass(MachineCopyPropagationID);
printNoVerify("After copy propagation pass");
}
// Expand pseudo instructions before second scheduling pass.
PM.add(createExpandPostRAPseudosPass());
addPass(ExpandPostRAPseudosID);
printNoVerify("After ExpandPostRAPseudos");
// Run pre-sched2 passes.
@@ -285,11 +285,11 @@ void TargetPassConfig::addMachinePasses() {
// Second pass scheduler.
if (getOptLevel() != CodeGenOpt::None && !DisablePostRA) {
PM.add(createPostRAScheduler());
addPass(PostRASchedulerID);
printNoVerify("After PostRAScheduler");
}
PM.add(createGCMachineCodeAnalysisPass());
addPass(GCMachineCodeAnalysisID);
if (PrintGCInfo)
PM.add(createGCInfoPrinter(dbgs()));
@@ -299,16 +299,16 @@ void TargetPassConfig::addMachinePasses() {
// MachineBlockPlacement is an experimental pass which is disabled by
// default currently. Eventually it should subsume CodePlacementOpt, so
// when enabled, the other is disabled.
PM.add(createMachineBlockPlacementPass());
addPass(MachineBlockPlacementID);
printNoVerify("After MachineBlockPlacement");
} else {
PM.add(createCodePlacementOptPass());
addPass(CodePlacementOptID);
printNoVerify("After CodePlacementOpt");
}
// Run a separate pass to collect block placement statistics.
if (EnableBlockPlacementStats) {
PM.add(createMachineBlockPlacementStatsPass());
addPass(MachineBlockPlacementStatsID);
printNoVerify("After MachineBlockPlacementStats");
}
}
lib/CodeGen/PeepholeOptimizer.cpp
+1 -4
View File
@@ -109,16 +109,13 @@ namespace {
}
char PeepholeOptimizer::ID = 0;
char &llvm::PeepholeOptimizerID = PeepholeOptimizer::ID;
INITIALIZE_PASS_BEGIN(PeepholeOptimizer, "peephole-opts",
"Peephole Optimizations", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_END(PeepholeOptimizer, "peephole-opts",
"Peephole Optimizations", false, false)
FunctionPass *llvm::createPeepholeOptimizerPass() {
return new PeepholeOptimizer();
}
/// OptimizeExtInstr - If instruction is a copy-like instruction, i.e. it reads
/// a single register and writes a single register and it does not modify the
/// source, and if the source value is preserved as a sub-register of the
lib/CodeGen/PostRASchedulerList.cpp
+5 -12
View File
@@ -98,10 +98,6 @@ namespace {
MachineFunctionPass::getAnalysisUsage(AU);
}
const char *getPassName() const {
return "Post RA top-down list latency scheduler";
}
bool runOnMachineFunction(MachineFunction &Fn);
};
char PostRAScheduler::ID = 0;
@@ -179,6 +175,11 @@ namespace {
};
}
char &llvm::PostRASchedulerID = PostRAScheduler::ID;
INITIALIZE_PASS(PostRAScheduler, "post-RA-sched",
"Post RA top-down list latency scheduler", false, false)
SchedulePostRATDList::SchedulePostRATDList(
MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
AliasAnalysis *AA, const RegisterClassInfo &RCI,
@@ -707,11 +708,3 @@ void SchedulePostRATDList::ListScheduleTopDown() {
VerifySchedule(/*isBottomUp=*/false);
#endif
}
//===----------------------------------------------------------------------===//
// Public Constructor Functions
//===----------------------------------------------------------------------===//
FunctionPass *llvm::createPostRAScheduler() {
return new PostRAScheduler();
}
lib/CodeGen/PrologEpilogInserter.cpp
+3 -6
View File
@@ -45,6 +45,7 @@
using namespace llvm;
char PEI::ID = 0;
char &llvm::PrologEpilogCodeInserterID = PEI::ID;
INITIALIZE_PASS_BEGIN(PEI, "prologepilog",
"Prologue/Epilogue Insertion", false, false)
@@ -52,18 +53,14 @@ INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
INITIALIZE_PASS_END(PEI, "prologepilog",
"Prologue/Epilogue Insertion", false, false)
"Prologue/Epilogue Insertion & Frame Finalization",
false, false)
STATISTIC(NumVirtualFrameRegs, "Number of virtual frame regs encountered");
STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
STATISTIC(NumBytesStackSpace,
"Number of bytes used for stack in all functions");
/// createPrologEpilogCodeInserter - This function returns a pass that inserts
/// prolog and epilog code, and eliminates abstract frame references.
///
FunctionPass *llvm::createPrologEpilogCodeInserter() { return new PEI(); }
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
/// frame indexes with appropriate references.
///
lib/CodeGen/PrologEpilogInserter.h
-4
View File
@@ -40,10 +40,6 @@ namespace llvm {
initializePEIPass(*PassRegistry::getPassRegistry());
}
const char *getPassName() const {
return "Prolog/Epilog Insertion & Frame Finalization";
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const;
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
lib/CodeGen/StackSlotColoring.cpp
+1 -11
View File
@@ -86,10 +86,6 @@ namespace {
MachineFunctionPass(ID), ColorWithRegs(false), NextColor(-1) {
initializeStackSlotColoringPass(*PassRegistry::getPassRegistry());
}
StackSlotColoring(bool RegColor) :
MachineFunctionPass(ID), ColorWithRegs(RegColor), NextColor(-1) {
initializeStackSlotColoringPass(*PassRegistry::getPassRegistry());
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
@@ -105,9 +101,6 @@ namespace {
}
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char* getPassName() const {
return "Stack Slot Coloring";
}
private:
void InitializeSlots();
@@ -122,6 +115,7 @@ namespace {
} // end anonymous namespace
char StackSlotColoring::ID = 0;
char &llvm::StackSlotColoringID = StackSlotColoring::ID;
INITIALIZE_PASS_BEGIN(StackSlotColoring, "stack-slot-coloring",
"Stack Slot Coloring", false, false)
@@ -132,10 +126,6 @@ INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
INITIALIZE_PASS_END(StackSlotColoring, "stack-slot-coloring",
"Stack Slot Coloring", false, false)
FunctionPass *llvm::createStackSlotColoringPass() {
return new StackSlotColoring(/*RegColor=*/false);
}
namespace {
// IntervalSorter - Comparison predicate that sort live intervals by
// their weight.
lib/CodeGen/TailDuplication.cpp
+4 -4
View File
@@ -74,7 +74,6 @@ namespace {
MachineFunctionPass(ID), PreRegAlloc(false) {}
virtual bool runOnMachineFunction(MachineFunction &MF);
virtual const char *getPassName() const { return "Tail Duplication"; }
private:
void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
@@ -118,9 +117,10 @@ namespace {
char TailDuplicatePass::ID = 0;
}
FunctionPass *llvm::createTailDuplicatePass() {
return new TailDuplicatePass();
}
char &llvm::TailDuplicateID = TailDuplicatePass::ID;
INITIALIZE_PASS(TailDuplicatePass, "tailduplication", "Tail Duplication",
false, false)
bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
TII = MF.getTarget().getInstrInfo();
lib/Target/ARM/ARMTargetMachine.cpp
+2 -2
View File
@@ -170,7 +170,7 @@ bool ARMPassConfig::addPreSched2() {
if (getOptLevel() != CodeGenOpt::None) {
if (!getARMSubtarget().isThumb1Only())
PM.add(createIfConverterPass());
addPass(IfConverterID);
}
if (getARMSubtarget().isThumb2())
PM.add(createThumb2ITBlockPass());
@@ -184,7 +184,7 @@ bool ARMPassConfig::addPreEmitPass() {
PM.add(createThumb2SizeReductionPass());
// Constant island pass work on unbundled instructions.
PM.add(createUnpackMachineBundlesPass());
addPass(UnpackMachineBundlesID);
}
PM.add(createARMConstantIslandPass());
lib/Target/Hexagon/HexagonTargetMachine.cpp
+1 -1
View File
@@ -120,7 +120,7 @@ bool HexagonPassConfig::addPostRegAlloc() {
bool HexagonPassConfig::addPreSched2() {
PM.add(createIfConverterPass());
addPass(IfConverterID);
return true;
}
lib/Target/PTX/PTXTargetMachine.cpp
+17 -17
View File
@@ -280,37 +280,37 @@ bool PTXPassConfig::addCodeGenPasses(MCContext *&OutContext) {
printAndVerify("After Instruction Selection");
// Expand pseudo-instructions emitted by ISel.
PM.add(createExpandISelPseudosPass());
addPass(ExpandISelPseudosID);
// Pre-ra tail duplication.
if (getOptLevel() != CodeGenOpt::None) {
PM.add(createTailDuplicatePass());
addPass(TailDuplicateID);
printAndVerify("After Pre-RegAlloc TailDuplicate");
}
// Optimize PHIs before DCE: removing dead PHI cycles may make more
// instructions dead.
if (getOptLevel() != CodeGenOpt::None)
PM.add(createOptimizePHIsPass());
addPass(OptimizePHIsID);
// If the target requests it, assign local variables to stack slots relative
// to one another and simplify frame index references where possible.
PM.add(createLocalStackSlotAllocationPass());
addPass(LocalStackSlotAllocationID);
if (getOptLevel() != CodeGenOpt::None) {
// With optimization, dead code should already be eliminated. However
// there is one known exception: lowered code for arguments that are only
// used by tail calls, where the tail calls reuse the incoming stack
// arguments directly (see t11 in test/CodeGen/X86/sibcall.ll).
PM.add(createDeadMachineInstructionElimPass());
addPass(DeadMachineInstructionElimID);
printAndVerify("After codegen DCE pass");
PM.add(createMachineLICMPass());
PM.add(createMachineCSEPass());
PM.add(createMachineSinkingPass());
addPass(MachineLICMID);
addPass(MachineCSEID);
addPass(MachineSinkingID);
printAndVerify("After Machine LICM, CSE and Sinking passes");
PM.add(createPeepholeOptimizerPass());
addPass(PeepholeOptimizerID);
printAndVerify("After codegen peephole optimization pass");
}
@@ -326,12 +326,12 @@ bool PTXPassConfig::addCodeGenPasses(MCContext *&OutContext) {
if (getOptLevel() != CodeGenOpt::None) {
// FIXME: Re-enable coloring with register when it's capable of adding
// kill markers.
PM.add(createStackSlotColoringPass());
addPass(StackSlotColoringID);
// FIXME: Post-RA LICM has asserts that fire on virtual registers.
// Run post-ra machine LICM to hoist reloads / remats.
//if (!DisablePostRAMachineLICM)
// PM.add(createMachineLICMPass(false));
// addPass(MachineLICMPass(false));
printAndVerify("After StackSlotColoring and postra Machine LICM");
}
@@ -340,11 +340,11 @@ bool PTXPassConfig::addCodeGenPasses(MCContext *&OutContext) {
if (addPostRegAlloc())
printAndVerify("After PostRegAlloc passes");
PM.add(createExpandPostRAPseudosPass());
addPass(ExpandPostRAPseudosID);
printAndVerify("After ExpandPostRAPseudos");
// Insert prolog/epilog code. Eliminate abstract frame index references...
PM.add(createPrologEpilogCodeInserter());
addPass(PrologEpilogCodeInserterID);
printAndVerify("After PrologEpilogCodeInserter");
// Run pre-sched2 passes.
@@ -353,7 +353,7 @@ bool PTXPassConfig::addCodeGenPasses(MCContext *&OutContext) {
// Second pass scheduler.
if (getOptLevel() != CodeGenOpt::None) {
PM.add(createPostRAScheduler());
addPass(PostRASchedulerID);
printAndVerify("After PostRAScheduler");
}
@@ -365,17 +365,17 @@ bool PTXPassConfig::addCodeGenPasses(MCContext *&OutContext) {
// Tail duplication.
if (getOptLevel() != CodeGenOpt::None) {
PM.add(createTailDuplicatePass());
addPass(TailDuplicateID);
printNoVerify("After TailDuplicate");
}
PM.add(createGCMachineCodeAnalysisPass());
addPass(GCMachineCodeAnalysisID);
//if (PrintGCInfo)
// PM.add(createGCInfoPrinter(dbgs()));
if (getOptLevel() != CodeGenOpt::None) {
PM.add(createCodePlacementOptPass());
addPass(CodePlacementOptID);
printNoVerify("After CodePlacementOpt");
}