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Mark Darwin call instructions as using "r7" to prevent the frame-register
assignment instructions from being moved below / above calls. rdar://8690640 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120339 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1232,12 +1232,16 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
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}
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}
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// On non-Darwin platforms R9 is callee-saved.
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// All calls clobber the non-callee saved registers. SP is marked as
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// a use to prevent stack-pointer assignments that appear immediately
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// before calls from potentially appearing dead.
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let isCall = 1,
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// On non-Darwin platforms R9 is callee-saved.
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Defs = [R0, R1, R2, R3, R12, LR,
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D0, D1, D2, D3, D4, D5, D6, D7,
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D16, D17, D18, D19, D20, D21, D22, D23,
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR] in {
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR],
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Uses = [SP] in {
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def BL : ABXI<0b1011, (outs), (ins bltarget:$func, variable_ops),
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IIC_Br, "bl\t$func",
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[(ARMcall tglobaladdr:$func)]>,
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@ -1288,12 +1292,15 @@ let isCall = 1,
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}
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}
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// On Darwin R9 is call-clobbered.
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let isCall = 1,
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// On Darwin R9 is call-clobbered.
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// R7 is marked as a use to prevent frame-pointer assignments from being
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// moved above / below calls.
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Defs = [R0, R1, R2, R3, R9, R12, LR,
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D0, D1, D2, D3, D4, D5, D6, D7,
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D16, D17, D18, D19, D20, D21, D22, D23,
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR] in {
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR],
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Uses = [R7, SP] in {
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def BLr9 : ABXI<0b1011, (outs), (ins bltarget:$func, variable_ops),
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IIC_Br, "bl\t$func",
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[(ARMcall tglobaladdr:$func)]>, Requires<[IsARM, IsDarwin]> {
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@ -1473,7 +1480,7 @@ def SMC : ABI<0b0001, (outs), (ins i32imm:$opt), NoItinerary, "smc", "\t$opt",
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}
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// Supervisor Call (Software Interrupt) -- for disassembly only
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let isCall = 1 in {
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let isCall = 1, Uses = [SP] in {
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def SVC : ABI<0b1111, (outs), (ins i32imm:$svc), IIC_Br, "svc", "\t$svc",
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[/* For disassembly only; pattern left blank */]> {
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bits<24> svc;
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@ -3241,7 +3248,7 @@ def SWPB : AIswp<1, (outs GPR:$Rt), (ins GPR:$Rt2, GPR:$Rn), "swpb",
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// FIXME: This needs to be a pseudo of some sort so that we can get the
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// encoding right, complete with fixup for the aeabi_read_tp function.
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let isCall = 1,
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Defs = [R0, R12, LR, CPSR] in {
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Defs = [R0, R12, LR, CPSR], Uses = [SP] in {
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def TPsoft : ABXI<0b1011, (outs), (ins), IIC_Br,
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"bl\t__aeabi_read_tp",
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[(set R0, ARMthread_pointer)]>;
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@ -336,11 +336,16 @@ def tPOP_RET : T1I<(outs), (ins pred:$p, reglist:$regs, variable_ops),
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let Inst{7-0} = regs{7-0};
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}
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// All calls clobber the non-callee saved registers. SP is marked as
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// a use to prevent stack-pointer assignments that appear immediately
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// before calls from potentially appearing dead.
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let isCall = 1,
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// On non-Darwin platforms R9 is callee-saved.
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Defs = [R0, R1, R2, R3, R12, LR,
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D0, D1, D2, D3, D4, D5, D6, D7,
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D16, D17, D18, D19, D20, D21, D22, D23,
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR] in {
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR],
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Uses = [SP] in {
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// Also used for Thumb2
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def tBL : TIx2<0b11110, 0b11, 1,
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(outs), (ins i32imm:$func, variable_ops), IIC_Br,
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@ -371,12 +376,15 @@ let isCall = 1,
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Requires<[IsThumb, IsThumb1Only, IsNotDarwin]>;
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}
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// On Darwin R9 is call-clobbered.
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let isCall = 1,
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// On Darwin R9 is call-clobbered.
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// R7 is marked as a use to prevent frame-pointer assignments from being
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// moved above / below calls.
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Defs = [R0, R1, R2, R3, R9, R12, LR,
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D0, D1, D2, D3, D4, D5, D6, D7,
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D16, D17, D18, D19, D20, D21, D22, D23,
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR] in {
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D24, D25, D26, D27, D28, D29, D30, D31, CPSR, FPSCR],
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Uses = [R7, SP] in {
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// Also used for Thumb2
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def tBLr9 : TIx2<0b11110, 0b11, 1,
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(outs), (ins pred:$p, i32imm:$func, variable_ops), IIC_Br,
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@ -469,7 +477,7 @@ let isBranch = 1, isTerminator = 1 in {
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// A8.6.218 Supervisor Call (Software Interrupt) -- for disassembly only
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// A8.6.16 B: Encoding T1
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// If Inst{11-8} == 0b1111 then SEE SVC
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let isCall = 1 in
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let isCall = 1, Uses = [SP] in
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def tSVC : T1pI<(outs), (ins i32imm:$imm), IIC_Br,
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"svc", "\t$imm", []>, Encoding16 {
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bits<8> imm;
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@ -1250,7 +1258,7 @@ def tLEApcrelJT : T1I<(outs tGPR:$dst),
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// __aeabi_read_tp preserves the registers r1-r3.
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let isCall = 1,
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Defs = [R0, LR] in {
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Defs = [R0, LR], Uses = [SP] in {
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def tTPsoft : TIx2<0b11110, 0b11, 1, (outs), (ins), IIC_Br,
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"bl\t__aeabi_read_tp",
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[(set R0, ARMthread_pointer)]>;
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@ -2836,7 +2836,7 @@ def t2CLREX : T2I<(outs), (ins), NoItinerary, "clrex", "",
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// __aeabi_read_tp preserves the registers r1-r3.
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let isCall = 1,
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Defs = [R0, R12, LR, CPSR] in {
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Defs = [R0, R12, LR, CPSR], Uses = [SP] in {
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def t2TPsoft : T2XI<(outs), (ins), IIC_Br,
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"bl\t__aeabi_read_tp",
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[(set R0, ARMthread_pointer)]> {
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28
test/CodeGen/ARM/2010-11-29-PrologueBug.ll
Normal file
28
test/CodeGen/ARM/2010-11-29-PrologueBug.ll
Normal file
@ -0,0 +1,28 @@
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; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB2
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; rdar://8690640
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define i32* @t(i32* %x) nounwind {
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entry:
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; ARM: t:
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; ARM: push
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; ARM: mov r7, sp
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; ARM: bl _foo
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; ARM: bl _foo
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; ARM: bl _foo
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; ARM: ldmia sp!, {r7, pc}
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; THUMB2: t:
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; THUMB2: push
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; THUMB2: mov r7, sp
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; THUMB2: blx _foo
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; THUMB2: blx _foo
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; THUMB2: blx _foo
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; THUMB2: pop
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%0 = tail call i32* @foo(i32* %x) nounwind
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%1 = tail call i32* @foo(i32* %0) nounwind
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%2 = tail call i32* @foo(i32* %1) nounwind
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ret i32* %2
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}
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declare i32* @foo(i32*)
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