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Fix a bug that Evan exposed with some changes he's making, and that was
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc). When reloading a reused reg, make sure to invalidate the reloaded reg, and check to see if there are any other pending uses of the same register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26369 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -437,25 +437,39 @@ namespace {
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// to undo a previous reuse.
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MachineBasicBlock *MBB = MI->getParent();
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const TargetRegisterClass *AliasRC =
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MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
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MRI->loadRegFromStackSlot(*MBB, MI, Op.AssignedPhysReg,
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Op.StackSlot, AliasRC);
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Spills.ClobberPhysReg(Op.AssignedPhysReg);
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Spills.ClobberPhysReg(Op.PhysRegReused);
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MBB->getParent()->getSSARegMap()->getRegClass(Op.VirtReg);
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// Copy Op out of the vector and remove it, we're going to insert an
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// explicit load for it.
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ReusedOp NewOp = Op;
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Reuses.erase(Reuses.begin()+ro);
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// Ok, we're going to try to reload the assigned physreg into the
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// slot that we were supposed to in the first place. However, that
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// register could hold a reuse. Check to see if it conflicts or
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// would prefer us to use a different register.
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unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
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MI, Spills, MaybeDeadStores);
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MRI->loadRegFromStackSlot(*MBB, MI, NewPhysReg,
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NewOp.StackSlot, AliasRC);
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Spills.ClobberPhysReg(NewPhysReg);
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Spills.ClobberPhysReg(NewOp.PhysRegReused);
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// Any stores to this stack slot are not dead anymore.
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MaybeDeadStores.erase(Op.StackSlot);
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MaybeDeadStores.erase(NewOp.StackSlot);
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MI->SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg);
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MI->SetMachineOperandReg(NewOp.Operand, NewPhysReg);
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Spills.addAvailable(Op.StackSlot, Op.AssignedPhysReg);
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Spills.addAvailable(NewOp.StackSlot, NewPhysReg);
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++NumLoads;
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DEBUG(MachineBasicBlock::iterator MII = MI;
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std::cerr << '\t' << *prior(MII));
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DEBUG(std::cerr << "Reuse undone!\n");
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Reuses.erase(Reuses.begin()+ro);
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--NumReused;
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// Finally, PhysReg is now available, go ahead and use it.
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return PhysReg;
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}
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}
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