6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 20:32:21 +00:00
Code Issues Projects Releases Wiki Activity

Assert when reserved registers have been assigned.

Browse Source 
This can only happen if the set of reserved registers changes during
register allocation.

<rdar://problem/10625436>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147486 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-01-03 22:34:31 +00:00
parent c2d064f028
commit 2d44e02533
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/CodeGen/VirtRegMap.cpp
View File

@ -112,6 +112,9 @@ void VirtRegMap::rewrite(SlotIndexes *Indexes) {
SmallVector<unsigned, 8> SuperDeads;
SmallVector<unsigned, 8> SuperDefs;
SmallVector<unsigned, 8> SuperKills;
#ifndef NDEBUG
BitVector Reserved = TRI->getReservedRegs(*MF);
#endif
for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end();
MBBI != MBBE; ++MBBI) {
@ -129,6 +132,7 @@ void VirtRegMap::rewrite(SlotIndexes *Indexes) {
unsigned VirtReg = MO.getReg();
unsigned PhysReg = getPhys(VirtReg);
assert(PhysReg != NO_PHYS_REG && "Instruction uses unmapped VirtReg");
assert(!Reserved.test(PhysReg) && "Reserved register assignment");
// Preserve semantics of sub-register operands.
if (MO.getSubReg()) {