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Add peephole optimizations for ADD [MEM], IMM8 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11511 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -94,6 +94,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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return false;
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case X86::ADDri16: case X86::ADDri32:
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case X86::ADDmi16: case X86::ADDmi32:
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case X86::SUBri16: case X86::SUBri32:
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case X86::ANDri16: case X86::ANDri32:
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case X86::ORri16: case X86::ORri32:
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@ -108,6 +109,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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default: assert(0 && "Unknown opcode value!");
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case X86::ADDri16: Opcode = X86::ADDri16b; break;
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case X86::ADDri32: Opcode = X86::ADDri32b; break;
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case X86::ADDmi16: Opcode = X86::ADDmi16b; break;
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case X86::ADDmi32: Opcode = X86::ADDmi32b; break;
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case X86::SUBri16: Opcode = X86::SUBri16b; break;
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case X86::SUBri32: Opcode = X86::SUBri32b; break;
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case X86::ANDri16: Opcode = X86::ANDri16b; break;
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@ -94,6 +94,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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return false;
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case X86::ADDri16: case X86::ADDri32:
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case X86::ADDmi16: case X86::ADDmi32:
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case X86::SUBri16: case X86::SUBri32:
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case X86::ANDri16: case X86::ANDri32:
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case X86::ORri16: case X86::ORri32:
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@ -108,6 +109,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
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default: assert(0 && "Unknown opcode value!");
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case X86::ADDri16: Opcode = X86::ADDri16b; break;
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case X86::ADDri32: Opcode = X86::ADDri32b; break;
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case X86::ADDmi16: Opcode = X86::ADDmi16b; break;
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case X86::ADDmi32: Opcode = X86::ADDmi32b; break;
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case X86::SUBri16: Opcode = X86::SUBri16b; break;
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case X86::SUBri32: Opcode = X86::SUBri32b; break;
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case X86::ANDri16: Opcode = X86::ANDri16b; break;
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