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Clean up the handling of two-address operands in RegScavenger.
This fixes PR4528. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78107 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -224,11 +224,13 @@ void RegScavenger::forward() {
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BitVector KillRegs(NumPhysRegs);
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for (unsigned i = 0, e = UseMOs.size(); i != e; ++i) {
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const MachineOperand MO = *UseMOs[i].first;
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unsigned Idx = UseMOs[i].second;
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unsigned Reg = MO.getReg();
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assert(isUsed(Reg) && "Using an undefined register!");
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if (MO.isKill() && !isReserved(Reg)) {
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// Two-address operands implicitly kill.
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if ((MO.isKill() || MI->isRegTiedToDefOperand(Idx)) && !isReserved(Reg)) {
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KillRegs.set(Reg);
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// Mark sub-registers as used.
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@@ -251,8 +253,6 @@ void RegScavenger::forward() {
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for (unsigned i = 0, e = NumECs + NumDefs; i != e; ++i) {
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const MachineOperand &MO = (i < NumECs)
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? *EarlyClobberMOs[i].first : *DefMOs[i-NumECs].first;
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unsigned Idx = (i < NumECs)
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? EarlyClobberMOs[i].second : DefMOs[i-NumECs].second;
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unsigned Reg = MO.getReg();
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if (MO.isUndef())
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continue;
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@@ -263,15 +263,6 @@ void RegScavenger::forward() {
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continue;
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}
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// Skip two-address destination operand.
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unsigned UseIdx;
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if (MI->isRegTiedToUseOperand(Idx, &UseIdx) &&
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!MI->getOperand(UseIdx).isUndef()) {
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assert(!MI->getOperand(UseIdx).isKill() &&
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"Using an undefined register!");
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continue;
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}
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// Skip if this is merely redefining part of a super-register.
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if (RedefinesSuperRegPart(MI, MO, TRI))
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continue;
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