6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-22 09:29:31 +00:00
Code Issues Projects Releases Wiki Activity

Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78126 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-08-04 23:47:55 +00:00
parent 9eb5c93d34
commit 35d6c41fde
5 changed files with 10 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/ARM/ARMInstrFormats.td
View File

@ -808,6 +808,10 @@ class ThumbI<dag oops, dag iops, AddrMode am, SizeFlagVal sz,
class TI<dag oops, dag iops, string asm, list<dag> pattern>
: ThumbI<oops, iops, AddrModeNone, Size2Bytes, asm, "", pattern>;
// Two-address instructions
class TIt<dag oops, dag iops, string asm, list<dag> pattern>
: ThumbI<oops, iops, AddrModeNone, Size2Bytes, asm, "$lhs = $dst", pattern>;
// tBL, tBX instructions
class TIx2<dag oops, dag iops, string asm, list<dag> pattern>
: ThumbI<oops, iops, AddrModeNone, Size4Bytes, asm, "", pattern>;

7
lib/Target/ARM/ARMInstrThumb.td
View File

@ -127,10 +127,11 @@ PseudoInst<(outs), (ins i32imm:$amt),
[(ARMcallseq_start imm:$amt)]>, Requires<[IsThumb1Only]>;
}
// For both thumb1 and thumb2.
let isNotDuplicable = 1 in
def tPICADD : T1It<(outs tGPR:$dst), (ins tGPR:$lhs, pclabel:$cp),
"$cp:\n\tadd $dst, pc",
[(set tGPR:$dst, (ARMpic_add tGPR:$lhs, imm:$cp))]>;
def tPICADD : TIt<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp),
"$cp:\n\tadd $dst, pc",
[(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>;
// PC relative add.
def tADDrPCi : T1I<(outs tGPR:$dst), (ins i32imm:$rhs),

6
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -422,12 +422,6 @@ multiclass T2I_bin_rrot<string opc, PatFrag opnode> {
// Miscellaneous Instructions.
//
let isNotDuplicable = 1 in
def t2PICADD : T2XI<(outs GPR:$dst), (ins GPR:$lhs, pclabel:$cp),
"$cp:\n\tadd.w $dst, $lhs, pc",
[(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>;
// LEApcrel - Load a pc-relative address into a register without offending the
// assembler.
def t2LEApcrel : T2XI<(outs GPR:$dst), (ins i32imm:$label, pred:$p),

2
test/CodeGen/Thumb2/load-global.ll
View File

@ -17,7 +17,7 @@ define i32 @test1() {
; DYNAMIC: .long L_G$non_lazy_ptr
; PIC: _test1
; PIC: add.w r0, r0, pc
; PIC: add r0, pc
; PIC: .long L_G$non_lazy_ptr-(LPC0+4)
; LINUX: test1

2
test/CodeGen/Thumb2/pic-load.ll
View File

@ -8,7 +8,7 @@
define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind {
entry:
; CHECK: atexit:
; CHECK: add.w r0, r0, pc
; CHECK: add r0, pc
%r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3]
%0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; <void ()**> [#uses=1]
store void ()* %func, void ()** %0, align 4