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Remove dead code. These ARM instruction definitions no longer exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127509 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2168,7 +2168,7 @@ SDNode *ARMDAGToDAGISel::SelectCMOVOp(SDNode *N) {
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// Emits: (tMOVCCr:i32 GPR:i32:$false, GPR:i32:$true, (imm:i32):$cc)
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// Pattern complexity = 6 cost = 11 size = 0
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//
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// Also FCPYScc and FCPYDcc.
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// Also VMOVScc and VMOVDcc.
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SDValue Tmp2 = CurDAG->getTargetConstant(CCVal, MVT::i32);
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SDValue Ops[] = { FalseVal, TrueVal, Tmp2, CCR, InFlag };
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unsigned Opc = 0;
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@ -1592,14 +1592,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
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// better off using the generic RSCri and RSCrs instructions.
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if (Name == "RSCSri" || Name == "RSCSrs") return false;
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// FCYPScc, FCYPDcc, FNEGScc, and FNEGDcc are used in the compiler
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// to implement conditional moves. We can ignore them in favor of
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// their more generic versions of instructions. See also
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// SDNode *ARMDAGToDAGISel::Select(SDValue Op).
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if (Name == "FCPYScc" || Name == "FCPYDcc" || Name == "FNEGScc" ||
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Name == "FNEGDcc")
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return false;
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// Bcc is in a more generic form than B. Ignore B when decoding.
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if (Name == "B") return false;
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