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Make findLastUseBefore handle reg-unit liveness.
findLastUseBefore was previous considering virtreg liveness only, leading to incorrect live intervals for reg units when instrs with physreg operands were moved up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163685 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1196,14 +1196,35 @@ private:
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// Return the last use of reg between NewIdx and OldIdx.
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SlotIndex findLastUseBefore(unsigned Reg, SlotIndex OldIdx) {
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SlotIndex LastUse = NewIdx;
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for (MachineRegisterInfo::use_nodbg_iterator
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UI = MRI.use_nodbg_begin(Reg),
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UE = MRI.use_nodbg_end();
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UI != UE; UI.skipInstruction()) {
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const MachineInstr* MI = &*UI;
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SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI);
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if (InstSlot > LastUse && InstSlot < OldIdx)
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LastUse = InstSlot;
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if (TargetRegisterInfo::isVirtualRegister(Reg)) {
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for (MachineRegisterInfo::use_nodbg_iterator
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UI = MRI.use_nodbg_begin(Reg),
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UE = MRI.use_nodbg_end();
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UI != UE; UI.skipInstruction()) {
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const MachineInstr* MI = &*UI;
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SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI);
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if (InstSlot > LastUse && InstSlot < OldIdx)
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LastUse = InstSlot;
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}
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} else {
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MachineInstr* MI = LIS.getSlotIndexes()->getInstructionFromIndex(NewIdx);
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MachineBasicBlock::iterator MII(MI);
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++MII;
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MachineBasicBlock* MBB = MI->getParent();
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for (; MII != MBB->end() && LIS.getInstructionIndex(MII) < OldIdx; ++MII){
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for (MachineInstr::mop_iterator MOI = MII->operands_begin(),
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MOE = MII->operands_end();
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MOI != MOE; ++MOI) {
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const MachineOperand& mop = *MOI;
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if (!mop.isReg() || mop.getReg() == 0 ||
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TargetRegisterInfo::isVirtualRegister(mop.getReg()))
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continue;
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if (TRI.hasRegUnit(mop.getReg(), Reg))
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LastUse = LIS.getInstructionIndex(MII);
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}
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}
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}
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return LastUse;
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}
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