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This patch eliminates redundant instructions that produce 0.
For example, the first instruction in the code below can be eliminated if the use of $vr0 is replaced with $zero: addiu $vr0, $zero, 0 add $vr2, $vr1, $vr0 add $vr2, $vr1, $zero git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152280 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -99,6 +99,8 @@ private:
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return CurDAG->getTargetConstant(Imm, Node->getValueType(0));
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}
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void ProcessFunctionAfterISel(MachineFunction &MF);
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bool ReplaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&);
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void InitGlobalBaseReg(MachineFunction &MF);
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virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
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@ -181,10 +183,57 @@ void MipsDAGToDAGISel::InitGlobalBaseReg(MachineFunction &MF) {
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}
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}
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bool MipsDAGToDAGISel::ReplaceUsesWithZeroReg(MachineRegisterInfo *MRI,
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const MachineInstr& MI) {
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unsigned DstReg = 0, ZeroReg = 0;
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// Check if MI is "addiu $dst, $zero, 0" or "daddiu $dst, $zero, 0".
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if ((MI.getOpcode() == Mips::ADDiu) &&
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(MI.getOperand(1).getReg() == Mips::ZERO) &&
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(MI.getOperand(2).getImm() == 0)) {
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DstReg = MI.getOperand(0).getReg();
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ZeroReg = Mips::ZERO;
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} else if ((MI.getOpcode() == Mips::DADDiu) &&
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(MI.getOperand(1).getReg() == Mips::ZERO_64) &&
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(MI.getOperand(2).getImm() == 0)) {
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DstReg = MI.getOperand(0).getReg();
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ZeroReg = Mips::ZERO_64;
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}
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if (!DstReg)
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return false;
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// Replace uses with ZeroReg.
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for (MachineRegisterInfo::use_iterator U = MRI->use_begin(DstReg),
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E = MRI->use_end(); U != E; ++U) {
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MachineOperand &MO = U.getOperand();
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MachineInstr *MI = MO.getParent();
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// Do not replace if it is a phi's operand or is tied to def operand.
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if (MI->isPHI() || MI->isRegTiedToDefOperand(U.getOperandNo()))
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continue;
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MO.setReg(ZeroReg);
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}
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return true;
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}
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void MipsDAGToDAGISel::ProcessFunctionAfterISel(MachineFunction &MF) {
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InitGlobalBaseReg(MF);
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MachineRegisterInfo *MRI = &MF.getRegInfo();
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for (MachineFunction::iterator MFI = MF.begin(), MFE = MF.end(); MFI != MFE;
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++MFI)
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for (MachineBasicBlock::iterator I = MFI->begin(); I != MFI->end(); ++I)
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ReplaceUsesWithZeroReg(MRI, *I);
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}
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bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
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bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
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InitGlobalBaseReg(MF);
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ProcessFunctionAfterISel(MF);
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return Ret;
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}
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