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May need to promote the operand (either sign_extend_inreg or and) before

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expanding a {s|u}int_to_fp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32665 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-12-19 01:44:04 +00:00
parent 6d0483a7a3
commit 7df28dc9d7
1 changed files with 29 additions and 18 deletions
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47
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -5072,24 +5072,6 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
case ISD::FP_ROUND:
Lo = ExpandLibCall("__truncdfsf2", Node, Hi);
break;
case ISD::SINT_TO_FP: {
const char *FnName = 0;
if (Node->getOperand(0).getValueType() == MVT::i64)
FnName = (VT == MVT::f32) ? "__floatdisf" : "__floatdidf";
else
FnName = (VT == MVT::f32) ? "__floatsisf" : "__floatsidf";
Lo = ExpandLibCall(FnName, Node, Hi);
break;
}
case ISD::UINT_TO_FP: {
const char *FnName = 0;
if (Node->getOperand(0).getValueType() == MVT::i64)
FnName = (VT == MVT::f32) ? "__floatundisf" : "__floatundidf";
else
FnName = (VT == MVT::f32) ? "__floatunsisf" : "__floatunsidf";
Lo = ExpandLibCall(FnName, Node, Hi);
break;
}
case ISD::FSQRT:
case ISD::FSIN:
case ISD::FCOS: {
@ -5125,6 +5107,35 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
ExpandOp(Lo, Lo, Hi);
break;
}
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP: {
bool isSigned = Node->getOpcode() == ISD::SINT_TO_FP;
MVT::ValueType SrcVT = Node->getOperand(0).getValueType();
const char *FnName = 0;
if (Node->getOperand(0).getValueType() == MVT::i64) {
if (VT == MVT::f32)
FnName = isSigned ? "__floatdisf" : "__floatundisf";
else
FnName = isSigned ? "__floatdidf" : "__floatundidf";
} else {
if (VT == MVT::f32)
FnName = isSigned ? "__floatsisf" : "__floatunsisf";
else
FnName = isSigned ? "__floatsidf" : "__floatunsidf";
}
// Promote the operand if needed.
if (getTypeAction(SrcVT) == Promote) {
SDOperand Tmp = PromoteOp(Node->getOperand(0));
Tmp = isSigned
? DAG.getNode(ISD::SIGN_EXTEND_INREG, Tmp.getValueType(), Tmp,
DAG.getValueType(SrcVT))
: DAG.getZeroExtendInReg(Tmp, SrcVT);
Node = DAG.UpdateNodeOperands(Op, Tmp).Val;
}
Lo = ExpandLibCall(FnName, Node, Hi);
break;
}
}
// Make sure the resultant values have been legalized themselves, unless this