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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
Fixed some spelling errors. Thanks, Duncan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48819 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -81,7 +81,7 @@ public:
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void Schedule();
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/// IsReachable - Checks if SU is reachable from TargetSU
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/// IsReachable - Checks if SU is reachable from TargetSU.
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bool IsReachable(SUnit *SU, SUnit *TargetSU);
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/// willCreateCycle - Returns true if adding an edge from SU to TargetSU will
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@ -90,13 +90,13 @@ public:
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/// AddPred - This adds the specified node X as a predecessor of
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/// the current node Y if not already.
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/// This returns true if this is a new pred.
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/// Updates the topological oredering if required.
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/// This returns true if this is a new predecessor.
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/// Updates the topological ordering if required.
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bool AddPred(SUnit *Y, SUnit *X, bool isCtrl, bool isSpecial,
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unsigned PhyReg = 0, int Cost = 1);
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unsigned PhyReg = 0, int Cost = 1);
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/// RemovePred - This removes the specified node N from predecessors of
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/// the current node M. Updates the topological oredering if required
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/// RemovePred - This removes the specified node N from the predecessors of
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/// the current node M. Updates the topological ordering if required.
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bool RemovePred(SUnit *M, SUnit *N, bool isCtrl, bool isSpecial);
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private:
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@ -119,20 +119,20 @@ private:
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/// CreateNewSUnit - Creates a new SUnit and returns a pointer to it.
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/// Updates the topological oredering if required.
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/// Updates the topological ordering if required.
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SUnit *CreateNewSUnit(SDNode *N) {
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SUnit *NewNode = NewSUnit(N);
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// Update the topologic ordering
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// Update the topological ordering.
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if (NewNode->NodeNum >= Node2Index.size())
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InitDAGTopologicalSorting();
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return NewNode;
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}
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/// CreateClone - Creates a new SUnit from old one.
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/// Updates the topological oredering if required.
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/// CreateClone - Creates a new SUnit from an existing one.
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/// Updates the topological ordering if required.
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SUnit *CreateClone(SUnit *N) {
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SUnit *NewNode = Clone(N);
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// Update the topologic ordering
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// Update the topological ordering.
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if (NewNode->NodeNum >= Node2Index.size())
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InitDAGTopologicalSorting();
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return NewNode;
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@ -140,21 +140,21 @@ private:
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/// Functions for preserving the topological ordering
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/// even after dynamic insertions of new edges.
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/// This allows for very fast implementation of IsReachable.
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/// This allows a very fast implementation of IsReachable.
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/**
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The idea of the algorithm is taken from
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"Online algorithms for managing the topological order of
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a directed acyclic graph" by David J.Pearce and Paul H.J. Kelly
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This is the MNR algorithm, which is first introduced by
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A.Marchetti-Spaccamela, U.Nanni and H.Rohnert in
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a directed acyclic graph" by David J. Pearce and Paul H.J. Kelly
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This is the MNR algorithm, which was first introduced by
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A. Marchetti-Spaccamela, U. Nanni and H. Rohnert in
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"Maintaining a topological order under edge insertions".
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Short description of the algorithm:
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Topological ordering, ord, of a DAG maps each node to a topological
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index so that fall all edges X->Y it is the case that ord(X) < ord(Y).
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index so that for all edges X->Y it is the case that ord(X) < ord(Y).
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This means that if there is a path from the node X to the node Z,
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then ord(X) < ord(Z).
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@ -163,7 +163,7 @@ private:
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if Z is reachable from X, then an insertion of the edge Z->X would
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create a cycle.
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Algorithm first computes a topological ordering for a DAG by initializing
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The algorithm first computes a topological ordering for the DAG by initializing
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the Index2Node and Node2Index arrays and then tries to keep the ordering
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up-to-date after edge insertions by reordering the DAG.
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@ -172,27 +172,27 @@ private:
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after X in Index2Node.
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*/
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/// InitDAGTopologicalSorting - create the initial topological
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/// ordering from the DAG to be scheduled
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/// InitDAGTopologicalSorting - create the initial topological
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/// ordering from the DAG to be scheduled.
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void InitDAGTopologicalSorting();
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/// DFS - make a DFS traversal and mark all nodes affected by the
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/// edge insertion. These nodes should later get new topological indexes
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/// by means of Shift method
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/// edge insertion. These nodes will later get new topological indexes
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/// by means of the Shift method.
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void DFS(SUnit *SU, int UpperBound, bool& HasLoop);
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/// Shift - reassign topological indexes for the nodes in the DAG
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/// to preserve the topological ordering
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/// to preserve the topological ordering.
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void Shift(BitVector& Visited, int LowerBound, int UpperBound);
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/// Allocate - assign the topological index to a node n
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/// Allocate - assign the topological index to the node n.
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void Allocate(int n, int index);
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/// Index2Node - Maps topological index to the node number
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/// Index2Node - Maps topological index to the node number.
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std::vector<int> Index2Node;
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/// Node2Index - Maps the node number to its topological index
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/// Node2Index - Maps the node number to its topological index.
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std::vector<int> Node2Index;
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/// Visited - a set of nodes visited during a DFS traversal
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/// Visited - a set of nodes visited during a DFS traversal.
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BitVector Visited;
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};
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} // end anonymous namespace
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@ -425,8 +425,8 @@ void ScheduleDAGRRList::UnscheduleNodeBottomUp(SUnit *SU) {
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/// IsReachable - Checks if SU is reachable from TargetSU.
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bool ScheduleDAGRRList::IsReachable(SUnit *SU, SUnit *TargetSU) {
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// If insertion of the edge SU->TargetSU would creates a cycle
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// then there is a path from TargetSU to SU
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// If insertion of the edge SU->TargetSU would create a cycle
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// then there is a path from TargetSU to SU.
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int UpperBound, LowerBound;
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LowerBound = Node2Index[TargetSU->NodeNum];
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UpperBound = Node2Index[SU->NodeNum];
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@ -440,14 +440,14 @@ bool ScheduleDAGRRList::IsReachable(SUnit *SU, SUnit *TargetSU) {
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return HasLoop;
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}
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/// Allocate - assign the topological index to a node n
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/// Allocate - assign the topological index to the node n.
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inline void ScheduleDAGRRList::Allocate(int n, int index) {
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Node2Index[n] = index;
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Index2Node[index] = n;
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}
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/// InitDAGTopologicalSorting - create the initial topological
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/// ordering from the DAG to be scheduled.
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/// InitDAGTopologicalSorting - create the initial topological
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/// ordering from the DAG to be scheduled.
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void ScheduleDAGRRList::InitDAGTopologicalSorting() {
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unsigned DAGSize = SUnits.size();
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std::vector<unsigned> InDegree(DAGSize);
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@ -456,7 +456,7 @@ void ScheduleDAGRRList::InitDAGTopologicalSorting() {
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std::vector<SUnit*> TopOrder;
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TopOrder.reserve(DAGSize);
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// Initialize the data structures
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// Initialize the data structures.
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for (unsigned i = 0, e = DAGSize; i != e; ++i) {
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SUnit *SU = &SUnits[i];
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int NodeNum = SU->NodeNum;
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@ -466,7 +466,7 @@ void ScheduleDAGRRList::InitDAGTopologicalSorting() {
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// Is it a node without dependencies?
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if (Degree == 0) {
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assert(SU->Succs.empty() && "SUnit should have no successors");
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// Collect leaf nodes
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// Collect leaf nodes.
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WorkList.push_back(SU);
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}
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}
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@ -480,7 +480,7 @@ void ScheduleDAGRRList::InitDAGTopologicalSorting() {
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SUnit *SU = I->Dep;
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if (!--InDegree[SU->NodeNum])
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// If all dependencies of the node are processed already,
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// then the node can be computed now
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// then the node can be computed now.
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WorkList.push_back(SU);
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}
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}
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@ -513,8 +513,8 @@ void ScheduleDAGRRList::InitDAGTopologicalSorting() {
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#endif
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}
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/// AddPred - adds edge from SUnit X to SUnit Y
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/// Updates the topological oredering if required.
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/// AddPred - adds an edge from SUnit X to SUnit Y.
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/// Updates the topological ordering if required.
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bool ScheduleDAGRRList::AddPred(SUnit *Y, SUnit *X, bool isCtrl, bool isSpecial,
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unsigned PhyReg, int Cost) {
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int UpperBound, LowerBound;
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@ -523,26 +523,28 @@ bool ScheduleDAGRRList::AddPred(SUnit *Y, SUnit *X, bool isCtrl, bool isSpecial,
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bool HasLoop = false;
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// Is Ord(X) < Ord(Y) ?
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if (LowerBound < UpperBound) {
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// Update the topological order
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// Update the topological order.
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Visited.reset();
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DFS(Y, UpperBound, HasLoop);
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assert(!HasLoop && "Inserted edge creates a loop!");
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// Recompute topological indexes
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// Recompute topological indexes.
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Shift(Visited, LowerBound, UpperBound);
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}
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// Now really insert the edge
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return Y->addPred(X,isCtrl,isSpecial,PhyReg,Cost);
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// Now really insert the edge.
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return Y->addPred(X, isCtrl, isSpecial, PhyReg, Cost);
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}
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/// RemovePred - This removes the specified node N from preds of
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/// the current node M. Updates the topological oredering if required
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/// RemovePred - This removes the specified node N from the predecessors of
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/// the current node M. Updates the topological ordering if required.
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bool ScheduleDAGRRList::RemovePred(SUnit *M, SUnit *N,
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bool isCtrl, bool isSpecial) {
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// InitDAGTopologicalSorting();
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return M->removePred(N, isCtrl, isSpecial);
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}
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/// DFS - make a DFS traversal to mark all nodes reachable from SU and and mark /// all nodes affected by the edge insertion. These nodes should later get new /// topological indexes by means of the Shift method
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/// DFS - Make a DFS traversal to mark all nodes reachable from SU and mark
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/// all nodes affected by the edge insertion. These nodes will later get new
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/// topological indexes by means of the Shift method.
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void ScheduleDAGRRList::DFS(SUnit *SU, int UpperBound, bool& HasLoop) {
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std::vector<SUnit*> WorkList;
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WorkList.reserve(SUnits.size());
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@ -558,7 +560,7 @@ void ScheduleDAGRRList::DFS(SUnit *SU, int UpperBound, bool& HasLoop) {
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HasLoop = true;
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return;
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}
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// Visit successors if not already and is in affected region
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// Visit successors if not already and in affected region.
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if (!Visited.test(s) && Node2Index[s] < UpperBound) {
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WorkList.push_back(SU->Succs[I].Dep);
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}
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@ -566,8 +568,8 @@ void ScheduleDAGRRList::DFS(SUnit *SU, int UpperBound, bool& HasLoop) {
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}
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}
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/// Shift - renumber the nodes so that the topological ordering is
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/// preserved
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/// Shift - Renumber the nodes so that the topological ordering is
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/// preserved.
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void ScheduleDAGRRList::Shift(BitVector& Visited, int LowerBound,
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int UpperBound) {
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std::vector<int> L;
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@ -575,10 +577,10 @@ void ScheduleDAGRRList::Shift(BitVector& Visited, int LowerBound,
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int i;
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for (i = LowerBound; i <= UpperBound; ++i) {
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// w is node at topological index i
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// w is node at topological index i.
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int w = Index2Node[i];
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if (Visited.test(w)) {
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// Unmark
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// Unmark.
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Visited.reset(w);
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L.push_back(w);
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shift = shift + 1;
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@ -742,27 +744,27 @@ SUnit *ScheduleDAGRRList::CopyAndMoveSuccessors(SUnit *SU) {
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RemovePred(SU, Pred->Dep, Pred->isCtrl, Pred->isSpecial);
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if (isNewLoad) {
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AddPred(LoadSU, Pred->Dep, Pred->isCtrl, Pred->isSpecial,
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Pred->Reg, Pred->Cost);
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Pred->Reg, Pred->Cost);
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}
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}
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for (unsigned i = 0, e = NodePreds.size(); i != e; ++i) {
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SDep *Pred = &NodePreds[i];
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RemovePred(SU, Pred->Dep, Pred->isCtrl, Pred->isSpecial);
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AddPred(NewSU, Pred->Dep, Pred->isCtrl, Pred->isSpecial,
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Pred->Reg, Pred->Cost);
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Pred->Reg, Pred->Cost);
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}
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for (unsigned i = 0, e = NodeSuccs.size(); i != e; ++i) {
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SDep *Succ = &NodeSuccs[i];
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RemovePred(Succ->Dep, SU, Succ->isCtrl, Succ->isSpecial);
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AddPred(Succ->Dep, NewSU, Succ->isCtrl, Succ->isSpecial,
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Succ->Reg, Succ->Cost);
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Succ->Reg, Succ->Cost);
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}
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for (unsigned i = 0, e = ChainSuccs.size(); i != e; ++i) {
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SDep *Succ = &ChainSuccs[i];
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RemovePred(Succ->Dep, SU, Succ->isCtrl, Succ->isSpecial);
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if (isNewLoad) {
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AddPred(Succ->Dep, LoadSU, Succ->isCtrl, Succ->isSpecial,
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Succ->Reg, Succ->Cost);
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Succ->Reg, Succ->Cost);
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}
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}
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if (isNewLoad) {
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