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Revert "r227976 - [PowerPC] Yet another approach to __tls_get_addr" and related fixups
Unfortunately, even with the workaround of disabling the linker TLS optimizations in Clang restored (which has already been done), this still breaks self-hosting on my P7 machine (-O3 -DNDEBUG -mcpu=native). Bill is currently working on an alternate implementation to address the TLS issue in a way that also fully elides the linker bug (which, unfortunately, this approach did not fully), so I'm reverting this now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228460 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel
parent
ead6da39e9
commit
9168f717c9
@ -32,7 +32,6 @@ add_llvm_target(PowerPCCodeGen
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PPCTargetObjectFile.cpp
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PPCTargetTransformInfo.cpp
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PPCSelectionDAGInfo.cpp
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PPCTLSDynamicCall.cpp
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PPCVSXCopy.cpp
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PPCVSXFMAMutate.cpp
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)
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@ -40,7 +40,6 @@ namespace llvm {
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FunctionPass *createPPCVSXFMAMutatePass();
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FunctionPass *createPPCBranchSelectionPass();
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FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
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FunctionPass *createPPCTLSDynamicCallPass();
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void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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AsmPrinter &AP, bool isDarwin);
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@ -91,7 +90,12 @@ namespace llvm {
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MO_TOC_LO = 7 << 4,
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// Symbol for VK_PPC_TLS fixup attached to an ADD instruction
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MO_TLS = 8 << 4
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MO_TLS = 8 << 4,
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// Symbols for VK_PPC_TLSGD and VK_PPC_TLSLD in __tls_get_addr
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// call sequences.
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MO_TLSLD = 9 << 4,
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MO_TLSGD = 10 << 4
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};
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} // end namespace PPCII
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@ -101,7 +101,6 @@ namespace {
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const MachineInstr &MI);
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void LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
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const MachineInstr &MI);
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void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
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};
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/// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
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@ -405,39 +404,6 @@ void PPCAsmPrinter::LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
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EmitToStreamer(OutStreamer, MCInstBuilder(PPC::NOP));
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}
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/// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
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/// call to __tls_get_addr to the current output stream.
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void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
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MCSymbolRefExpr::VariantKind VK) {
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StringRef Name = "__tls_get_addr";
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MCSymbol *TlsGetAddr = OutContext.GetOrCreateSymbol(Name);
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MCSymbolRefExpr::VariantKind Kind = MCSymbolRefExpr::VK_None;
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assert(MI->getOperand(0).isReg() &&
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((Subtarget.isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
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(!Subtarget.isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
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"GETtls[ld]ADDR[32] must define GPR3");
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assert(MI->getOperand(1).isReg() &&
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((Subtarget.isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
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(!Subtarget.isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
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"GETtls[ld]ADDR[32] must read GPR3");
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if (!Subtarget.isPPC64() && !Subtarget.isDarwin() &&
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TM.getRelocationModel() == Reloc::PIC_)
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Kind = MCSymbolRefExpr::VK_PLT;
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const MCSymbolRefExpr *TlsRef =
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MCSymbolRefExpr::Create(TlsGetAddr, Kind, OutContext);
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const MachineOperand &MO = MI->getOperand(2);
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const GlobalValue *GValue = MO.getGlobal();
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MCSymbol *MOSymbol = getSymbol(GValue);
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const MCExpr *SymVar = MCSymbolRefExpr::Create(MOSymbol, VK, OutContext);
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EmitToStreamer(OutStreamer,
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MCInstBuilder(Subtarget.isPPC64() ?
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PPC::BL8_NOP_TLS : PPC::BL_TLS)
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.addExpr(TlsRef)
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.addExpr(SymVar));
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}
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/// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
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/// the current output stream.
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///
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@ -841,15 +807,6 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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.addExpr(SymGotTlsGD));
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return;
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}
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case PPC::GETtlsADDR:
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// Transform: %X3 = GETtlsADDR %X3, <ga:@sym>
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// Into: BL8_NOP_TLS __tls_get_addr(sym@tlsgd)
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case PPC::GETtlsADDR32: {
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// Transform: %R3 = GETtlsADDR32 %R3, <ga:@sym>
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// Into: BL_TLS __tls_get_addr(sym@tlsgd)@PLT
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EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD);
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return;
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}
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case PPC::ADDIStlsldHA: {
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// Transform: %Xd = ADDIStlsldHA %X2, <ga:@sym>
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// Into: %Xd = ADDIS8 %X2, sym@got@tlsld@ha
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@ -887,15 +844,6 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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.addExpr(SymGotTlsLD));
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return;
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}
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case PPC::GETtlsldADDR:
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// Transform: %X3 = GETtlsldADDR %X3, <ga:@sym>
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// Into: BL8_NOP_TLS __tls_get_addr(sym@tlsld)
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case PPC::GETtlsldADDR32: {
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// Transform: %R3 = GETtlsldADDR32 %R3, <ga:@sym>
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// Into: BL_TLS __tls_get_addr(sym@tlsld)@PLT
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EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD);
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return;
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}
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case PPC::ADDISdtprelHA:
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// Transform: %Xd = ADDISdtprelHA %X3, <ga:@sym>
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// Into: %Xd = ADDIS8 %X3, sym@dtprel@ha
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@ -355,20 +355,6 @@ static bool hasNonRISpills(const MachineFunction &MF) {
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return FuncInfo->hasNonRISpills();
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}
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/// MustSaveLR - Return true if this function requires that we save the LR
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/// register onto the stack in the prolog and restore it in the epilog of the
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/// function.
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static bool MustSaveLR(const MachineFunction &MF, unsigned LR) {
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const PPCFunctionInfo *MFI = MF.getInfo<PPCFunctionInfo>();
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// We need a save/restore of LR if there is any def of LR (which is
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// defined by calls, including the PIC setup sequence), or if there is
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// some use of the LR stack slot (e.g. for builtin_return_address).
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// (LR comes in 32 and 64 bit versions.)
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MachineRegisterInfo::def_iterator RI = MF.getRegInfo().def_begin(LR);
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return RI !=MF.getRegInfo().def_end() || MFI->isLRStoreRequired();
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}
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/// determineFrameLayout - Determine the size of the frame and maximum call
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/// frame size.
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unsigned PPCFrameLowering::determineFrameLayout(MachineFunction &MF,
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@ -395,7 +381,6 @@ unsigned PPCFrameLowering::determineFrameLayout(MachineFunction &MF,
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// stackless code if all local vars are reg-allocated.
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bool DisableRedZone = MF.getFunction()->getAttributes().
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hasAttribute(AttributeSet::FunctionIndex, Attribute::NoRedZone);
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unsigned LR = RegInfo->getRARegister();
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if (!DisableRedZone &&
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(Subtarget.isPPC64() || // 32-bit SVR4, no stack-
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!Subtarget.isSVR4ABI() || // allocated locals.
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@ -403,7 +388,6 @@ unsigned PPCFrameLowering::determineFrameLayout(MachineFunction &MF,
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FrameSize <= 224 && // Fits in red zone.
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!MFI->hasVarSizedObjects() && // No dynamic alloca.
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!MFI->adjustsStack() && // No calls.
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!MustSaveLR(MF, LR) &&
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!RegInfo->hasBasePointer(MF)) { // No special alignment.
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// No need for frame
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if (UpdateMF)
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@ -1124,6 +1108,20 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
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}
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}
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/// MustSaveLR - Return true if this function requires that we save the LR
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/// register onto the stack in the prolog and restore it in the epilog of the
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/// function.
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static bool MustSaveLR(const MachineFunction &MF, unsigned LR) {
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const PPCFunctionInfo *MFI = MF.getInfo<PPCFunctionInfo>();
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// We need a save/restore of LR if there is any def of LR (which is
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// defined by calls, including the PIC setup sequence), or if there is
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// some use of the LR stack slot (e.g. for builtin_return_address).
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// (LR comes in 32 and 64 bit versions.)
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MachineRegisterInfo::def_iterator RI = MF.getRegInfo().def_begin(LR);
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return RI !=MF.getRegInfo().def_end() || MFI->isLRStoreRequired();
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}
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void
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PPCFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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RegScavenger *) const {
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@ -806,6 +806,8 @@ const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
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case PPCISD::SHL: return "PPCISD::SHL";
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case PPCISD::CALL: return "PPCISD::CALL";
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case PPCISD::CALL_NOP: return "PPCISD::CALL_NOP";
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case PPCISD::CALL_TLS: return "PPCISD::CALL_TLS";
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case PPCISD::CALL_NOP_TLS: return "PPCISD::CALL_NOP_TLS";
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case PPCISD::MTCTR: return "PPCISD::MTCTR";
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case PPCISD::BCTRL: return "PPCISD::BCTRL";
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case PPCISD::BCTRL_LOAD_TOC: return "PPCISD::BCTRL_LOAD_TOC";
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@ -839,10 +841,8 @@ const char *PPCTargetLowering::getTargetNodeName(unsigned Opcode) const {
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case PPCISD::ADD_TLS: return "PPCISD::ADD_TLS";
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case PPCISD::ADDIS_TLSGD_HA: return "PPCISD::ADDIS_TLSGD_HA";
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case PPCISD::ADDI_TLSGD_L: return "PPCISD::ADDI_TLSGD_L";
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case PPCISD::GET_TLS_ADDR: return "PPCISD::GET_TLS_ADDR";
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case PPCISD::ADDIS_TLSLD_HA: return "PPCISD::ADDIS_TLSLD_HA";
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case PPCISD::ADDI_TLSLD_L: return "PPCISD::ADDI_TLSLD_L";
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case PPCISD::GET_TLSLD_ADDR: return "PPCISD::GET_TLSLD_ADDR";
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case PPCISD::ADDIS_DTPREL_HA: return "PPCISD::ADDIS_DTPREL_HA";
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case PPCISD::ADDI_DTPREL_L: return "PPCISD::ADDI_DTPREL_L";
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case PPCISD::VADD_SPLAT: return "PPCISD::VADD_SPLAT";
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@ -1701,6 +1701,27 @@ SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
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return LowerLabelRef(TgtBAHi, TgtBALo, isPIC, DAG);
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}
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// Generate a call to __tls_get_addr for the given GOT entry Op.
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std::pair<SDValue,SDValue>
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PPCTargetLowering::lowerTLSCall(SDValue Op, SDLoc dl,
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SelectionDAG &DAG) const {
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Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
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TargetLowering::ArgListTy Args;
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TargetLowering::ArgListEntry Entry;
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Entry.Node = Op;
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Entry.Ty = IntPtrTy;
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Args.push_back(Entry);
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TargetLowering::CallLoweringInfo CLI(DAG);
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CLI.setDebugLoc(dl).setChain(DAG.getEntryNode())
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.setCallee(CallingConv::C, IntPtrTy,
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DAG.getTargetExternalSymbol("__tls_get_addr", getPointerTy()),
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std::move(Args), 0);
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return LowerCallTo(CLI);
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}
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SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
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SelectionDAG &DAG) const {
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@ -1747,7 +1768,8 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
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}
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if (Model == TLSModel::GeneralDynamic) {
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SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
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SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
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PPCII::MO_TLSGD);
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SDValue GOTPtr;
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if (is64bit) {
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setUsesTOCBasePtr(DAG);
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@ -1760,13 +1782,15 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
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else
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GOTPtr = DAG.getNode(PPCISD::PPC32_PICGOT, dl, PtrVT);
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}
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SDValue GOTEntry = DAG.getNode(PPCISD::ADDI_TLSGD_L, dl,
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PtrVT, GOTPtr, TGA);
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return DAG.getNode(PPCISD::GET_TLS_ADDR, dl, PtrVT, GOTEntry, TGA);
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SDValue GOTEntry = DAG.getNode(PPCISD::ADDI_TLSGD_L, dl, PtrVT,
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GOTPtr, TGA);
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std::pair<SDValue, SDValue> CallResult = lowerTLSCall(GOTEntry, dl, DAG);
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return CallResult.first;
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}
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if (Model == TLSModel::LocalDynamic) {
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SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
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SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
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PPCII::MO_TLSLD);
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SDValue GOTPtr;
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if (is64bit) {
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setUsesTOCBasePtr(DAG);
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@ -1781,10 +1805,11 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
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}
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SDValue GOTEntry = DAG.getNode(PPCISD::ADDI_TLSLD_L, dl, PtrVT,
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GOTPtr, TGA);
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SDValue TLSAddr = DAG.getNode(PPCISD::GET_TLSLD_ADDR, dl,
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PtrVT, GOTEntry, TGA);
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SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl,
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PtrVT, TLSAddr, TGA);
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std::pair<SDValue, SDValue> CallResult = lowerTLSCall(GOTEntry, dl, DAG);
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SDValue TLSAddr = CallResult.first;
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SDValue Chain = CallResult.second;
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SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl, PtrVT,
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Chain, TLSAddr, TGA);
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return DAG.getNode(PPCISD::ADDI_DTPREL_L, dl, PtrVT, DtvOffsetHi, TGA);
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}
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@ -3808,6 +3833,23 @@ unsigned PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag,
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if (Callee.getNode()) {
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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// If this is a call to __tls_get_addr, find the symbol whose address
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// is to be taken and add it to the list. This will be used to
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// generate __tls_get_addr(<sym>@tlsgd) or __tls_get_addr(<sym>@tlsld).
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// We find the symbol by walking the chain to the CopyFromReg, walking
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// back from the CopyFromReg to the ADDI_TLSGD_L or ADDI_TLSLD_L, and
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// pulling the symbol from that node.
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if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee))
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if (!strcmp(S->getSymbol(), "__tls_get_addr")) {
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assert(!needIndirectCall && "Indirect call to __tls_get_addr???");
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SDNode *AddI = Chain.getNode()->getOperand(2).getNode();
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SDValue TGTAddr = AddI->getOperand(1);
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assert(TGTAddr.getNode()->getOpcode() == ISD::TargetGlobalTLSAddress &&
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"Didn't find target global TLS address where we expected one");
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Ops.push_back(TGTAddr);
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CallOpc = PPCISD::CALL_TLS;
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}
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}
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// If this is a tail call add stack pointer delta.
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if (isTailCall)
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@ -3970,9 +4012,12 @@ PPCTargetLowering::FinishCall(CallingConv::ID CallConv, SDLoc dl,
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Ops.insert(std::next(Ops.begin()), AddTOC);
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} else if ((CallOpc == PPCISD::CALL) &&
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(!isLocalCall(Callee) ||
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DAG.getTarget().getRelocationModel() == Reloc::PIC_))
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DAG.getTarget().getRelocationModel() == Reloc::PIC_)) {
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// Otherwise insert NOP for non-local calls.
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CallOpc = PPCISD::CALL_NOP;
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} else if (CallOpc == PPCISD::CALL_TLS)
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// For 64-bit SVR4, TLS calls are always non-local.
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CallOpc = PPCISD::CALL_NOP_TLS;
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}
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Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops);
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@ -101,6 +101,10 @@ namespace llvm {
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/// SVR4 calls.
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CALL, CALL_NOP,
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/// CALL_TLS and CALL_NOP_TLS - Versions of CALL and CALL_NOP used
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/// to access TLS variables.
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CALL_TLS, CALL_NOP_TLS,
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/// CHAIN,FLAG = MTCTR(VAL, CHAIN[, INFLAG]) - Directly corresponds to a
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/// MTCTR instruction.
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MTCTR,
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@ -224,10 +228,6 @@ namespace llvm {
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/// sym\@got\@tlsgd\@l.
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ADDI_TLSGD_L,
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/// G8RC = GET_TLS_ADDR %X3, Symbol - For the general-dynamic TLS
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/// model, produces a call to __tls_get_addr(sym\@tlsgd).
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GET_TLS_ADDR,
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/// G8RC = ADDIS_TLSLD_HA %X2, Symbol - For the local-dynamic TLS
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/// model, produces an ADDIS8 instruction that adds the GOT base
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/// register to sym\@got\@tlsld\@ha.
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@ -238,13 +238,11 @@ namespace llvm {
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/// sym\@got\@tlsld\@l.
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ADDI_TLSLD_L,
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/// G8RC = GET_TLSLD_ADDR %X3, Symbol - For the local-dynamic TLS
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/// model, produces a call to __tls_get_addr(sym\@tlsld).
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GET_TLSLD_ADDR,
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/// G8RC = ADDIS_DTPREL_HA %X3, Symbol - For the local-dynamic TLS
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/// model, produces an ADDIS8 instruction that adds X3 to
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/// sym\@dtprel\@ha.
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/// G8RC = ADDIS_DTPREL_HA %X3, Symbol, Chain - For the
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/// local-dynamic TLS model, produces an ADDIS8 instruction
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/// that adds X3 to sym\@dtprel\@ha. The Chain operand is needed
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/// to tie this in place following a copy to %X3 from the result
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/// of a GET_TLSLD_ADDR.
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ADDIS_DTPREL_HA,
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/// G8RC = ADDI_DTPREL_L G8RReg, Symbol - For the local-dynamic TLS
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@ -637,6 +635,8 @@ namespace llvm {
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SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
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std::pair<SDValue,SDValue> lowerTLSCall(SDValue Op, SDLoc dl,
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SelectionDAG &DAG) const;
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SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
|
||||
SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
|
||||
|
||||
@ -202,6 +202,9 @@ def : Pat<(PPCcall (i64 texternalsym:$dst)),
|
||||
def : Pat<(PPCcall_nop (i64 texternalsym:$dst)),
|
||||
(BL8_NOP texternalsym:$dst)>;
|
||||
|
||||
def : Pat<(PPCcall_nop_tls texternalsym:$func, tglobaltlsaddr:$sym),
|
||||
(BL8_NOP_TLS texternalsym:$func, tglobaltlsaddr:$sym)>;
|
||||
|
||||
// Atomic operations
|
||||
let usesCustomInserter = 1 in {
|
||||
let Defs = [CR0] in {
|
||||
@ -901,12 +904,6 @@ def ADDItlsgdL : Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp),
|
||||
[(set i64:$rD,
|
||||
(PPCaddiTlsgdL i64:$reg, tglobaltlsaddr:$disp))]>,
|
||||
isPPC64;
|
||||
let hasExtraSrcRegAllocReq = 1, hasExtraDefRegAllocReq = 1, Defs = [LR8] in
|
||||
def GETtlsADDR : Pseudo<(outs g8rc:$rD), (ins g8rc:$reg, tlsgd:$sym),
|
||||
"#GETtlsADDR",
|
||||
[(set i64:$rD,
|
||||
(PPCgetTlsAddr i64:$reg, tglobaltlsaddr:$sym))]>,
|
||||
isPPC64;
|
||||
def ADDIStlsldHA: Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp),
|
||||
"#ADDIStlsldHA",
|
||||
[(set i64:$rD,
|
||||
@ -917,12 +914,6 @@ def ADDItlsldL : Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp),
|
||||
[(set i64:$rD,
|
||||
(PPCaddiTlsldL i64:$reg, tglobaltlsaddr:$disp))]>,
|
||||
isPPC64;
|
||||
let hasExtraSrcRegAllocReq = 1, hasExtraDefRegAllocReq = 1, Defs = [LR8] in
|
||||
def GETtlsldADDR : Pseudo<(outs g8rc:$rD), (ins g8rc:$reg, tlsgd:$sym),
|
||||
"#GETtlsldADDR",
|
||||
[(set i64:$rD,
|
||||
(PPCgetTlsldAddr i64:$reg, tglobaltlsaddr:$sym))]>,
|
||||
isPPC64;
|
||||
def ADDISdtprelHA: Pseudo<(outs g8rc:$rD), (ins g8rc_nox0:$reg, s16imm64:$disp),
|
||||
"#ADDISdtprelHA",
|
||||
[(set i64:$rD,
|
||||
|
||||
@ -110,11 +110,10 @@ def PPCldGotTprelL : SDNode<"PPCISD::LD_GOT_TPREL_L", SDTIntBinOp,
|
||||
def PPCaddTls : SDNode<"PPCISD::ADD_TLS", SDTIntBinOp, []>;
|
||||
def PPCaddisTlsgdHA : SDNode<"PPCISD::ADDIS_TLSGD_HA", SDTIntBinOp>;
|
||||
def PPCaddiTlsgdL : SDNode<"PPCISD::ADDI_TLSGD_L", SDTIntBinOp>;
|
||||
def PPCgetTlsAddr : SDNode<"PPCISD::GET_TLS_ADDR", SDTIntBinOp>;
|
||||
def PPCaddisTlsldHA : SDNode<"PPCISD::ADDIS_TLSLD_HA", SDTIntBinOp>;
|
||||
def PPCaddiTlsldL : SDNode<"PPCISD::ADDI_TLSLD_L", SDTIntBinOp>;
|
||||
def PPCgetTlsldAddr : SDNode<"PPCISD::GET_TLSLD_ADDR", SDTIntBinOp>;
|
||||
def PPCaddisDtprelHA : SDNode<"PPCISD::ADDIS_DTPREL_HA", SDTIntBinOp>;
|
||||
def PPCaddisDtprelHA : SDNode<"PPCISD::ADDIS_DTPREL_HA", SDTIntBinOp,
|
||||
[SDNPHasChain]>;
|
||||
def PPCaddiDtprelL : SDNode<"PPCISD::ADDI_DTPREL_L", SDTIntBinOp>;
|
||||
|
||||
def PPCvperm : SDNode<"PPCISD::VPERM", SDT_PPCvperm, []>;
|
||||
@ -137,9 +136,15 @@ def SDT_PPCCall : SDTypeProfile<0, -1, [SDTCisInt<0>]>;
|
||||
def PPCcall : SDNode<"PPCISD::CALL", SDT_PPCCall,
|
||||
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
|
||||
SDNPVariadic]>;
|
||||
def PPCcall_tls : SDNode<"PPCISD::CALL_TLS", SDT_PPCCall,
|
||||
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
|
||||
SDNPVariadic]>;
|
||||
def PPCcall_nop : SDNode<"PPCISD::CALL_NOP", SDT_PPCCall,
|
||||
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
|
||||
SDNPVariadic]>;
|
||||
def PPCcall_nop_tls : SDNode<"PPCISD::CALL_NOP_TLS", SDT_PPCCall,
|
||||
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
|
||||
SDNPVariadic]>;
|
||||
def PPCmtctr : SDNode<"PPCISD::MTCTR", SDT_PPCCall,
|
||||
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
|
||||
def PPCbctrl : SDNode<"PPCISD::BCTRL", SDTNone,
|
||||
@ -2454,6 +2459,9 @@ def : Pat<(PPCcall (i32 tglobaladdr:$dst)),
|
||||
def : Pat<(PPCcall (i32 texternalsym:$dst)),
|
||||
(BL texternalsym:$dst)>;
|
||||
|
||||
def : Pat<(PPCcall_tls texternalsym:$func, tglobaltlsaddr:$sym),
|
||||
(BL_TLS texternalsym:$func, tglobaltlsaddr:$sym)>;
|
||||
|
||||
def : Pat<(PPCtc_return (i32 tglobaladdr:$dst), imm:$imm),
|
||||
(TCRETURNdi tglobaladdr:$dst, imm:$imm)>;
|
||||
|
||||
@ -2508,21 +2516,10 @@ def ADDItlsgdL32 : Pseudo<(outs gprc:$rD), (ins gprc_nor0:$reg, s16imm:$disp),
|
||||
"#ADDItlsgdL32",
|
||||
[(set i32:$rD,
|
||||
(PPCaddiTlsgdL i32:$reg, tglobaltlsaddr:$disp))]>;
|
||||
let hasExtraSrcRegAllocReq = 1, hasExtraDefRegAllocReq = 1, Defs = [LR] in
|
||||
def GETtlsADDR32 : Pseudo<(outs gprc:$rD), (ins gprc:$reg, tlsgd32:$sym),
|
||||
"GETtlsADDR32",
|
||||
[(set i32:$rD,
|
||||
(PPCgetTlsAddr i32:$reg, tglobaltlsaddr:$sym))]>;
|
||||
def ADDItlsldL32 : Pseudo<(outs gprc:$rD), (ins gprc_nor0:$reg, s16imm:$disp),
|
||||
"#ADDItlsldL32",
|
||||
[(set i32:$rD,
|
||||
(PPCaddiTlsldL i32:$reg, tglobaltlsaddr:$disp))]>;
|
||||
let hasExtraSrcRegAllocReq = 1, hasExtraDefRegAllocReq = 1, Defs = [LR] in
|
||||
def GETtlsldADDR32 : Pseudo<(outs gprc:$rD), (ins gprc:$reg, tlsgd32:$sym),
|
||||
"GETtlsldADDR32",
|
||||
[(set i32:$rD,
|
||||
(PPCgetTlsldAddr i32:$reg,
|
||||
tglobaltlsaddr:$sym))]>;
|
||||
def ADDIdtprelL32 : Pseudo<(outs gprc:$rD), (ins gprc_nor0:$reg, s16imm:$disp),
|
||||
"#ADDIdtprelL32",
|
||||
[(set i32:$rD,
|
||||
|
||||
@ -137,6 +137,12 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
|
||||
case PPCII::MO_TLS:
|
||||
RefKind = MCSymbolRefExpr::VK_PPC_TLS;
|
||||
break;
|
||||
case PPCII::MO_TLSGD:
|
||||
RefKind = MCSymbolRefExpr::VK_PPC_TLSGD;
|
||||
break;
|
||||
case PPCII::MO_TLSLD:
|
||||
RefKind = MCSymbolRefExpr::VK_PPC_TLSLD;
|
||||
break;
|
||||
}
|
||||
|
||||
if (MO.getTargetFlags() == PPCII::MO_PLT_OR_STUB && !isDarwin)
|
||||
|
||||
@ -1,113 +0,0 @@
|
||||
//===---------- PPCTLSDynamicCall.cpp - TLS Dynamic Call Fixup ------------===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file is distributed under the University of Illinois Open Source
|
||||
// License. See LICENSE.TXT for details.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
//
|
||||
// This pass fixes up GETtls[ld]ADDR[32] machine instructions so that
|
||||
// they read and write GPR3. These are really call instructions, so
|
||||
// must use the calling convention registers. This is done in a late
|
||||
// pass so that TLS variable accesses can be fully commoned.
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "PPCInstrInfo.h"
|
||||
#include "PPC.h"
|
||||
#include "PPCInstrBuilder.h"
|
||||
#include "PPCTargetMachine.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
||||
#include "llvm/Support/Debug.h"
|
||||
#include "llvm/Support/raw_ostream.h"
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "ppc-tls-dynamic-call"
|
||||
|
||||
namespace llvm {
|
||||
void initializePPCTLSDynamicCallPass(PassRegistry&);
|
||||
}
|
||||
|
||||
namespace {
|
||||
// PPCTLSDynamicCall pass - Add copies to and from GPR3 around
|
||||
// GETtls[ld]ADDR[32] machine instructions. These instructions
|
||||
// are actually call instructions, so the register choice is
|
||||
// constrained. We delay introducing these copies as late as
|
||||
// possible so that TLS variable accesses can be fully commoned.
|
||||
struct PPCTLSDynamicCall : public MachineFunctionPass {
|
||||
static char ID;
|
||||
PPCTLSDynamicCall() : MachineFunctionPass(ID) {
|
||||
initializePPCTLSDynamicCallPass(*PassRegistry::getPassRegistry());
|
||||
}
|
||||
|
||||
const PPCTargetMachine *TM;
|
||||
const PPCInstrInfo *TII;
|
||||
|
||||
protected:
|
||||
bool processBlock(MachineBasicBlock &MBB) {
|
||||
bool Changed = false;
|
||||
bool Is64Bit = TM->getSubtargetImpl()->isPPC64();
|
||||
|
||||
for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
|
||||
I != IE; ++I) {
|
||||
MachineInstr *MI = I;
|
||||
|
||||
if (MI->getOpcode() != PPC::GETtlsADDR &&
|
||||
MI->getOpcode() != PPC::GETtlsldADDR &&
|
||||
MI->getOpcode() != PPC::GETtlsADDR32 &&
|
||||
MI->getOpcode() != PPC::GETtlsldADDR32)
|
||||
continue;
|
||||
|
||||
DEBUG(dbgs() << "TLS Dynamic Call Fixup:\n " << *MI;);
|
||||
|
||||
unsigned OutReg = MI->getOperand(0).getReg();
|
||||
unsigned InReg = MI->getOperand(1).getReg();
|
||||
DebugLoc DL = MI->getDebugLoc();
|
||||
unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
|
||||
|
||||
BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), GPR3)
|
||||
.addReg(InReg);
|
||||
MI->getOperand(0).setReg(GPR3);
|
||||
MI->getOperand(1).setReg(GPR3);
|
||||
BuildMI(MBB, ++I, DL, TII->get(TargetOpcode::COPY), OutReg)
|
||||
.addReg(GPR3);
|
||||
|
||||
Changed = true;
|
||||
}
|
||||
|
||||
return Changed;
|
||||
}
|
||||
|
||||
public:
|
||||
bool runOnMachineFunction(MachineFunction &MF) override {
|
||||
TM = static_cast<const PPCTargetMachine *>(&MF.getTarget());
|
||||
TII = TM->getSubtargetImpl()->getInstrInfo();
|
||||
|
||||
bool Changed = false;
|
||||
|
||||
for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
|
||||
MachineBasicBlock &B = *I++;
|
||||
if (processBlock(B))
|
||||
Changed = true;
|
||||
}
|
||||
|
||||
return Changed;
|
||||
}
|
||||
|
||||
void getAnalysisUsage(AnalysisUsage &AU) const override {
|
||||
MachineFunctionPass::getAnalysisUsage(AU);
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
INITIALIZE_PASS_BEGIN(PPCTLSDynamicCall, DEBUG_TYPE,
|
||||
"PowerPC TLS Dynamic Call Fixup", false, false)
|
||||
INITIALIZE_PASS_END(PPCTLSDynamicCall, DEBUG_TYPE,
|
||||
"PowerPC TLS Dynamic Call Fixup", false, false)
|
||||
|
||||
char PPCTLSDynamicCall::ID = 0;
|
||||
FunctionPass*
|
||||
llvm::createPPCTLSDynamicCallPass() { return new PPCTLSDynamicCall(); }
|
||||
@ -266,7 +266,6 @@ void PPCPassConfig::addPreRegAlloc() {
|
||||
initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
|
||||
insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
|
||||
&PPCVSXFMAMutateID);
|
||||
addPass(createPPCTLSDynamicCallPass());
|
||||
}
|
||||
|
||||
void PPCPassConfig::addPreSched2() {
|
||||
|
||||
@ -12,7 +12,8 @@ entry:
|
||||
; CHECK-LABEL: @test1
|
||||
; CHECK: mflr 0
|
||||
; CHECK: std 0, 16(1)
|
||||
; CHECK-DAG: ld 3, 64(1)
|
||||
; FIXME: These next two lines don't both need to load the same value.
|
||||
; CHECK-DAG: ld 3, 16(1)
|
||||
; CHECK-DAG: ld 0, 16(1)
|
||||
; CHECK: mtlr 0
|
||||
; CHECK: blr
|
||||
|
||||
@ -1,52 +0,0 @@
|
||||
; RUN: llc -march=ppc64 -mcpu=pwr7 -O2 -relocation-model=pic < %s | FileCheck %s
|
||||
; RUN: llc -march=ppc64 -mcpu=pwr7 -O2 -relocation-model=pic < %s | grep "__tls_get_addr" | count 1
|
||||
|
||||
; This test was derived from LLVM's own
|
||||
; PrettyStackTraceEntry::~PrettyStackTraceEntry(). It demonstrates an
|
||||
; opportunity for CSE of calls to __tls_get_addr().
|
||||
|
||||
target datalayout = "e-m:e-i64:64-n32:64"
|
||||
target triple = "powerpc64le-unknown-linux-gnu"
|
||||
|
||||
%"class.llvm::PrettyStackTraceEntry" = type { i32 (...)**, %"class.llvm::PrettyStackTraceEntry"* }
|
||||
|
||||
@_ZTVN4llvm21PrettyStackTraceEntryE = unnamed_addr constant [5 x i8*] [i8* null, i8* null, i8* bitcast (void (%"class.llvm::PrettyStackTraceEntry"*)* @_ZN4llvm21PrettyStackTraceEntryD2Ev to i8*), i8* bitcast (void (%"class.llvm::PrettyStackTraceEntry"*)* @_ZN4llvm21PrettyStackTraceEntryD0Ev to i8*), i8* bitcast (void ()* @__cxa_pure_virtual to i8*)], align 8
|
||||
@_ZL20PrettyStackTraceHead = internal thread_local unnamed_addr global %"class.llvm::PrettyStackTraceEntry"* null, align 8
|
||||
@.str = private unnamed_addr constant [87 x i8] c"PrettyStackTraceHead == this && \22Pretty stack trace entry destruction is out of order\22\00", align 1
|
||||
@.str1 = private unnamed_addr constant [64 x i8] c"/home/wschmidt/llvm/llvm-test2/lib/Support/PrettyStackTrace.cpp\00", align 1
|
||||
@__PRETTY_FUNCTION__._ZN4llvm21PrettyStackTraceEntryD2Ev = private unnamed_addr constant [62 x i8] c"virtual llvm::PrettyStackTraceEntry::~PrettyStackTraceEntry()\00", align 1
|
||||
|
||||
declare void @_ZN4llvm21PrettyStackTraceEntryD2Ev(%"class.llvm::PrettyStackTraceEntry"* %this) unnamed_addr
|
||||
declare void @__cxa_pure_virtual()
|
||||
declare void @__assert_fail(i8*, i8*, i32 zeroext, i8*)
|
||||
declare void @_ZdlPv(i8*)
|
||||
|
||||
define void @_ZN4llvm21PrettyStackTraceEntryD0Ev(%"class.llvm::PrettyStackTraceEntry"* %this) unnamed_addr align 2 {
|
||||
entry:
|
||||
%0 = getelementptr inbounds %"class.llvm::PrettyStackTraceEntry"* %this, i64 0, i32 0
|
||||
store i32 (...)** bitcast (i8** getelementptr inbounds ([5 x i8*]* @_ZTVN4llvm21PrettyStackTraceEntryE, i64 0, i64 2) to i32 (...)**), i32 (...)*** %0, align 8
|
||||
%1 = load %"class.llvm::PrettyStackTraceEntry"** @_ZL20PrettyStackTraceHead, align 8
|
||||
%cmp.i = icmp eq %"class.llvm::PrettyStackTraceEntry"* %1, %this
|
||||
br i1 %cmp.i, label %_ZN4llvm21PrettyStackTraceEntryD2Ev.exit, label %cond.false.i
|
||||
|
||||
cond.false.i: ; preds = %entry
|
||||
tail call void @__assert_fail(i8* getelementptr inbounds ([87 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([64 x i8]* @.str1, i64 0, i64 0), i32 zeroext 119, i8* getelementptr inbounds ([62 x i8]* @__PRETTY_FUNCTION__._ZN4llvm21PrettyStackTraceEntryD2Ev, i64 0, i64 0))
|
||||
unreachable
|
||||
|
||||
_ZN4llvm21PrettyStackTraceEntryD2Ev.exit: ; preds = %entry
|
||||
%NextEntry.i.i = getelementptr inbounds %"class.llvm::PrettyStackTraceEntry"* %this, i64 0, i32 1
|
||||
%2 = bitcast %"class.llvm::PrettyStackTraceEntry"** %NextEntry.i.i to i64*
|
||||
%3 = load i64* %2, align 8
|
||||
store i64 %3, i64* bitcast (%"class.llvm::PrettyStackTraceEntry"** @_ZL20PrettyStackTraceHead to i64*), align 8
|
||||
%4 = bitcast %"class.llvm::PrettyStackTraceEntry"* %this to i8*
|
||||
tail call void @_ZdlPv(i8* %4)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: _ZN4llvm21PrettyStackTraceEntryD0Ev:
|
||||
; CHECK: addis [[REG1:[0-9]+]], 2, _ZL20PrettyStackTraceHead@got@tlsld@ha
|
||||
; CHECK: addi 3, [[REG1]], _ZL20PrettyStackTraceHead@got@tlsld@l
|
||||
; CHECK: bl __tls_get_addr(_ZL20PrettyStackTraceHead@tlsld)
|
||||
; CHECK: addis 3, 3, _ZL20PrettyStackTraceHead@dtprel@ha
|
||||
; CHECK: ld {{[0-9]+}}, _ZL20PrettyStackTraceHead@dtprel@l(3)
|
||||
; CHECK: std {{[0-9]+}}, _ZL20PrettyStackTraceHead@dtprel@l(3)
|
||||
@ -1,7 +1,7 @@
|
||||
; RUN: llc -march=ppc64 -mcpu=pwr7 -O0 -relocation-model=pic < %s | FileCheck -check-prefix=OPT0 %s
|
||||
; RUN: llc -march=ppc64 -mcpu=pwr7 -O1 -relocation-model=pic < %s | FileCheck -check-prefix=OPT1 %s
|
||||
; R;U;N: llc -march=ppc32 -O0 -relocation-model=pic < %s | FileCheck -check-prefix=OPT0-32 %s
|
||||
; R;U;N: llc -march=ppc32 -O1 -relocation-model=pic < %s | FileCheck -check-prefix=OPT1-32 %s
|
||||
; RUN: llc -march=ppc32 -O0 -relocation-model=pic < %s | FileCheck -check-prefix=OPT0-32 %s
|
||||
; RUN: llc -march=ppc32 -O1 -relocation-model=pic < %s | FileCheck -check-prefix=OPT1-32 %s
|
||||
|
||||
target triple = "powerpc64-unknown-linux-gnu"
|
||||
; Test correct assembly code generation for thread-local storage using
|
||||
@ -65,5 +65,5 @@ entry:
|
||||
; OPT1: bl __tls_get_addr(a2@tlsgd)
|
||||
; OPT1-NEXT: nop
|
||||
; OPT1-32-LABEL: main2
|
||||
; OPT1-32: addi {{[0-9]+}}, {{[0-9]+}}, a2@got@tlsgd
|
||||
; OPT1-32: addi 3, {{[0-9]+}}, a2@got@tlsgd
|
||||
; OPT1-32: bl __tls_get_addr(a2@tlsgd)@PLT
|
||||
|
||||
@ -19,11 +19,13 @@ entry:
|
||||
}
|
||||
|
||||
; CHECK-LABEL: call_once:
|
||||
; CHECK: addi 3, {{[0-9]+}}, __once_callable@got@tlsgd@l
|
||||
; CHECK: addis 3, 2, __once_callable@got@tlsgd@ha
|
||||
; CHECK: addi 3, 3, __once_callable@got@tlsgd@l
|
||||
; CHECK: bl __tls_get_addr(__once_callable@tlsgd)
|
||||
; CHECK-NEXT: nop
|
||||
; CHECK: std {{[0-9]+}}, 0(3)
|
||||
; CHECK: addi 3, {{[0-9]+}}, __once_call@got@tlsgd@l
|
||||
; CHECK: addis 3, 2, __once_call@got@tlsgd@ha
|
||||
; CHECK: addi 3, 3, __once_call@got@tlsgd@l
|
||||
; CHECK: bl __tls_get_addr(__once_call@tlsgd)
|
||||
; CHECK-NEXT: nop
|
||||
; CHECK: std {{[0-9]+}}, 0(3)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user