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Don't swap the operands of a subtraction when trying to create a
post-decrement load/store. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81464 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4715,7 +4715,7 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) {
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SDValue Offset;
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ISD::MemIndexedMode AM = ISD::UNINDEXED;
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if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM, DAG)) {
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if (Ptr == Offset)
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if (Ptr == Offset && Op->getOpcode() == ISD::ADD)
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std::swap(BasePtr, Offset);
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if (Ptr != BasePtr)
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continue;
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11
test/CodeGen/ARM/2009-09-10-postdec.ll
Normal file
11
test/CodeGen/ARM/2009-09-10-postdec.ll
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@ -0,0 +1,11 @@
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; RUN: llc -march=arm < %s | FileCheck %s
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; Radar 7213850
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define i32 @test(i8* %d, i32 %x, i32 %y) nounwind {
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%1 = ptrtoint i8* %d to i32
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;CHECK: sub
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%2 = sub i32 %x, %1
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%3 = add nsw i32 %2, %y
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store i8 0, i8* %d, align 1
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ret i32 %3
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}
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