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https://github.com/c64scene-ar/llvm-6502.git
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- rename opType -> OpKind and contents -> Contents.
- eliminate the auxInfo union, merging it into the contents union. This shaves 4 bytes off MachineOperand on a 32-bit machine. - Use accessors in ctor methods. - Add comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45462 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
f73823000e
commit
a29b8aac90
@ -42,41 +42,56 @@ public:
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};
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private:
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union {
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GlobalValue *GV; // For MO_GlobalAddress.
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MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
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const char *SymbolName; // For MO_ExternalSymbol.
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unsigned RegNo; // For MO_Register.
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int64_t ImmVal; // For MO_Immediate.
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int Index; // For MO_FrameIndex/CPI/JTI.
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} contents;
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/// ParentMI - This is the instruction that this operand is embedded into.
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MachineInstr *ParentMI;
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/// OpKind - Specify what kind of operand this is. This discriminates the
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/// union.
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MachineOperandType OpKind : 8;
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MachineOperandType opType:8; // Discriminate the union.
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bool IsDef : 1; // True if this is a def, false if this is a use.
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bool IsImp : 1; // True if this is an implicit def or use.
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/// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
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/// operands.
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/// IsDef - True if this is a def, false if this is a use of the register.
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///
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bool IsDef : 1;
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/// IsImp - True if this is an implicit def or use, false if it is explicit.
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///
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bool IsImp : 1;
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bool IsKill : 1; // True if this is a reg use and the reg is dead
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// immediately after the read.
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bool IsDead : 1; // True if this is a reg def and the reg is dead
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// immediately after the write. i.e. A register
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// that is defined but never used.
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/// IsKill - True if this instruction is the last use of the register on this
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/// path through the function. This is only valid on uses of registers.
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bool IsKill : 1;
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/// IsDead - True if this register is never used by a subsequent instruction.
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/// This is only valid on definitions of registers.
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bool IsDead : 1;
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/// SubReg - Subregister number, only valid for MO_Register. A value of 0
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/// indicates the MO_Register has no subReg.
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unsigned char SubReg;
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/// auxInfo - auxiliary information used by the MachineOperand
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union {
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/// offset - Offset to address of global or external, only valid for
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/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
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int offset;
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/// ParentMI - This is the instruction that this operand is embedded into.
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/// This is valid for all operand types, when the operand is in an instr.
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MachineInstr *ParentMI;
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} auxInfo;
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/// Contents union - This contains the payload for the various operand types.
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union {
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MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
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unsigned RegNo; // For MO_Register.
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int64_t ImmVal; // For MO_Immediate.
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/// OffsetedInfo - This struct contains the offset and an object identifier.
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/// this represent the object as with an optional offset from it.
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struct {
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union {
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int Index; // For MO_*Index - The index itself.
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const char *SymbolName; // For MO_ExternalSymbol.
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GlobalValue *GV; // For MO_GlobalAddress.
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} Val;
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int Offset; // An offset from the object.
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} OffsetedInfo;
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} Contents;
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MachineOperand() : ParentMI(0) {}
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MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {}
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public:
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MachineOperand(const MachineOperand &M) {
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@ -87,7 +102,7 @@ public:
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/// getType - Returns the MachineOperandType for this operand.
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///
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MachineOperandType getType() const { return opType; }
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MachineOperandType getType() const { return OpKind; }
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/// getParent - Return the instruction that this operand belongs to.
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///
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@ -98,14 +113,14 @@ public:
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/// Accessors that tell you what kind of MachineOperand you're looking at.
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///
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bool isRegister() const { return opType == MO_Register; }
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bool isImmediate() const { return opType == MO_Immediate; }
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bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
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bool isFrameIndex() const { return opType == MO_FrameIndex; }
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bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
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bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
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bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
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bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
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bool isRegister() const { return OpKind == MO_Register; }
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bool isImmediate() const { return OpKind == MO_Immediate; }
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bool isMachineBasicBlock() const { return OpKind == MO_MachineBasicBlock; }
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bool isFrameIndex() const { return OpKind == MO_FrameIndex; }
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bool isConstantPoolIndex() const { return OpKind == MO_ConstantPoolIndex; }
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bool isJumpTableIndex() const { return OpKind == MO_JumpTableIndex; }
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bool isGlobalAddress() const { return OpKind == MO_GlobalAddress; }
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bool isExternalSymbol() const { return OpKind == MO_ExternalSymbol; }
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//===--------------------------------------------------------------------===//
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// Accessors for Register Operands
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@ -114,7 +129,7 @@ public:
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/// getReg - Returns the register number.
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unsigned getReg() const {
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assert(isRegister() && "This is not a register operand!");
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return contents.RegNo;
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return Contents.RegNo;
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}
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unsigned getSubReg() const {
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@ -153,7 +168,7 @@ public:
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void setReg(unsigned Reg) {
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assert(isRegister() && "This is not a register operand!");
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contents.RegNo = Reg;
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Contents.RegNo = Reg;
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}
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void setSubReg(unsigned subReg) {
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@ -193,45 +208,40 @@ public:
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int64_t getImm() const {
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assert(isImmediate() && "Wrong MachineOperand accessor");
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return contents.ImmVal;
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return Contents.ImmVal;
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}
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MachineBasicBlock *getMBB() const {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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return contents.MBB;
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return Contents.MBB;
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}
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MachineBasicBlock *getMachineBasicBlock() const {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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return contents.MBB;
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return Contents.MBB;
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}
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void setMachineBasicBlock(MachineBasicBlock *MBB) {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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contents.MBB = MBB;
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}
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int getFrameIndex() const {
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assert(isFrameIndex() && "Wrong MachineOperand accessor");
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return (int)contents.Index;
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}
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unsigned getConstantPoolIndex() const {
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assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
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return (unsigned)contents.Index;
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}
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unsigned getJumpTableIndex() const {
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assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
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return (unsigned)contents.Index;
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int getIndex() const {
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assert((isFrameIndex() || isConstantPoolIndex() || isJumpTableIndex()) &&
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"Wrong MachineOperand accessor");
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return Contents.OffsetedInfo.Val.Index;
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}
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int getFrameIndex() const { return getIndex(); }
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unsigned getConstantPoolIndex() const { return getIndex(); }
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unsigned getJumpTableIndex() const { return getIndex(); }
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GlobalValue *getGlobal() const {
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assert(isGlobalAddress() && "Wrong MachineOperand accessor");
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return contents.GV;
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return Contents.OffsetedInfo.Val.GV;
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}
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int getOffset() const {
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assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
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"Wrong MachineOperand accessor");
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return auxInfo.offset;
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return Contents.OffsetedInfo.Offset;
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}
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const char *getSymbolName() const {
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assert(isExternalSymbol() && "Wrong MachineOperand accessor");
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return contents.SymbolName;
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return Contents.OffsetedInfo.Val.SymbolName;
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}
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//===--------------------------------------------------------------------===//
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@ -240,23 +250,27 @@ public:
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void setImm(int64_t immVal) {
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assert(isImmediate() && "Wrong MachineOperand mutator");
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contents.ImmVal = immVal;
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Contents.ImmVal = immVal;
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}
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void setOffset(int Offset) {
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assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex()) &&
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"Wrong MachineOperand accessor");
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auxInfo.offset = Offset;
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Contents.OffsetedInfo.Offset = Offset;
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}
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void setConstantPoolIndex(unsigned Idx) {
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assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
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contents.Index = Idx;
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void setIndex(int Idx) {
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assert((isFrameIndex() || isConstantPoolIndex() || isJumpTableIndex()) &&
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"Wrong MachineOperand accessor");
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Contents.OffsetedInfo.Val.Index = Idx;
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}
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void setJumpTableIndex(unsigned Idx) {
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assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
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contents.Index = Idx;
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void setConstantPoolIndex(unsigned Idx) { setIndex(Idx); }
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void setJumpTableIndex(unsigned Idx) { setIndex(Idx); }
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void setMachineBasicBlock(MachineBasicBlock *MBB) {
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assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
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Contents.MBB = MBB;
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}
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//===--------------------------------------------------------------------===//
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@ -271,8 +285,8 @@ public:
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/// the specified value. If an operand is known to be an immediate already,
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/// the setImm method should be used.
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void ChangeToImmediate(int64_t ImmVal) {
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opType = MO_Immediate;
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contents.ImmVal = ImmVal;
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OpKind = MO_Immediate;
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Contents.ImmVal = ImmVal;
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}
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/// ChangeToRegister - Replace this operand with a new register operand of
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@ -280,8 +294,8 @@ public:
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/// the setReg method should be used.
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void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
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bool isKill = false, bool isDead = false) {
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opType = MO_Register;
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contents.RegNo = Reg;
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OpKind = MO_Register;
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Contents.RegNo = Reg;
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IsDef = isDef;
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IsImp = isImp;
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IsKill = isKill;
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@ -294,74 +308,65 @@ public:
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//===--------------------------------------------------------------------===//
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static MachineOperand CreateImm(int64_t Val) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_Immediate;
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Op.contents.ImmVal = Val;
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MachineOperand Op(MachineOperand::MO_Immediate);
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Op.setImm(Val);
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return Op;
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}
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static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
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bool isKill = false, bool isDead = false,
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unsigned SubReg = 0) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_Register;
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MachineOperand Op(MachineOperand::MO_Register);
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Op.IsDef = isDef;
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Op.IsImp = isImp;
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Op.IsKill = isKill;
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Op.IsDead = isDead;
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Op.contents.RegNo = Reg;
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Op.Contents.RegNo = Reg;
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Op.SubReg = SubReg;
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return Op;
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}
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static MachineOperand CreateMBB(MachineBasicBlock *MBB) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_MachineBasicBlock;
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Op.contents.MBB = MBB;
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MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
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Op.setMachineBasicBlock(MBB);
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return Op;
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}
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static MachineOperand CreateFI(unsigned Idx) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_FrameIndex;
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Op.contents.Index = Idx;
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MachineOperand Op(MachineOperand::MO_FrameIndex);
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Op.setIndex(Idx);
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return Op;
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}
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static MachineOperand CreateCPI(unsigned Idx, int Offset) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_ConstantPoolIndex;
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Op.contents.Index = Idx;
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Op.auxInfo.offset = Offset;
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MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
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Op.setIndex(Idx);
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Op.setOffset(Offset);
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return Op;
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}
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static MachineOperand CreateJTI(unsigned Idx) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_JumpTableIndex;
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Op.contents.Index = Idx;
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MachineOperand Op(MachineOperand::MO_JumpTableIndex);
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Op.setIndex(Idx);
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return Op;
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}
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static MachineOperand CreateGA(GlobalValue *GV, int Offset) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_GlobalAddress;
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Op.contents.GV = GV;
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Op.auxInfo.offset = Offset;
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MachineOperand Op(MachineOperand::MO_GlobalAddress);
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Op.Contents.OffsetedInfo.Val.GV = GV;
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Op.setOffset(Offset);
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return Op;
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}
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static MachineOperand CreateES(const char *SymName, int Offset = 0) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_ExternalSymbol;
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Op.contents.SymbolName = SymName;
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Op.auxInfo.offset = Offset;
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MachineOperand Op(MachineOperand::MO_ExternalSymbol);
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Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
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Op.setOffset(Offset);
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return Op;
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}
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const MachineOperand &operator=(const MachineOperand &MO) {
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contents = MO.contents;
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OpKind = MO.OpKind;
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IsDef = MO.IsDef;
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IsImp = MO.IsImp;
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IsKill = MO.IsKill;
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IsDead = MO.IsDead;
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opType = MO.opType;
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auxInfo = MO.auxInfo;
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SubReg = MO.SubReg;
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ParentMI = MO.ParentMI;
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Contents = MO.Contents;
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return *this;
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}
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