Change macro names per naming standard in Makefile.rules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17361 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reid Spencer 2004-10-30 09:26:22 +00:00
parent 3abd4974ba
commit a98e7b5e75

View File

@ -20,12 +20,12 @@ all :: $(SAMPLES)
ifdef OPTIMIZE
% : %.st
@$(ECHO) "Compiling and Optimizing $(<F)"
$(VERB)$(LLVMC_EXEC) -O3 $< -o $@
$(Echo) "Compiling and Optimizing $(<F)"
$(Verb)$(LLVMC_EXEC) -O3 $< -o $@
else
% : %.st
@$(ECHO) "Compiling $(<F)"
$(VERB)$(LLVMC_EXEC) $< -o $@
$(Echo) "Compiling $(<F)"
$(Verb)$(LLVMC_EXEC) $< -o $@
endif
SAMPLES_LL = $(SAMPLES:%=%.ll)
@ -33,7 +33,7 @@ SAMPLES_BC = $(SAMPLES:%=%.bc)
SAMPLES_S = $(SAMPLES:%=%.s)
clean ::
$(VERB)rm -f gmon.out $(SAMPLES)
$(Verb)rm -f gmon.out $(SAMPLES)
#
# Include the Master Makefile that knows how to build all.
#