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Fix phi node updating for switches lowered to linear sequences of branches.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31125 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-10-22 23:00:53 +00:00
parent e236ac64a2
commit b2e806eecd
1 changed files with 13 additions and 1 deletions
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14
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -930,7 +930,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) {
// If the switch has few cases (two or less) emit a series of specific
// tests.
if (0 && Cases.size() < 3) {
if (Cases.size() < 3) {
// TODO: If any two of the cases has the same destination, and if one value
// is the same as the other, but has one bit unset that the other has set,
// use bit manipulation to do two compares at once. For example:
@ -3689,6 +3689,18 @@ void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF,
return;
}
// If the switch block involved a branch to one of the actual successors, we
// need to update PHI nodes in that block.
for (unsigned i = 0, e = PHINodesToUpdate.size(); i != e; ++i) {
MachineInstr *PHI = PHINodesToUpdate[i].first;
assert(PHI->getOpcode() == TargetInstrInfo::PHI &&
"This is not a machine PHI node that we are updating!");
if (BB->isSuccessor(PHI->getParent())) {
PHI->addRegOperand(PHINodesToUpdate[i].second, false);
PHI->addMachineBasicBlockOperand(BB);
}
}
// If we generated any switch lowering information, build and codegen any
// additional DAGs necessary.
for (unsigned i = 0, e = SwitchCases.size(); i != e; ++i) {