Small tweaking

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70741 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-05-03 13:11:35 +00:00
parent ce45d30fa1
commit c08163e72d
2 changed files with 6 additions and 2 deletions

View File

@ -82,10 +82,10 @@ bool MSP430DAGToDAGISel::SelectAddr(SDValue Op, SDValue Addr,
return true;
}
// Operand is a result from ADD with constant operand which fits into i16.
switch (Addr.getOpcode()) {
case ISD::ADD:
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
// Operand is a result from ADD with constant operand which fits into i16.
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
uint64_t CVal = CN->getZExtValue();
// Offset should fit into 16 bits.
if (((CVal << 48) >> 48) == CVal) {

View File

@ -54,6 +54,10 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
// shifts of the whole bitwidth 1 bit per step.
setShiftAmountType(MVT::i8);
setStackPointerRegisterToSaveRestore(MSP430::SPW);
setBooleanContents(ZeroOrOneBooleanContent);
setSchedulingPreference(SchedulingForLatency);
setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);