mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-26 05:25:47 +00:00
It's setting up the call args right now, but on the callee side, it's
trying to get incoming args off the stack, instead of the %i0...%i6 regs, which is wrong. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12756 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -254,7 +254,18 @@ bool V8ISel::runOnFunction(Function &Fn) {
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}
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}
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void V8ISel::visitCallInst(CallInst &I) {
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void V8ISel::visitCallInst(CallInst &I) {
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assert (I.getNumOperands () == 1 && "Can't handle call args yet");
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assert (I.getNumOperands () < 8
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&& "Can't handle pushing excess call args on the stack yet");
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static const unsigned IncomingArgRegs[] = { V8::O0, V8::O1, V8::O2, V8::O3,
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V8::O4, V8::O5 };
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for (unsigned i = 1; i < 7; ++i)
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if (i < I.getNumOperands ()) {
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unsigned ArgReg = getReg (I.getOperand (i));
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// Schlep it over into the incoming arg register
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BuildMI (BB, V8::ORrr, 2, IncomingArgRegs[i]).addReg (V8::G0)
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.addReg (ArgReg);
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}
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unsigned DestReg = getReg (I);
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unsigned DestReg = getReg (I);
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BuildMI (BB, V8::CALL, 1).addPCDisp (I.getOperand (0));
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BuildMI (BB, V8::CALL, 1).addPCDisp (I.getOperand (0));
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if (I.getType ()->getPrimitiveID () == Type::VoidTyID)
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if (I.getType ()->getPrimitiveID () == Type::VoidTyID)
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@@ -405,6 +416,7 @@ void V8ISel::visitSetCondInst(Instruction &I) {
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case Instruction::SetGT:
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case Instruction::SetGT:
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case Instruction::SetLE:
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case Instruction::SetLE:
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case Instruction::SetGE:
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case Instruction::SetGE:
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;
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}
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}
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// FIXME: We need either conditional moves like the V9 has (e.g. movge), or we
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// FIXME: We need either conditional moves like the V9 has (e.g. movge), or we
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@@ -254,7 +254,18 @@ bool V8ISel::runOnFunction(Function &Fn) {
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}
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}
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void V8ISel::visitCallInst(CallInst &I) {
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void V8ISel::visitCallInst(CallInst &I) {
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assert (I.getNumOperands () == 1 && "Can't handle call args yet");
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assert (I.getNumOperands () < 8
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&& "Can't handle pushing excess call args on the stack yet");
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static const unsigned IncomingArgRegs[] = { V8::O0, V8::O1, V8::O2, V8::O3,
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V8::O4, V8::O5 };
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for (unsigned i = 1; i < 7; ++i)
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if (i < I.getNumOperands ()) {
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unsigned ArgReg = getReg (I.getOperand (i));
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// Schlep it over into the incoming arg register
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BuildMI (BB, V8::ORrr, 2, IncomingArgRegs[i]).addReg (V8::G0)
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.addReg (ArgReg);
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}
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unsigned DestReg = getReg (I);
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unsigned DestReg = getReg (I);
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BuildMI (BB, V8::CALL, 1).addPCDisp (I.getOperand (0));
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BuildMI (BB, V8::CALL, 1).addPCDisp (I.getOperand (0));
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if (I.getType ()->getPrimitiveID () == Type::VoidTyID)
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if (I.getType ()->getPrimitiveID () == Type::VoidTyID)
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@@ -405,6 +416,7 @@ void V8ISel::visitSetCondInst(Instruction &I) {
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case Instruction::SetGT:
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case Instruction::SetGT:
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case Instruction::SetLE:
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case Instruction::SetLE:
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case Instruction::SetGE:
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case Instruction::SetGE:
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;
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}
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}
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// FIXME: We need either conditional moves like the V9 has (e.g. movge), or we
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// FIXME: We need either conditional moves like the V9 has (e.g. movge), or we
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@@ -254,7 +254,18 @@ bool V8ISel::runOnFunction(Function &Fn) {
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}
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}
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void V8ISel::visitCallInst(CallInst &I) {
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void V8ISel::visitCallInst(CallInst &I) {
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assert (I.getNumOperands () == 1 && "Can't handle call args yet");
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assert (I.getNumOperands () < 8
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&& "Can't handle pushing excess call args on the stack yet");
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static const unsigned IncomingArgRegs[] = { V8::O0, V8::O1, V8::O2, V8::O3,
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V8::O4, V8::O5 };
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for (unsigned i = 1; i < 7; ++i)
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if (i < I.getNumOperands ()) {
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unsigned ArgReg = getReg (I.getOperand (i));
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// Schlep it over into the incoming arg register
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BuildMI (BB, V8::ORrr, 2, IncomingArgRegs[i]).addReg (V8::G0)
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.addReg (ArgReg);
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}
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unsigned DestReg = getReg (I);
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unsigned DestReg = getReg (I);
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BuildMI (BB, V8::CALL, 1).addPCDisp (I.getOperand (0));
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BuildMI (BB, V8::CALL, 1).addPCDisp (I.getOperand (0));
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if (I.getType ()->getPrimitiveID () == Type::VoidTyID)
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if (I.getType ()->getPrimitiveID () == Type::VoidTyID)
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@@ -405,6 +416,7 @@ void V8ISel::visitSetCondInst(Instruction &I) {
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case Instruction::SetGT:
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case Instruction::SetGT:
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case Instruction::SetLE:
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case Instruction::SetLE:
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case Instruction::SetGE:
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case Instruction::SetGE:
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;
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}
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}
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// FIXME: We need either conditional moves like the V9 has (e.g. movge), or we
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// FIXME: We need either conditional moves like the V9 has (e.g. movge), or we
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@@ -254,7 +254,18 @@ bool V8ISel::runOnFunction(Function &Fn) {
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}
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}
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void V8ISel::visitCallInst(CallInst &I) {
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void V8ISel::visitCallInst(CallInst &I) {
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assert (I.getNumOperands () == 1 && "Can't handle call args yet");
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assert (I.getNumOperands () < 8
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&& "Can't handle pushing excess call args on the stack yet");
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static const unsigned IncomingArgRegs[] = { V8::O0, V8::O1, V8::O2, V8::O3,
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V8::O4, V8::O5 };
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for (unsigned i = 1; i < 7; ++i)
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if (i < I.getNumOperands ()) {
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unsigned ArgReg = getReg (I.getOperand (i));
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// Schlep it over into the incoming arg register
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BuildMI (BB, V8::ORrr, 2, IncomingArgRegs[i]).addReg (V8::G0)
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.addReg (ArgReg);
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}
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unsigned DestReg = getReg (I);
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unsigned DestReg = getReg (I);
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BuildMI (BB, V8::CALL, 1).addPCDisp (I.getOperand (0));
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BuildMI (BB, V8::CALL, 1).addPCDisp (I.getOperand (0));
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if (I.getType ()->getPrimitiveID () == Type::VoidTyID)
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if (I.getType ()->getPrimitiveID () == Type::VoidTyID)
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@@ -405,6 +416,7 @@ void V8ISel::visitSetCondInst(Instruction &I) {
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case Instruction::SetGT:
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case Instruction::SetGT:
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case Instruction::SetLE:
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case Instruction::SetLE:
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case Instruction::SetGE:
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case Instruction::SetGE:
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;
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}
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}
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// FIXME: We need either conditional moves like the V9 has (e.g. movge), or we
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// FIXME: We need either conditional moves like the V9 has (e.g. movge), or we
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