Chris Lattner
d7d2287928
add a testcase the resent patches fail on.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35167 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:25:48 +00:00
Reid Spencer
660c4f9fac
Don't upgrade these.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35166 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:08:42 +00:00
Evan Cheng
757072d954
Remove -reduce-joining-phys-regs options. Make it on by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35165 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 18:08:26 +00:00
Duncan Sands
d8197fd9d7
Fix obvious typo in comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35164 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 14:25:02 +00:00
Evan Cheng
9f6636ff0c
Fix naming inconsistencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:48:02 +00:00
Evan Cheng
fa775d09c6
Special LDR instructions to load from non-pc-relative constantpools. These are
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rematerializable. Only used for constant generation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:20:03 +00:00
Evan Cheng
a251570417
Constant generation instructions are re-materializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 07:09:02 +00:00
Evan Cheng
e2e9e44d8f
Added isReMaterializable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35160 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:22:07 +00:00
Evan Cheng
04677a3b49
Recognize target instruction flag 'isReMaterializable'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:20:37 +00:00
Evan Cheng
5d5c93f659
Add a TargetInstrDescriptor flag to mark an instruction as "re-materializable".
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It means the instruction can be easily re-materialized at any point. e.g.
constant generation, load from constantpool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35158 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 06:19:16 +00:00
Zhou Sheng
fdcd5a7740
Add isStrictPositive() to APInt to determine if this APInt Value > 0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35156 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 05:22:18 +00:00
Evan Cheng
79b098445b
Minor bug fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 04:22:35 +00:00
Chris Lattner
d435dbcbf9
fix a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35152 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:39:32 +00:00
Chris Lattner
12779797f7
add PR#
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35151 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:17:19 +00:00
Chris Lattner
8bf9911932
implement the next chunk of SROA with memset/memcpy's of aggregates. This
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implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:16:43 +00:00
Chris Lattner
fb73d9cf0c
add pr#
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35149 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:15:43 +00:00
Chris Lattner
7863a63bb9
new testcase
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35148 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:11:30 +00:00
Chris Lattner
7829828c4b
testcase for SROA with memset etc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35147 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-19 00:09:00 +00:00
Nick Lewycky
3f64b1ab1d
Clean up this code and fix subtract miscompile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35146 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:58:46 +00:00
Chris Lattner
318bf7963a
Implement InstCombine/and-xor-merge.ll:test[12].
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Rearrange some code to simplify it now that shifts are binops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35145 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:51:34 +00:00
Chris Lattner
296d7a778a
new testcase
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35144 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:50:57 +00:00
Chris Lattner
11a3a9d27d
minor updates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35143 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 22:41:33 +00:00
Nick Lewycky
7f4ba44f37
This is implemented. We now generate:
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entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35142 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 14:37:20 +00:00
Evan Cheng
cf596c54d4
- Merge UsedBlocks info after two virtual registers are coalesced.
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- Use distance to closest use to determine whether to abort coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35141 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:05:55 +00:00
Evan Cheng
e951cd1647
Keep UsedBlocks info accurate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35140 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 09:02:31 +00:00
Evan Cheng
7e79e396a4
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35139 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 03:26:04 +00:00
Nick Lewycky
1eda0f60d7
Propagate ValueRanges across equality.
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Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35138 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-18 01:09:32 +00:00
Anton Korobeynikov
1cc6452181
Silence warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35137 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 14:48:06 +00:00
Evan Cheng
c6a2410d58
Track the BB's where each virtual register is used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35135 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:29:54 +00:00
Evan Cheng
ba1a3df608
Joining a live interval of a physical register with a virtual one can turn out
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to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!
Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35134 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 09:27:35 +00:00
Evan Cheng
db264ae07f
Use SmallSet instead of std::set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35133 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 08:53:30 +00:00
Evan Cheng
2edd563825
If sdisel has decided to sink GEP index expression into any BB. Replace all uses
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in that BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 08:22:49 +00:00
Evan Cheng
ade0162fdf
GEP index sink test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35131 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 03:18:32 +00:00
Devang Patel
0e7039a5a8
Test case for X86 inline asm constraint 'I'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35130 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 00:14:52 +00:00
Devang Patel
84f7fd2483
Support 'I' inline asm constraint.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35129 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
368f20fda4
Only ARMv6 has BSWAP.
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Fix MultiSource/Applications/aha test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 22:54:16 +00:00
Evan Cheng
9e2d86add8
Turn on GEP index sinking by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35127 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 18:32:30 +00:00
Evan Cheng
9f5ead9601
Stupid bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35126 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 17:50:20 +00:00
Bill Wendling
1b7a81d3ae
And now support for MMX logical operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 09:44:46 +00:00
Evan Cheng
3cd4e5095b
Sink a binary expression into its use blocks if it is a loop invariant
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computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:46:27 +00:00
Evan Cheng
2770747216
Added isLegalAddressExpression(). Only allows X +/- C for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:43:56 +00:00
Evan Cheng
14245a9d62
Added isLegalAddressExpression hook to test if the given expression can be
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folded into target addressing mode for the given type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:42:32 +00:00
Evan Cheng
2864eee7a3
These forward declarations are not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35120 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:41:06 +00:00
Nick Lewycky
4c70875774
Add more comments and update to new asm syntax.
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Add new micro-optimizations.
Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35119 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 02:37:39 +00:00
Bill Wendling
74027e98f1
Multiplication support for MMX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Evan Cheng
56fdd7af88
Debugging output stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35117 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:19:28 +00:00
Reid Spencer
5eb77c7674
Regenerate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35116 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 03:26:42 +00:00
Reid Spencer
44f87ee746
Revert last changes as they introduced other problems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35115 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 03:25:34 +00:00
Evan Cheng
8f7d26bce7
ARM isel should match ldr x +/- x * (2^n) to ldr [x, +/- x, lsl #log2(n)].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35114 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 23:26:40 +00:00
Reid Spencer
3fae7ba5b5
Regenerate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35113 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 23:13:06 +00:00