3 Commits

Author	SHA1	Message	Date
Daniel Sanders	68138dc9a8	[mips][msa] Fix invalid generated code when lowering FrameIndex involving unaligned offsets. ... Summary: The MSA ld.[bhwd] and st.[bhwd] instructions scale the immediate by the element size before use as an offset. The offset must therefore be a multiple of the element size to be valid in these instructions. However, an unaligned base address is valid in MSA. This commit causes the compiler to emit valid code when the calculated offset is not a multiple of the element size by accounting for the offset using addiu and using a zero offset in the load/store. Depends on D2338 Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2339 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196777 91177308-0d34-0410-b5e6-96231b3b80d8	2013-12-09 12:47:12 +00:00
Daniel Sanders	897268d931	[mips][msa] Fix suboptimal FrameIndex lowering for ld.[hwd] and st.[hwd] ... Summary: The immediate in these instructions is scaled before use as an offset. They therefore have a wider reach than ld.b/st.b. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2338 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196775 91177308-0d34-0410-b5e6-96231b3b80d8	2013-12-09 11:50:16 +00:00
Daniel Sanders	6fdef5ecd7	[mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex. ... This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s when the stack frame is between 512 and 32,768 bytes in size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195973 91177308-0d34-0410-b5e6-96231b3b80d8	2013-11-30 13:47:57 +00:00