Commit Graph

68329 Commits

Author SHA1 Message Date
Rafael Espindola
051c948bbe Implement get getSymbolFileOffset with getSymbolAddress.
This has the following advantages:
* Less code.
* The old ELF implementation was wrong for non-relocatable objects.
* The old ELF implementation (and I think MachO) was wrong for thumb.

No current testcase since this is only used from MCJIT and it only uses
relocatable objects and I don't think it supports thumb yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205508 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 03:13:33 +00:00
Rafael Espindola
3539519223 Remove getSymbolValue.
All existing users explicitly ask for an address or a file offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205503 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 02:32:47 +00:00
Juergen Ributzka
7fce127f62 Revert "[Constant Hoisting] Lazily compute the idom and cache the result."
This code is no longer usefull, because we only compute and use the
IDom once. There is no benefit in caching it anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205498 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 01:38:47 +00:00
Hal Finkel
d68b03bcd2 Account for scalarization costs in BasicTTI::getMemoryOpCost for extending vector loads
When a vector type legalizes to a larger vector type, and the target does not
support the associated extending load (or truncating store), then legalization
will scalarize the load (or store) resulting in an associated scalarization
cost.  BasicTTI::getMemoryOpCost needs to account for this.

Between this, and r205487, PowerPC on the P7 with VSX enabled shows:

MultiSource/Benchmarks/PAQ8p/paq8p: 43% speedup
SingleSource/Benchmarks/BenchmarkGame/puzzle: 51% speedup
SingleSource/UnitTests/Vectorizer/gcc-loops 28% speedup

(some of these are new; some of these, such as PAQ8p, just reverse regressions
that VSX support would trigger)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205495 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 00:53:59 +00:00
Rafael Espindola
14ae43449c Revert "Fix a nomenclature error in llvm-nm."
This reverts commit r205479.

It turns out that nm does use addresses, it is just that every reasonable
relocatable ELF object has sections with address 0. I have no idea if those
exist in reality, but it at least it shows that llvm-nm should use the name
address.

The added test was includes an unusual .o file with non 0 section addresses. I
created it by hacking ELFObjectWriter.cpp.

Really sorry for the churn.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205493 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 00:19:35 +00:00
Lang Hames
d285beabff [X86] As per suggestion from Craig Topper and Hal Finkel, override
TargetInstrInfo::findCommutedOpIndices to enable VFMA*231 commutation, rather
than abusing commuteInstruction.

Thanks very much for the suggestion guys!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205489 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 23:57:49 +00:00
Hal Finkel
9263e6f08d Fix multi-register costs in BasicTTI::getCastInstrCost
For an cast (extension, etc.), the currently logic predicts a low cost if the
associated operation (keyed on the destination type) is legal (or promoted).
This is not true when the number of values required to legalize the type is
changing. For example, <8 x i16> being sign extended by <8 x i32> is not
generically cheap on PPC with VSX, even though sign extension to v4i32 is
legal, because two output v4i32 values are required compared to the single
v8i16 input value, and without custom logic in the target, this conversion will
scalarize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205487 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 23:18:54 +00:00
Lang Hames
ed2154b816 [CodeGen] Teach the peephole optimizer to remember (and exploit) all folding
opportunities in the current basic block, rather than just the last one seen.

<rdar://problem/16478629>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205481 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 22:59:58 +00:00
Rafael Espindola
5a61b72493 Fix a nomenclature error in llvm-nm.
What llvm-nm prints depends on the file format. On ELF for example, if the
file is relocatable, it prints offsets. If it is not, it prints addresses.
Since it doesn't really need to care what it is that it is printing, use the
generic term value.

Fix or implement getSymbolValue to keep llvm-nm working.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205479 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 22:52:46 +00:00
Hal Finkel
1fb3df7a2e [PowerPC] Make PPCTTI::getMemoryOpCost call BasicTTI::getMemoryOpCost
PPCTTI::getMemoryOpCost will now make use of BasicTTI::getMemoryOpCost to
calculate the base cost of the memory access, and then adjust on top of that.
There is no functionality change from this modification, but it will become
important so that PPCTTI can take advantage of scalarization information for which
BasicTTI::getMemoryOpCost will account in the near future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205476 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 22:43:49 +00:00
Juergen Ributzka
75cea2c73e Add comments and test case for [DAG] Keep the opaque constant flag when performing unary constant folding operations (r204737).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205474 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 22:21:01 +00:00
Lang Hames
b1b4d08195 [X86] Make the VFMA*231 variants commutable and relax the alignment restrictions
on FMA3 memory operands. FMA3 instructions are VEX encoded, so they can load
from unaligned memory.

Testcase to follow, along with related patch.

<rdar://problem/16478629>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205472 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 22:06:16 +00:00
Duncan P. N. Exon Smith
3845c071a7 Revert "Reapply "LTO: add API to set strategy for -internalize""
This reverts commit r199244.

Conflicts:
	include/llvm-c/lto.h
	include/llvm/LTO/LTOCodeGenerator.h
	lib/LTO/LTOCodeGenerator.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205471 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 22:05:57 +00:00
Juergen Ributzka
172e0ca8c5 Add comments and test case for [X86TTI] Make constant base pointers for GetElementPtr opaque (r204739).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205468 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 21:45:36 +00:00
Saleem Abdulrasool
396e5e328c ARM: update subtarget information for Windows on ARM
Update the subtarget information for Windows on ARM.  This enables using the MC
layer to target Windows on ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 20:32:05 +00:00
Jim Grosbach
bc413d65a2 Make a few more range-based loops use explicit types.
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205458 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 20:21:22 +00:00
Tom Stellard
adb852ddf3 TargetLibraryInfo: Disable memcpy and memset on R600
There are no implementations of these for R600.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205455 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 19:53:29 +00:00
Jim Grosbach
bc07242d9b Simplify resolveFrameIndex() signature.
Just pass a MachineInstr reference rather than an MBB iterator.
Creating a MachineInstr& is the first thing every implementation did
anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205453 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 19:28:18 +00:00
Jim Grosbach
acb6d9834a ARM: cortex-m0 doesn't support unaligned memory access.
Unlike other v6+ processors, cortex-m0 never supports unaligned accesses.
From the v6m ARM ARM:

"A3.2 Alignment support: ARMv6-M always generates a fault when an unaligned
access occurs."

rdar://16491560

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205452 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 19:28:13 +00:00
Jim Grosbach
b4e30b31e9 Make some range based loop types more explicit.
No functional change, but more readable code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205451 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 19:28:08 +00:00
Kai Nacke
b96fc4a5ea [mips] Add more Octeon cnMips instructions
Adds the instructions ext/ext32/cins/cins32.
It also changes pop/dpop to accept the two operand version and
adds a simple pattern to generate baddu.
Tests for the two operand versions (including baddu/dmul/dpop/pop)
and the code generation pattern for baddu are included.

Reviewed by: Daniel.Sanders@imgtec.com


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205449 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:40:43 +00:00
Jim Grosbach
6408bdcacd [C++11,ARM64] Range based for and explicit 'override' in STP cleanup.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205446 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:59 +00:00
Jim Grosbach
252303f4ad [C++11,ARM64] Range based for loops in constant promotion.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205445 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:56 +00:00
Jim Grosbach
72ca0bfa7f [C++11,ARM64] Range based for loops in load/store pair optimizer.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205444 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:53 +00:00
Jim Grosbach
8c60cf143e [C++11,ARM64] Range based for loops in target lowering.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205443 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:51 +00:00
Jim Grosbach
cbc64ac10e [C++11,ARM64] Range based for loops in frame lowering.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205442 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:49 +00:00
Jim Grosbach
7e2d11d345 [C++11,ARM64] Range based for loops in pseudo expansion.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205441 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:46 +00:00
Jim Grosbach
4d59fd9cf0 [C++11,ARM64] Range based for loops for LOH
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205440 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:44 +00:00
Jim Grosbach
86ae767ea4 [C++11,ARM64] Range based for loops TLS cleanup.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205439 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:41 +00:00
Jim Grosbach
5e2ab67a19 [C++11,ARM64] Range based for loops in branch relaxation.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205438 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:39 +00:00
Jim Grosbach
68c150834b [C++11,ARM64] Range based for loops in address type promotion.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205437 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 18:00:36 +00:00
Quentin Colombet
a5084593ba [ARM64][CollectLOH] Remove the link to the radar from the comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205435 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 16:40:49 +00:00
Oliver Stannard
af48fc4136 ARM: Add support for segmented stacks
Patch by Alex Crichton, ILyoan, Luqman Aden and Svetoslav.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205430 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 16:10:33 +00:00
Adrian Prantl
5524d787b7 clarify comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205429 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 15:49:45 +00:00
Tim Northover
6584d94610 ARM64: use GOT for weak symbols & PIC.
Weak symbols cannot use the small code model's usual ADRP sequences since the
instruction simply may not be able to encode a value of 0.

This redirects them to use the GOT, which hopefully linkers are able to cope
with even in the static relocation model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205426 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 14:39:11 +00:00
Tim Northover
671c92d886 ARM64: fix lowering of fp128 fptosi/fptoui
We were creating libcall nodes that returned an MVT::f128, when these
particular operations actually return an int of some stripe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205425 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 14:39:07 +00:00
Tim Northover
24e78e0125 SLPVectorizer: compare entire intrinsic for SLP compatibility.
Some Intrinsics are overloaded to the extent that return type equality (all
that's been checked up to now) does not guarantee that the arguments are the
same. In these cases SLP vectorizer should not recurse into the operands, which
can be achieved by comparing them as "Function *" rather than simply the ID.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205424 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 14:39:02 +00:00
Tim Northover
3844cadc9a ARM64: make sure first argument to INSERT_SUBVECTOR has right type.
Again, coalescing and other optimisations swiftly made the MachineInstrs
consistent again, but when compiled at -O0 a bad INSERT_SUBREGISTER was
produced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205423 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 14:38:58 +00:00
Tim Northover
87e824120d ARM64: convert fp16 narrowing ISel to pseudo-instruction
The previous attempt was fine with optimisations, but was actually rather
cavalier with its types. When compiled at -O0, it produced invalid COPY
MachineInstrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 14:38:54 +00:00
Job Noorman
4e7ec2b053 Mark FPB as a reserved register when needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205421 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 13:13:56 +00:00
Rafael Espindola
5d853bf42d Work around gold bug http://sourceware.org/PR16794.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205416 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 12:15:20 +00:00
Renato Golin
421397ac00 Remove duplicated DMB instructions
ARM specific optimiztion, finding places in ARM machine code where 2 dmbs
follow one another, and eliminating one of them.

Patch by Reinoud Elhorst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205409 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 09:03:43 +00:00
Yaron Keren
9ee14e3522 Added isTargetWindowsMSVC(), renamed isTargetMingw() to isTargetWindowsGNU()
and isTargetCygwin() to isTargetWindowsCygwin() to be consistent with the
four Windows environments in Triple.h.

Suggestion by Saleem Abdulrasool!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205393 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 04:27:51 +00:00
Hal Finkel
081e6fcd17 [LoopVectorizer] Count dependencies of consecutive pointers as uniforms
For the purpose of calculating the cost of the loop at various vectorization
factors, we need to count dependencies of consecutive pointers as uniforms
(which means that the VF = 1 cost is used for all overall VF values).

For example, the TSVC benchmark function s173 has:
  ...
  %3 = add nsw i64 %indvars.iv, 16000
  %arrayidx8 = getelementptr inbounds %struct.GlobalData* @global_data, i64 0, i32 0, i64 %3
  ...
and we must realize that the add will be a scalar in order to correctly deduce
it to be profitable to vectorize this on PowerPC with VSX enabled. In fact, all
dependencies of a consecutive pointer must be a scalar (uniform), and so we
simply need to add all consecutive pointers to the worklist that currently
detects collects uniforms.

Fixes PR19296.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205387 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 02:34:49 +00:00
David Blaikie
d486d104b5 Adjust comments regarding non-relocated abbrev offset in debug_info.dwo
I'm not sure the comment in the implementation really adds a lot of
value (it's clear that we emit zero when no symbol is provided, but it
doesn't explain why we would do that). Happy to iterate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 02:04:51 +00:00
David Blaikie
5b8e4798ce Split debug_loc and debug_loc.dwo emission into two separate functions
Based on code review feedback from Eric Christopher on r204697

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205385 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 01:50:20 +00:00
David Blaikie
b2d73d1556 DebugInfo: Introduce DebugLocList to encapsulate a list of DebugLocEntries and an MC Label to refer to them
This removes the magic-number-esque code creating/retrieving the same
label for a debug_loc entry from two places and removes the last small
piece of reusable logic from emitDebugLoc so that there will be less
duplication when refactoring it into two functions (one for debug_loc,
the other for debug_loc.dwo).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 01:43:18 +00:00
Quentin Colombet
91b97ccd87 [ARM64][CollectLOH] Add some comments to explain how the LOHs
framework works (for the compiler part), since the design
document is not available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205379 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 01:02:28 +00:00
Adrian Prantl
45063c008e Add a doxygen comment to DebugLocEntry::Merge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205374 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 23:34:45 +00:00
David Blaikie
132285a59c DebugLocEntry: Actually merge the loc entry when returning true.
Seems we didn't have any test coverage for merging... awesome. So I
added some - but hit an llvm-objdump bug while I was there. I'm choosing
not to shave that yak right now.

Code review feedback/bug catch by Adrian Prantl in r205360.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205373 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 23:19:23 +00:00