Commit Graph

24874 Commits

Author SHA1 Message Date
Matt Arsenault
051cc062b2 Temporary hack to try cleaning extra .s file from bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211963 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 21:43:50 +00:00
Chad Rosier
d7be29696d [AArch64] Fix memset ICE when memset value is f128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211960 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 21:05:09 +00:00
Justin Bogner
1cfa342dc1 llvm-cov: Support specifying multiple source files
Make llvm-cov compatible with gcov for cases where multiple files are
specified on the command line. That is, loop over each one and report
coverage, and report errors on stderr only rather than via return
code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211959 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 20:41:25 +00:00
Lang Hames
c3747f276a [RuntimeDyld] Add a framework for testing relocation logic in RuntimeDyld.
This patch adds a "-verify" mode to the llvm-rtdyld utility. In verify mode,
llvm-rtdyld will test supplied expressions against the linked program images
that it creates in memory. This scheme can be used to verify the correctness
of the relocation logic applied by RuntimeDyld.

The expressions to test will be read out of files passed via the -check option
(there may be more than one of these). Expressions to check are extracted from
lines of the form:
# rtdyld-check: <expression>

This system is designed to fit the llvm-lit regression test workflow. It is
format and target agnostic, and supports verification of images linked for
remote targets. The expression language is defined in
llvm/include/llvm/RuntimeDyldChecker.h . Examples can be found in
test/ExecutionEngine/RuntimeDyld.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211956 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 20:20:57 +00:00
Chandler Carruth
63195d7e5a [x86] Fix another bug hit when bootstrapping with the new shuffle
lowering.

For maximum irony, I had already discovered this bug, diagnosed it, and
left FIXMEs about it in the test cases. =[ I just failed to go back over
those until after i had reduced a bootstrap miscompile down to a single
TU, stared at the assembly for an hour, and figured out the bug. Again.

Oh well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211955 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 20:07:40 +00:00
Justin Holewinski
7a28de08f3 [NVPTX] Add reflect intrinsic (better than matching by function name)
Also clean up some of the logic in NVVMReflect.cpp while we're messing around in there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211948 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:36:11 +00:00
Justin Holewinski
c95d327874 [NVPTX] Add 'b' asm constraint
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211946 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:36:06 +00:00
Justin Holewinski
3c81367a5d [NVPTX] Error out if initializer is given for variable in an address space that does not support initialization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211943 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:36:01 +00:00
Justin Holewinski
0ded57ccc5 [NVPTX] Add support for .managed variables for UVM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211942 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:58 +00:00
Justin Holewinski
2a8dc35cca [NVPTX] Emit .weak linkage for link_once, weak, available_externally, and common linkage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211941 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:56 +00:00
Justin Holewinski
cb8f98382b [NVPTX] Fix handling of ldg/ldu intrinsics.
The address space of the pointer must be global (1) for these intrinsics.  There must also be alignment metadata attached to the intrinsic calls, e.g.

%val = tail call i32 @llvm.nvvm.ldu.i.global.i32.p1i32(i32 addrspace(1)* %ptr), !align !0

!0 = metadata !{i32 4}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211939 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:51 +00:00
Justin Holewinski
8992274412 [NVPTX] Clean up argument lowering code and properly handle alignment for structs and vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211938 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:44 +00:00
Justin Holewinski
863b0d45a5 [NVPTX] Add support for [SHL,SRA,SRL]_PARTS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211936 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:40 +00:00
Justin Holewinski
10da1651ed [NVPTX] Implement fma and imad contraction as target DAGCombiner patterns
This also introduces DAGCombiner patterns for mul.wide to multiply two smaller integers and produce a larger integer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211935 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:37 +00:00
Justin Holewinski
508c80f11f [NVPTX] Add support for efficient rotate instructions on SM 3.2+
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211934 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:33 +00:00
Justin Holewinski
1f75f4a0ee [NVPTX] Add missing isel patterns for 64-bit atomics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211933 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:30 +00:00
Justin Holewinski
ef92cf50d6 [NVPTX] Add isel patterns for bit-field extract (bfe)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211932 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:27 +00:00
Justin Holewinski
de7bbdff33 [NVPTX] Add support for isspacep instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211931 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:24 +00:00
Justin Holewinski
1571d272c8 [NVPTX] Add support for envreg reads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211930 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:21 +00:00
Justin Holewinski
a54609ed93 [NVPTX] Emit .weak when linkage is not external, internal, or private
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211926 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:35:10 +00:00
Chandler Carruth
75504d45ec [x86] Fix a miscompile in the new shuffle lowering uncovered by
a bootstrap.

I managed to mis-remember how PACKUS worked on x86, and was using undef
for the high bytes instead of zero. The fix is fairly obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211922 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:25:23 +00:00
David Majnemer
c8a1169c93 IR: Add COMDATs to the IR
This new IR facility allows us to represent the object-file semantic of
a COMDAT group.

COMDATs allow us to tie together sections and make the inclusion of one
dependent on another. This is required to implement features like MS
ABI VFTables and optimizing away certain kinds of initialization in C++.

This functionality is only representable in COFF and ELF, Mach-O has no
similar mechanism.

Differential Revision: http://reviews.llvm.org/D4178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211920 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 18:19:56 +00:00
David Blaikie
e70cdf9468 Fix test so it doesn't try to write out temporary files into the test tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211916 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 17:45:43 +00:00
David Majnemer
d7d427732e MC: Fix associative sections on COFF
COFF sections in MC were represented by a tuple of section-name and
COMDAT-name.  This is not sufficient to represent a .text section
associated with another .text section; we need a way to distinguish
between the key section and the one marked associative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211913 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 17:19:44 +00:00
Matt Arsenault
ee5d4a7b73 R600: Don't crash on unhandled instruction in promote alloca
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211906 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 16:52:49 +00:00
Ulrich Weigand
1edaab996f [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex
I've run into a bug where current LLVM at -O0 (with fast-isel)
generated invalid code like:

        ld 0, 20936(1)                  # 8-byte Folded Reload
        stw 12, 10348(0)
        stw 12, 10344(0)

The underlying vreg had been introduced as base register by the
Local Stack Slot Allocation pass.  That register was constrained
to G8RC by PPCRegisterInfo::materializeFrameBaseRegister to match
the ADDI instruction used to set it, but it was *not* constrained
to G8RC_NOX0 to fit the *use* of the register in an address.

That should have happened in PPCRegisterInfo::resolveFrameIndex.
This patch adds an appropriate constrainRegClass call.

Reviewed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 13:04:12 +00:00
Chandler Carruth
c5114dbcc3 [x86] Teach the target combine step to aggressively fold pshufd insturcions.
Summary:
This allows it to fold pshufd instructions across intervening
half-shuffles and other noise. This pattern actually shows up in the
generic lowering tests, but I've also added direct tests using
intrinsics to make sure that the specific desired functionality is
working even if the lowering stuff changes in the future.

Differential Revision: http://reviews.llvm.org/D4292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211892 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:40:13 +00:00
Simon Atanasyan
fc9897f66f [ELF][Mips] Fix recognition of MIPS 64-bit arch in the ELFObjectFile:getArch() method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211891 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:36:45 +00:00
Chandler Carruth
4363b0729b [x86] Teach the target-specific combining how to aggressively fold
half-shuffles, even looking through intervening instructions in a chain.

Summary:
This doesn't happen to show up with any test cases I've found for the current
shuffle lowering, but previous attempts would benefit from this and it seems
generally useful. I've tested it directly using intrinsics, which also shows
that it will work with hand vectorized code as well.

Note that even though pshufd isn't directly used in these tests, it gets
exercised because we combine some of the half shuffles into a pshufd
first, and then merge them.

Differential Revision: http://reviews.llvm.org/D4291

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:34:40 +00:00
Chandler Carruth
f91161874e [x86] Teach the X86 backend to DAG-combine SSE2 shuffles that are
trivially redundant.

This fixes several cases in the new vector shuffle lowering algorithm
which would generate redundant shuffle instructions for the sake of
simplicity.

I'm also deleting a testcase which was somewhat ridiculous. It was
checking for a bug in 2007 about incorrectly transforming shuffles by
looking for the string "-86" in the output of a pretty substantial
function. This test case doesn't seem to have any value at this point.

Differential Revision: http://reviews.llvm.org/D4240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:27:52 +00:00
Chandler Carruth
050d187bc8 [x86] Begin a significant overhaul of how vector lowering is done in the
x86 backend.

This sketches out a new code path for vector lowering, hidden behind an
off-by-default flag while it is under development. The fundamental idea
behind the new code path is to aggressively break down the problem space
in ways that ease selecting the odd set of instructions available on
x86, and carefully avoid scalarizing code even when forced to use older
ISAs. Notably, this starts off restricting itself to SSE2 and implements
the complete vector shuffle and blend space for 128-bit vectors in SSE2
without scalarizing. The plan is to layer on top of this ISA extensions
where we can bail out of the complex SSE2 lowering and opt for
a cheaper, specialized instruction (or set of instructions). It also
needs to be generalized to AVX and AVX512 vector widths.

Currently, this does a decent but not perfect job for SSE2. There are
some specific shortcomings that I plan to address:
- We need a peephole combine to fold together shuffles where possible.
  There are cases where a previous shuffle could be modified slightly to
  arrange for elements to be in the correct position and a later shuffle
  eliminated. Doing this eagerly added quite a bit of complexity, and
  so my plan is to combine away these redundancies afterward.
- There are a lot more clever ways to use unpck and pack that need to be
  added. This is essential for real world shuffles as it turns out...

Once SSE2 is polished a bit I should be able to get interesting numbers
on performance improvements on benchmarks conducive to vectorization.
All of this will be off by default until it is functionally equivalent
of course.

Differential Revision: http://reviews.llvm.org/D4225

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211888 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:23:44 +00:00
Dinesh Dwivedi
22e371c74e Added instruction combine to transform few more negative values addition to subtraction (Part 3)
This patch enables transforms for

(x + (~(y | c) + 1) --> x - (y | c) if c is odd

Differential Revision: http://reviews.llvm.org/D4210



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211881 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 07:47:35 +00:00
David Majnemer
d023a353c1 GlobalOpt: Fix constantfold-initializers.ll test
The test added in r211762 was sloppy, the correct initializer wasn't
added to @llvm.global_ctors

Spotted by Pasi Parviainen!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211879 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 07:36:26 +00:00
David Blaikie
0263debd04 Revert "Revert "Revert "PR20038: DebugInfo: Inlined call sites where the caller has debug info but the call itself has no debug location."""
Reverting this again, didn't mean to commit it - while r211872 fixes one
of the issues here, there are still others to figure out and address.

This reverts commit r211871.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211873 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:34:05 +00:00
David Blaikie
effea626e2 ArgumentPromotion: Propagate debug locations on calls for which arguments are promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211872 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:32:09 +00:00
David Blaikie
150f5b8920 Revert "Revert "PR20038: DebugInfo: Inlined call sites where the caller has debug info but the call itself has no debug location.""
This reverts commit r211724.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211871 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 05:31:49 +00:00
Andrew Trick
e8f8db1c5a MachineScheduler: add some book-keeping to fix an assert.
Fixe for Bug 20057 - Assertion failied in llvm::SUnit* llvm::SchedBoundary::pickOnlyChoice(): Assertion `i <= (HazardRec->getMaxLookAhead() + MaxObservedStall) && "permanent hazard"'

Thanks to Chad for the test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211865 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 04:57:05 +00:00
Matt Arsenault
88a3c72e25 R600: Add some testcases for promote alloca pass.
More complicated GEPs are skipped. Add some tests to
actually stress this skipping.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211859 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 03:55:55 +00:00
Adam Nemet
a50d4dd9b0 [X86] AVX512: Add vbroadcasti*
For now I used a separate template for these sub-vector/tuple broadcasts
rather than sharing the mem variants with avx512_int_broadcast_rm.

<rdar://problem/17402869>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211828 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 00:43:38 +00:00
Juergen Ributzka
b1b6d10d09 [StackMaps] Enable patchpoint liveness analysis per default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211817 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 23:39:52 +00:00
Juergen Ributzka
307a6447e5 [Stackmaps] Remove the liveness calculation for stackmap intrinsics.
There is no need to calculate the liveness information for stackmaps. The
liveness information is still available for the patchpoint intrinsic and
that is also the intended usage model.

Related to <rdar://problem/17473725>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211816 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 23:39:44 +00:00
Arnold Schwaighofer
c2d93c4048 GVN: Preserve invariant.load metadata
If both instructions to be replaced are marked invariant the resulting
instruction is invariant.

rdar://13358910

Fix by Erik Eckstein!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211801 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 19:51:19 +00:00
Matt Arsenault
3cd8cf6bbd R600/SI: Add FP mode bits to binary.
The default rounding mode to initialize the mode register needs
to be reported to the runtime. Fill in other bits a kernel
may be interested in setting for future use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 17:22:30 +00:00
Renato Golin
7eacf4e813 Added parsing co-processor names starting with "cr"
Additional compliant GAS names for coprocessor register name
are enabled for all instruction with parameter MCK_CoprocReg:
LDC,LDC2,STC,STC2,CDP,CDP2,MCR,MCR2,MCRR,MCRR2,MRC,MRC2,MRRC,MRRC2

Patch by Andrey Kuharev.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211776 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 13:10:53 +00:00
Andrea Di Biagio
817812f61c [X86] Improve the selection of SSE3/AVX addsub instructions.
This patch teaches the backend how to canonicalize a shuffle vectors
according to the rule:

 - (shuffle (FADD A, B), (FSUB A, B), Mask) ->
       (shuffle (FSUB A, -B), (FADD A, -B), Mask)

Where 'Mask' is:
  <0,5,2,7>            ;; for v4f32 and v4f64 shuffles.
  <0,3>                ;; for v2f64 shuffles.
  <0,9,2,11,4,13,6,15> ;; for v8f32 shuffles.

In general, ISel only knows how to pattern-match a canonical
'fadd + fsub + blendi' dag node sequence into an ADDSUB instruction.

This new rule allows to convert a non-canonical dag sequence into a
canonical one that will be matched by a single ADDSUB at ISel stage.

The idea of converting a non-canonical ADDSUB into a canonical one by
swapping the first two operands of the shuffle, and then negating the
second operand of the FADD and FSUB, was originally proposed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211771 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 10:45:21 +00:00
Dinesh Dwivedi
c2b11baf5f This patch removed duplicate code for matching patterns
which are now handled in SimplifyUsingDistributiveLaws() 
(after r211261)

Differential Revision: http://reviews.llvm.org/D4253



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211768 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 08:57:33 +00:00
Dinesh Dwivedi
0bf7c06b63 Added instruction combine to transform few more negative values addition to subtraction (Part 2)
This patch enables transforms for

(x + (~(y | c) + 1)   -->   x - (y | c) if c is even

Differential Revision: http://reviews.llvm.org/D4209



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211765 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 05:40:22 +00:00
David Majnemer
29640bcb7d GlobalOpt: Don't optimize thread_local for initializers
Folding a reference to a thread_local variable into another global
variable's initializer is very problematic, there is no relocation that
exists to represent such an access.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211762 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 03:02:19 +00:00
Matt Arsenault
b0f5a0e7e7 R600: Fix vector FMA
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211757 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 01:28:05 +00:00
Hans Wennborg
0545f16700 Don't build switch tables for dllimport and TLS variables in GEPs
This is a follow-up to r211331, which failed to notice that we were
returning early from ValidLookupTableConstant for GEPs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211753 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-26 00:30:52 +00:00