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4400 Commits

Author SHA1 Message Date
Douglas Gregor
033080cf6a CMake build fixes, from Xerxes Ranby 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74720 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 18:53:52 +00:00
Chris Lattner
cd714b12fc @GOTPCREL is also rip-relative. Fix fast-isel to do the right thing. 
This fixes an llvm-gcc bootstrap problem I introduced.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74691 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 04:22:01 +00:00
Chris Lattner
27598ec1e2 Fix yet-another bug I introduced into fastisel, this time handling 
constant pool references that weren't getting properly rip-relative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74689 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 03:14:25 +00:00
Bruno Cardoso Lopes
3d62a412fb Remove getFunctionAlignment from TargetELFInfo and use new MachineFunction alignment method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74686 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 02:13:13 +00:00
Dan Gohman
f530c92cd5 Fix a bunch of other places that used operator[] to test whether 
a key is present in a std::map or DenseMap to use find instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74676 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 00:17:47 +00:00
Bill Wendling
b4202b84d7 Update comments to make it clear that the function alignment is the Log2 of the 
bytes and not bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74624 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 18:50:55 +00:00
Chris Lattner
35c28eca62 Fix some fast-isel problems selecting global variable addressing in 
pic mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74582 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 03:27:19 +00:00
Daniel Dunbar
5bcc8bd0c6 Remove unused AsmPrinter OptLevel argument, and propogate. 
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 01:48:54 +00:00
Bill Wendling
20c568f366 Add an "alignment" field to the MachineFunction object. It makes more sense to 
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74564 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:38:32 +00:00
David Greene
f0c3d023ae Add 256-bit memory operand support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74548 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 19:24:59 +00:00
Rafael Espindola
af5f6ba32d Fix PR4485. 
Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would
cause one register to remain on the stack at the function return.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74534 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 16:40:03 +00:00
Rafael Espindola
f55715c5c7 Fix PR4484. 
This was caused by me confounding FP0 and ST(0).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74523 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 12:18:16 +00:00
Evan Cheng
4784f1fc73 Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. 
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 08:49:04 +00:00
Chris Lattner
e3821c79bc remove a bogus note. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74509 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 05:22:31 +00:00
Chris Lattner
a05ec61684 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74508 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 04:20:46 +00:00
David Greene
d94c101abb Add a 256-bit register class and YMM registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74469 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 22:50:51 +00:00
Rafael Espindola
63de5c3b7e FIX PR 4459. 
Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74446 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 20:29:59 +00:00
Owen Anderson
9917700af4 Add a target-specific DAG combine on X86 to fold the common pattern of 
fence-atomic-fence down to just the atomic op.  This is possible thanks to
X86's relatively strong memory model, which guarantees that locked instructions
(which are used to implement atomics) are implicit fences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74435 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 18:04:45 +00:00
David Greene
3016af5a1d Add processor descriptions for Istanbul and Shanghai. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74429 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 16:54:06 +00:00
David Greene
640a0c1477 Fix a subtarget feature bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74428 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 16:51:01 +00:00
David Greene
9b9838dbd4 Add more vector ValueTypes for AVX and other extended vector instruction 
sets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74427 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 16:47:10 +00:00
Chris Lattner
f7789c72bd remove a bunch of fixmes (old checking code) and commonize all the 
target-specific operand printing functionality.  Yay.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74379 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:46:24 +00:00
Chris Lattner
b1acd68fe4 pull @GOT, @GOTOFF, @GOTPCREL handling into isel from the asmprinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74378 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:39:56 +00:00
Chris Lattner
4c1b606ecd simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74377 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 05:24:12 +00:00
Chris Lattner
553e571b43 fix clang/test/CodeGenObjC/try.m, a basereg doesn't mean no global anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74375 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:50:14 +00:00
Chris Lattner
380135cc3e fix a bunch of failures in the X86-64 JIT by tolerating RIP as 
a base register.  We just ignore it for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74374 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:46:33 +00:00
Chris Lattner
74d3f50a80 factor some logic out into a helper function, allow remat of loads from constant 
globals.  This implements remat-constant.ll even without aggressive-remat.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74373 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:38:55 +00:00
Chris Lattner
18c5987fa3 Reimplement rip-relative addressing in the X86-64 backend. The new 
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74372 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:16:01 +00:00
Chris Lattner
89da699092 Fix PR4466 by making fastisel set operand flags correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74366 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 01:31:51 +00:00
David Greene
343dadbb36 Add feature flags for AVX and FMA and fix some SSE4A feature flag 
initialization problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74350 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:46:54 +00:00
Evan Cheng
2c2fb823b9 Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:00:19 +00:00
Chris Lattner
d8220e5794 simplify printing of MO_ExternalSymbol in a non-pcrel context. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74334 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:47:27 +00:00
Chris Lattner
c4233af200 add %rip to the GR64 register class. Lets avoid allocating it to anything though! :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74328 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:25:00 +00:00
Chris Lattner
b903bed0fe Move all the TLS processing logic into isel, don't do it in asmprinter at all. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74327 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:20:29 +00:00
Chris Lattner
ba8ef45d12 make sure to propagate operand flags in SelectTLSADDRAddr properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74326 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 21:18:37 +00:00
Chris Lattner
03a597f2b7 minor cleanup/framework changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74316 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 20:00:05 +00:00
Chris Lattner
41621a2700 move magic for PIC constantpool references from asmprinter to isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74313 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 19:22:52 +00:00
Chris Lattner
89ca575c31 use jump table operand flags in asm printer instead of "magic predicates" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74310 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 18:55:01 +00:00
Chris Lattner
0b0deab464 fix a pasto. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74275 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 05:56:49 +00:00
Chris Lattner
b8afeb99e9 propagate target operand flags through addressing mode selection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74272 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 05:51:45 +00:00
Devang Patel
0f05d22a31 Let's ignore MDStrings also! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74255 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 02:26:12 +00:00
Chris Lattner
55e7c82730 start adding logic in isel to determine asm printer semantics, step N of M. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74246 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 00:43:52 +00:00
Chris Lattner
2b0de6a286 simplify shouldPrintPLT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74186 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 17:58:52 +00:00
Chris Lattner
ac5e887a6c Use target-specific machine operand flags to eliminate a gross hack 
from the asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74184 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 17:38:33 +00:00
Chris Lattner
b1fb84dee9 just eliminate the code entirely! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74183 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 17:28:07 +00:00
Douglas Gregor
4b73893d82 Add missing dependencies to the CMake build system. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74161 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 05:03:06 +00:00
Chris Lattner
4b950ec072 fix comments to be correct. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74154 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 01:15:47 +00:00
Devang Patel
e4c0c0fab8 No need to code gen MDNodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74150 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 00:47:42 +00:00
Chris Lattner
ab16299346 move some functions, add a FIXME, use PrintPICBaseSymbol to print the 
picbase instead of inlining it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74111 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 19:44:36 +00:00
Chris Lattner
b5299dd06a reimplement getPICLabelString as PrintPICBaseSymbol to eliminate std::string heap thrashing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74105 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 19:19:16 +00:00