Owen Anderson
0c9f250d54
Recognize alternative register names like ip -> r12.
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Fixes <rdar://problem/8857982>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:50:36 +00:00
Jakob Stoklund Olesen
f7ca976e74
Fix a few more places that should use MBB::getLastNonDebugInstr().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:47:43 +00:00
Owen Anderson
0fba714359
As far as I can tell, unified syntax uses c0-c15 instead of cr0-cr15 for mcr and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:38:16 +00:00
Chris Lattner
4c5456a56f
typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:11:56 +00:00
Chris Lattner
4cd18f98f7
memcpy + metadata = bliss :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123405 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 22:08:15 +00:00
Owen Anderson
e4e5e2aae7
Add support to the ARM MC infrastructure to support mcr and friends. This requires supporting
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the symbolic immediate names used for these instructions, fixing their pretty-printers, and
adding proper encoding information for them.
With this, we can properly pretty-print and encode assembly like:
mrc p15, #0 , r3, c13, c0, #3
Fixes <rdar://problem/8857858>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:46:02 +00:00
Evan Cheng
82caf1a867
Relax an assertion. On archs like ARM, an immediate field may be scattered. So it's possible for some bits of every 8 bits to be encoded already, and the rest still needs to be fixed up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123403 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:45:26 +00:00
Jakob Stoklund Olesen
a6ada9f725
Temporary workaround for an i386 crash in LiveDebugVariables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:28:55 +00:00
Jakob Stoklund Olesen
4f28c1c714
Teach frame lowering to ignore debug values after the terminators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:28:52 +00:00
Bob Wilson
422578547e
Tidy comments, indentation, and 80-column violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 21:10:12 +00:00
Bob Wilson
6974302e3f
Fix whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123396 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 20:59:44 +00:00
Kevin Enderby
67b212e03b
Fix ARMAsmParser::ParseOperand() to allow it to parse . as a branch target and
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directional local labels like 1f and 2b.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123393 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 20:32:36 +00:00
Devang Patel
bc8d5f11e7
Little help to debug the bugpoint itself.
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Patch by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:48:54 +00:00
Devang Patel
a851fd8cd8
Speculatively revert r123384 to make llvm-gcc-i386-linux-selfhost buildbot happy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:27:50 +00:00
Oscar Fuentes
006bfeba06
Add some platform tests.
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Patch by arrowdodger!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:17:28 +00:00
Jim Grosbach
5f3e2be7c9
When updating a tSpill/tRestore instruction to be a tSTRr/tLDRr, correctly
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set up the source operands. The original instr has an immediate operand that
should be replaced with the frame reg operand rather than just adding the
reg operand. Previously, the instruction ended up with too many operands
causing an assert() when adding the default predicate. rdar://8825456
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 19:16:48 +00:00
Jakob Stoklund Olesen
64f865ceca
Teach MachineBasicBlock::getFirstTerminator to ignore debug values.
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It will still return an iterator that points to the first terminator or end(),
but there may be DBG_VALUE instructions following the first terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123384 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 18:41:05 +00:00
Bob Wilson
f0908aeade
Check for empty structs, and for consistency, zero-element arrays.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 18:26:59 +00:00
Bob Wilson
704d1347c5
Extend SROA to handle arrays accessed as homogeneous structs and vice versa.
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This is a minor extension of SROA to handle a special case that is
important for some ARM NEON operations. Some of the NEON intrinsics
return multiple values, which are handled as struct types containing
multiple elements of the same vector type. The corresponding return
types declared in the arm_neon.h header have equivalent arrays. We
need SROA to recognize that it can split up those arrays and structs
into separate vectors, even though they are not always accessed with
the same type. SROA already handles loads and stores of an entire
alloca by using insertvalue/extractvalue to access the individual
pieces, and that code works the same regardless of whether the type
is a struct or an array. So, all that needs to be done is to check
for compatible arrays and homogeneous structs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 17:45:11 +00:00
Bob Wilson
694a10e7d8
Make SROA more aggressive with allocas containing padding.
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SROA only split up structs and arrays one level at a time, so padding can
only cause trouble if it is located in between the struct or array elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 17:45:08 +00:00
Oscar Fuentes
3bf2279411
Disable RTTI when building unit tests. This avoids errors at link time.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 15:31:45 +00:00
Oscar Fuentes
60b531270b
Platform tests for argz_* functions.
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Patch by arrowdodger!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 15:06:32 +00:00
Duncan Sands
53ad861193
Remove some wrong code which fortunately was never executed (as explained in
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the comment I added): an extern weak global may have a null address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 10:43:08 +00:00
Duncan Sands
6dc91253ab
The most common simplification missed by instsimplify in unoptimized bitcode
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is "X != 0 -> X" when X is a boolean. This occurs a lot because of the way
llvm-gcc converts gcc's conditional expressions. Add this, and a few other
similar transforms for completeness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 08:56:29 +00:00
Evan Cheng
7597212abc
Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step
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in the right direction. It eliminated some hacks and will unblock codegen
work. But it's far from being done. It doesn't reject illegal expressions,
e.g. (FOO - :lower16:BAR). It also doesn't work in Thumb2 mode at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 07:58:56 +00:00
Eric Christopher
04f5079ca1
Experiment with changing the default 32-bit linux stack alignment to
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16 bytes for PR8969. Update all testcases accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 06:47:10 +00:00
Rafael Espindola
c2a94da313
Keep unnamed_addr when linking.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 05:12:34 +00:00
Rafael Espindola
d72479c2f0
Reject uses of unnamed_addr in declarations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 01:30:30 +00:00
Kevin Enderby
fef9ff4922
Add a FIXME and two asserts for now in the ARMAsmParser when it sees .code 16 or
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.code 32 if the TargetMachine's isThumb() boolean does not match. The correct
fix is to switch ARM subtargets at that point and is tracked by rdar://8856789
which is bigger task.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 01:07:01 +00:00
Dan Gohman
dd11ea4a37
Fix r123346 to handle scalar types too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 01:06:51 +00:00
Jakob Stoklund Olesen
668c9e31df
Add missing space in debug output
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 00:57:35 +00:00
Jason W Kim
8a8696db6b
Change call to Error() to assert()
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 00:27:00 +00:00
Jason W Kim
1d8661744b
Style clean up - break up the breaks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123347 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-13 00:07:51 +00:00
Dan Gohman
b86654385a
Apply the patch from PR8958, which allows llc to get slightly
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further on the associated testcase before aborting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:56:26 +00:00
Michael J. Spencer
9df536ca78
Support/Path: Deprecate PathV1::IsSymlink and replace all uses with PathV2::is_symlink.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:55:06 +00:00
Jakob Stoklund Olesen
25dc2268a5
Try again enabling LiveDebugVariables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:36:21 +00:00
Jason W Kim
8dc602d245
Added clarifying comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:25:02 +00:00
Jason W Kim
650b7d76af
JimG sez: "The value-kinds look like masks, but they're not consistently used
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that way, unfortunately. If you want to change them to work additively instead
of a one-variant-kind-per-symbolref, that's great and I completely agree it's
worth doing, but it really should be a separate patch. Until then, this isn't
correct."
So I am reverting this bit until a more opportune time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:21:49 +00:00
Jakob Stoklund Olesen
f0704d28f3
Don't emit a DBG_VALUE for a spill slot that the rewriter decided not to use after all.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:14:07 +00:00
Jakob Stoklund Olesen
12a40314a9
Fix braino in dominator tree walk.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 23:14:04 +00:00
Jakob Stoklund Olesen
f203627f21
Sometimes, old virtual registers can linger on DBG_VALUE instructions.
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Make sure we don't crash in that case, but simply turn them into %noreg instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 22:37:49 +00:00
Jakob Stoklund Olesen
ee547095bb
Teach VirtRegRewriter to update slot indexes when erasing instructions.
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It was leaving dangling pointers in the slot index maps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 22:28:51 +00:00
Jakob Stoklund Olesen
7fd747ba24
Annotate VirtRegRewriter debug output with slot indexes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123333 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 22:28:48 +00:00
Jakob Stoklund Olesen
fc69c370e1
Verify slot index ordering.
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The slot indexes must be monotonically increasing through the function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 21:27:48 +00:00
Jakob Stoklund Olesen
a5f1a900df
Assert if anybody tries to put a slot index on a DBG_VALUE instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 21:27:45 +00:00
Jakob Stoklund Olesen
7bd46dae9c
Verify that machine instruction parent pointers are consistent.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 21:27:41 +00:00
Bill Wendling
7caebff83d
Sort the register list based on the *actual* register numbers rather than the
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enum values we give to them. <rdar://problem/8823730>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 21:20:59 +00:00
Devang Patel
85bbd576ea
Use SmallVector instead of SmallPtrSet and avoid non-deterministic behavior.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 19:12:45 +00:00
Matt Beaumont-Gay
5f8a917b65
Mostly undo r123297, but move the default case in EvaluateAsPCRel to the top
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of the switch block to appease GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 18:02:55 +00:00
Nick Lewycky
e45f2dfde6
Add another note taken from the gcc bugzilla.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-12 09:06:19 +00:00