Commit Graph

12619 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
0caa420042 Fix SystemZ tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 23:02:12 +00:00
Nadav Rotem
0ff8a4fa35 Instcombile optimization: extractelement(cast) -> cast(extractelement)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 22:57:29 +00:00
Jakob Stoklund Olesen
ca6fd009ad Fix ARM tests to be register allocator independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128680 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 22:14:03 +00:00
Benjamin Kramer
7ebdc37d2b InstCombine: APFloat can't perform arithmetic on PPC double doubles, don't even try.
Thanks Eli!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 21:35:49 +00:00
Johnny Chen
0c630b5f38 Add a test case for a malformed LDC/LDC2 instructions with PUDW = 0b0000, which
amounts to an UNDEFINED instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 20:54:30 +00:00
Evan Cheng
463d358f1d Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 19:38:48 +00:00
Johnny Chen
a52d7da1d8 Fix single word and unsigned byte data transfer instruction encodings so that
Inst{4} = 0.

rdar://problem/9213022


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 19:28:35 +00:00
Jakob Stoklund Olesen
a6f7499244 Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
Add an extra run with -regalloc=basic to keep them honest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 18:42:43 +00:00
Akira Hatanaka
1d6b38d9d3 Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128650 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 18:26:17 +00:00
Jakob Stoklund Olesen
280ea1a746 Don't completely eliminate identity copies that also modify super register liveness.
Turn them into noop KILL instructions instead. This lets the scavenger know when
super-registers are killed and defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 17:55:25 +00:00
Johnny Chen
8901e6ff3d Add BLXi to the instruction table for disassembly purpose.
A8.6.23 BLX (immediate)

rdar://problem/9212921


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 17:53:50 +00:00
Jakob Stoklund Olesen
8e53aca51a Mark all uses as <undef> when joining a copy.
This way, shrinkToUses() will ignore the instruction that is about to be
deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like.

Fix a misunderstanding in MachineVerifier about <def,undef> operands. The
<undef> flag is valid on def operands where it has the same meaning as <undef>
on a use operand. It only applies to sub-register defines which also read the
full register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 17:23:25 +00:00
Daniel Dunbar
48a36158ec Remove stray empty test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128640 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 17:01:56 +00:00
Bruno Cardoso Lopes
b41aaab5a1 Revert r128632 again, until I figure out what break the tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 15:54:36 +00:00
Richard Osborne
e8f3533323 Add XCore intrinsics for initializing / starting / synchronizing threads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128633 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 15:13:13 +00:00
Bruno Cardoso Lopes
bcd3a9cd84 Reapply r128585 without generating a lib depedency cycle. An updated log:
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
  {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible.
- Move all instructions which use am2offset without a pattern to use
  addrmode2.
- Add a new encoding bit to describe the index mode used and teach
  printAddrMode2Operand to check by the addressing mode which index
  mode to print.
- Testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128632 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 14:52:28 +00:00
Benjamin Kramer
00e00d693c InstCombine: Fix transform to use the swapped predicate.
Thanks Frits!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128628 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 10:46:03 +00:00
Benjamin Kramer
68b4bd0a63 InstCombine: fold fcmp (fneg x), (fneg y) -> fcmp x, y
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 10:12:22 +00:00
Benjamin Kramer
0db50189dc InstCombine: fold fcmp pred (fneg x), C -> fcmp swap(pred) x, -C
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 10:12:15 +00:00
Benjamin Kramer
b194bdc03b InstCombine: Shrink "fcmp (fpext x), C" to "fcmp x, C" if C can be losslessly converted to the type of x.
Fixes PR9592.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 10:12:07 +00:00
Benjamin Kramer
cd0274ca18 InstCombine: fold fcmp (fpext x), (fpext y) -> fcmp x, y.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128624 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 10:11:58 +00:00
Duncan Sands
021cf96ffc Will not compile without the spec!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 10:03:32 +00:00
Bill Wendling
b38aa9af72 Testcase for r128619 (PR9571).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128620 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 08:13:57 +00:00
Jakob Stoklund Olesen
312babc93f Pick a conservative register class when creating a small live range for remat.
The rematerialized instruction may require a more constrained register class
than the register being spilled. In the test case, the spilled register has been
inflated to the DPR register class, but we are rematerializing a load of the
ssub_0 sub-register which only exists for DPR_VFP2 registers.

The register class is reinflated after spilling, so the conservative choice is
only temporary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128610 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 03:54:44 +00:00
Matt Beaumont-Gay
e4345c9977 Revert "- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and"
This revision introduced a dependency cycle, as nlewycky mentioned by email.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128597 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31 00:39:16 +00:00
Evan Cheng
ee2e0e347e Don't try to create zero-sized stack objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128586 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30 23:44:13 +00:00
Bruno Cardoso Lopes
40829ed6f5 - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and
{STR,LDC}{2}_PRE.
- Fixed the encoding in some places.
- Some of those instructions were using am2offset and now use addrmode2.
Codegen isn't affected, instructions which use SelectAddrMode2Offset were not
touched.
- Teach printAddrMode2Operand to check by the addressing mode which index
mode to print.
- This is a work in progress, more work to come. The idea is to change places
which use am2offset to use addrmode2 instead, as to unify assembly parser.
- Add testcases for assembly parser

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128585 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30 23:32:32 +00:00
Cameron Zwarich
c0e6d780cd Add a ARM-specific SD node for VBSL so that forms with a constant first operand
can be recognized. This fixes <rdar://problem/9183078>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128584 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30 23:01:21 +00:00
Bill Wendling
31d244ead5 * The DSE code that tested for overlapping needed to take into account the fact
that one of the numbers is signed while the other is unsigned. This could lead
  to a wrong result when the signed was promoted to an unsigned int.

* Add the data layout line to the testcase so that it will test the appropriate
  thing.

Patch by David Terei!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30 21:37:19 +00:00
Benjamin Kramer
8398512f89 Avoid turning a floating point division with a constant power of two into a denormal multiplication.
Some platforms may treat denormals as zero, on other platforms multiplication
with a subnormal is slower than dividing by a normal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128555 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30 17:02:54 +00:00
Benjamin Kramer
546739656e InstCombine: If the divisor of an fdiv has an exact inverse, turn it into an fmul.
Fixes PR9587.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30 15:42:35 +00:00
Johnny Chen
caee968481 Add a test case for thumb stc2 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30 01:02:06 +00:00
Evan Cheng
92e3916c3b Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends
was lowering them to sext / uxt + mul instructions. Unfortunately the
optimization passes may hoist the extensions out of the loop and separate them.
When that happens, the long multiplication instructions can be broken into
several scalar instructions, causing significant performance issue.

Note the vmla and vmls intrinsics are not added back. Frontend will codegen them
as intrinsics vmull* + add / sub. Also note the isel optimizations for catching
mul + sext / zext are not changed either.

First part of rdar://8832507, rdar://9203134


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 23:06:19 +00:00
Benjamin Kramer
9822b869fc InstCombine: Add a few missing combines for ANDs and ORs of sign bit tests.
On x86 we now compile "if (a < 0 && b < 0)" into
	testl	%edi, %esi
	js	IF.THEN

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128496 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 22:06:41 +00:00
Kevin Enderby
b715ce35d7 Adding a test for "-inf" as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 21:54:10 +00:00
Johnny Chen
e077157e54 Add a test case for MSRi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 21:52:02 +00:00
Cameron Zwarich
3007d3331b Add Neon SINT_TO_FP and UINT_TO_FP lowering from v4i16 to v4f32. Fixes
<rdar://problem/8875309> and <rdar://problem/9057191>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128492 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 21:41:55 +00:00
Kevin Enderby
360d8d7a02 Added support symbolic floating point constants in the MC assembler for Infinity
and Nans with the same strings as GAS supports.  rdar://8673024


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 21:11:52 +00:00
Johnny Chen
5726005e4f Add a thumb test file for printf (iOS 4.3).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 21:09:30 +00:00
Johnny Chen
9eda569a74 A8.6.188 STC, STC2
The STC_OPTION and STC2_OPTION instructions should have their coprocessor option enclosed in {}.

rdar://problem/9200661


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 19:49:38 +00:00
Johnny Chen
4381dd1f21 Rename invalid-VLDMSDB-arm.txt to be invalid-VLDMSDB_UPD-arm.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 19:10:06 +00:00
Johnny Chen
288a4284bb Add and modify some tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 19:08:52 +00:00
Owen Anderson
848b0c39b1 Get rid of the non-writeback versions VLDMDB and VSTMDB, which don't actually exist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128461 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 16:45:53 +00:00
Cameron Zwarich
9827b78b51 Do some simple copy propagation through integer loads and stores when promoting
vector types. This helps a lot with inlined functions when using the ARM soft
float ABI. Fixes <rdar://problem/9184212>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128453 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 05:19:52 +00:00
Rafael Espindola
5d71de6014 Reduce test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 02:18:54 +00:00
Evan Cheng
78fe9ababe Optimizing (zext A + zext B) * C, to (VMULL A, C) + (VMULL B, C) during
isel lowering to fold the zero-extend's and take advantage of no-stall
back to back vmul + vmla:
 vmull q0, d4, d6
 vmlal q0, d5, d6
is faster than
 vaddl q0, d4, d5
 vmovl q1, d6                                                                                                                                                                             
 vmul  q0, q0, q1

This allows us to vmull + vmlal for:
    f = vmull_u8(   vget_high_u8(s), c);
    f = vmlal_u8(f, vget_low_u8(s),  c);

rdar://9197392


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-29 01:56:09 +00:00
Bill Wendling
2d930db24f In some cases, the "fail BB dominator" may be null after the BB was split (and
becomes reachable when before it wasn't). Check to make sure that it's not null
before trying to use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128434 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-28 23:02:18 +00:00
Daniel Dunbar
c6cf43d258 MC: Add support for disabling "temporary label" behavior. Useful for debugging
on Darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128430 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-28 22:49:15 +00:00
Johnny Chen
d560a80925 Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some test cases.
Add comments to ThumbDisassemblerCore.h for recent change made for t2PLD disassembly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128417 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-28 18:41:58 +00:00
Nick Lewycky
675619ca38 Teach the transformation that moves binary operators around selects to preserve
the subclass optional data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-27 19:51:23 +00:00