Commit Graph

73564 Commits

Author SHA1 Message Date
Chandler Carruth
0d390f6366 FileCheck-ize a test, no functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 20:42:06 +00:00
Jordy Rose
2f494b6afc Use subprocess.Popen instead of popen2 to stop a deprecation warning when running lit on OS X
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 17:28:55 +00:00
Duncan Sands
d6b98e8bd8 Remove unused array.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 16:36:24 +00:00
Duncan Sands
ba519f8fc9 Revert previous commit. It seems that whether casting to void
is valid or not depends on which system you build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 13:14:22 +00:00
Duncan Sands
d01cb35804 Supress gcc-4.5 warning about the result not being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 13:06:23 +00:00
Duncan Sands
5470822eb1 Remove unused constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 13:05:02 +00:00
Rafael Espindola
017205d3c1 Use getVNInfoAt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134312 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 07:50:27 +00:00
Jakob Stoklund Olesen
0d3d95662f Consistent diagnostic capitalization and redundant context elimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 07:23:40 +00:00
Jakob Stoklund Olesen
9d812a2805 Better diagnostics when inline asm fails to allocate.
asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 07:17:37 +00:00
Rafael Espindola
a9badd250c Check the VN of the src register at the two copies, not just the
register number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134309 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 05:34:02 +00:00
Eric Christopher
839656120b Be less specific about register allocation ordering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 04:06:41 +00:00
Jakob Stoklund Olesen
d519de0827 Include a source location when complaining about bad inline assembly.
Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.

This enables proper clang diagnostics from the backend:

$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
  __asm__ ("" : "=u" (d));  /* { dg-error "output regs" } */
           ^
1 error generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 03:53:34 +00:00
Andrew Trick
4b02915386 indvars -disable-iv-rewrite: bug fix involving weird geps and related cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134306 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 02:34:25 +00:00
Jakob Stoklund Olesen
1a988004db Use a new strategy for preventing eviction loops in RAGreedy.
Every live range is assigned a cascade number the first time it is
involved in an eviction. As the evictor, it gets a new cascade number.
Every evictee is assigned the same cascade number as the evictor.

Eviction is prohibited if the evictor has a lower assigned cascade
number than the evictee.

This means that assigned cascade numbers are monotonically increasing
with every eviction, yet they are bounded by NextCascade which can only
be incremented by new live ranges. Thus, infinite loops cannot happen,
but eviction cascades can still be triggered by new live ranges as we
want.

Thanks to Andy for explaining this to me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134303 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 01:37:09 +00:00
Evan Cheng
2416b89621 Add getFeatureBits to extract feature bits for a given CPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 00:43:44 +00:00
Eric Christopher
4d59ff95d8 Remove the confusing getDarwinNumber() api and friends.
Part of rdar://9714064


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 00:19:55 +00:00
Cameron Zwarich
c20fb63ebd Take a stab at fixing the llvm-x86_64-linux-checks failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134287 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 23:45:21 +00:00
Eric Christopher
e3997d40de TargetConstant immediates won't be placed into registers so tighten
up the valid constant check earlier.

rdar://9692967


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134286 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 23:04:38 +00:00
Douglas Gregor
6ced1d12dd Add initial *-*-rtems* target, from Joel Sherrill
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 22:41:06 +00:00
Evan Cheng
385e930d55 Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 22:36:09 +00:00
Evan Cheng
ce795dc92f Add MCSubtargetInfo target registry stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134279 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 22:25:04 +00:00
Dan Gohman
71997f303e Teach IVUsers to stop at non-affine expressions unless they are both
outside the loop and reducible.

This more completely hides them from LSR, which isn't usually able to
do anything meaningful with non-affine expressions anyway, and this
consequently hides them from SCEVExpander, which is acutely unprepared
for non-affine expressions.

Replace test/CodeGen/X86/lsr-nonaffine.ll with a new test that tests
the new behavior.

This works around the bug in PR10117 / rdar://problem/9633149, and is
generally an improvement besides.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134268 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 22:05:19 +00:00
Owen Anderson
f1ac465b67 Generalize @llvm.ctlz, @llvm.cttz, and @llvm.ctpop to work on vectors of integers, and fix the one optimization pass that I'm aware of that needs updating for this. At least one current target, ARM NEON, can implement these operations on vectors directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134265 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 21:52:38 +00:00
Eli Friedman
adebeeaaee Calling-convention specifications for illegal types are no-ops. Simplify based on this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 21:33:28 +00:00
Jim Grosbach
a7603982db ARMv7M vs. ARMv7E-M support.
The DSP instructions in the Thumb2 instruction set are an optional extension
in the Cortex-M* archtitecture. When present, the implementation is considered
an "ARMv7E-M implementation," and when not, an "ARMv7-M implementation."

Add a subtarget feature hook for the v7e-m instructions and hook it up. The
cortex-m3 cpu is an example of a v7m implementation, while the cortex-m4 is
a v7e-m implementation.

rdar://9572992



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 21:12:19 +00:00
Evan Cheng
5b1b4489cf Rename TargetSubtarget to TargetSubtargetInfo for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 21:01:15 +00:00
Evan Cheng
94214703d9 - Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 20:45:01 +00:00
Jim Grosbach
eb03c3b228 Fix off-by-one error.
(low two bits always zero, so off by one bit of encoded value).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 19:07:09 +00:00
Evan Cheng
4db3cffe94 Hide the call to InitMCInstrInfo into tblgen generated ctor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 17:57:27 +00:00
Jim Grosbach
efeedceb41 Pseudo-ize t2MOVCC[ri].
t2MOVCC[ri] are just t2MOV[ri] instructions, so properly pseudo-ize them.
The Thumb1 versions, tMOVCC[ri] were only present for use by the size-
reduction pass, so they're no longer necessary at all and can be deleted.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 17:14:11 +00:00
Evan Cheng
4d9af61a48 Eliminate one extra conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134240 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 16:59:30 +00:00
Duncan Sands
ed5bc470aa Disable commit 134216 ("Add 134199 back, but disable the optimization when the second
copy is a kill") to see if it fixes the i386 dragonegg buildbot, which is timing out
because gcc built with dragonegg is going into an infinite loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 12:01:00 +00:00
Francois Pichet
24e11afad2 Another misuse of StringRef. MSVC is very sensitive to that kind of error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134236 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 09:23:41 +00:00
Nick Lewycky
394d1f1948 Fix likely typo, reduce number of instruction name collisions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 06:27:03 +00:00
Rafael Espindola
3f9b9eb57d Fix use after free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134234 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 04:40:50 +00:00
Rafael Espindola
8f1bdac3eb Avoid DenseMap lookup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134231 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 04:15:02 +00:00
Rafael Espindola
fe11caaa73 Fix off by one error. I misunderstood the comment about killedAt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 03:31:29 +00:00
Rafael Espindola
1c8b97cbc0 Check the liveinterval, not the kill flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 02:35:06 +00:00
Jakob Stoklund Olesen
5e9ae090d8 Don't inflate register classes used by inline asm.
The constraints are represented by the register class of the original
virtual register created for the inline asm. If the register class were
included in the operand descriptor, we might be able to do this.

For now, just give up on regclass inflation when inline asm is involved.

No test case, this bug hasn't happened yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 01:24:25 +00:00
Akira Hatanaka
c4f24eb584 Improve Mips back-end's handling of DBG_VALUE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134224 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 01:04:43 +00:00
Dan Gohman
68c0dbc14f Improve constant folding of undef for cmp and select operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134223 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 01:03:43 +00:00
Eric Christopher
5e653c925c Add support for the 'j' immediate constraint. This is conditionalized on
supporting the instruction that the constraint is for 'movw'.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134222 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 01:00:07 +00:00
Dan Gohman
30cb6dda5a Improve constant folding of undef for binary operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134221 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:42:17 +00:00
Eric Christopher
d5dc9eca2b Add support for the ARM 't' register constraint. And another testcase
for the 'x' register constraint.

Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:30:46 +00:00
Evan Cheng
e1bff38386 Switch SubtargetFeatures from std::string to StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134219 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:23:10 +00:00
Eric Christopher
1070f82569 We'll return a null RC by default if we can't match.
Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134217 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:19:27 +00:00
Rafael Espindola
0c13e9471a Add 134199 back, but disable the optimization when the second copy is a kill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134216 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:16:54 +00:00
Eric Christopher
89bd71fc53 Add support for the 'x' constraint.
Part of rdar://9307836 and rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134215 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 00:14:47 +00:00
Bill Wendling
c3882164cb Remove tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134212 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 23:59:38 +00:00
Eric Christopher
09b4467ac5 Capitalize the unsigned part of the initializer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 23:59:16 +00:00