Commit Graph

81803 Commits

Author SHA1 Message Date
Evan Cheng
b52ba49fdb Make the code slightly more palatable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154378 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 03:15:18 +00:00
Andrew Trick
c72e08b4a9 Use std::includes instead of my own implementation.
Jakob's review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 03:12:29 +00:00
Andrew Trick
decb37eb2b Added a TargetRegisterInfo interface for accessing register pressure sets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154375 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 02:25:26 +00:00
Andrew Trick
176194d4ee Added register unit sets to the target description.
This is a new algorithm that finds sets of register units that can be
used to model registers pressure. This handles arbitrary, overlapping
register classes. Each register class is associated with a (small)
list of pressure sets. These are the dimensions of pressure affected
by the register class's liveness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154374 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 02:25:24 +00:00
Andrew Trick
d35ac3c8bc Added register unit weights to the target description.
This is a new algorithm that associates registers with weighted
register units to accuretely model their effect on register
pressure. This handles registers with multiple overlapping
subregisters. It is possible, but almost inconceivable that the
algorithm fails to find an exact solution for a target description. If
an exact solution cannot be found, an inexact, but reasonable solution
will be chosen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154373 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 02:25:21 +00:00
Andrew Trick
aec111a06b Fix header comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154372 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 02:25:18 +00:00
Danil Malyshev
3fd9b84223 Add a constructor for DataRefImpl and remove excess initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154371 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 01:54:44 +00:00
Evan Cheng
bf010eb911 Fix a long standing tail call optimization bug. When a libcall is emitted
legalizer always use the DAG entry node. This is wrong when the libcall is
emitted as a tail call since it effectively folds the return node. If
the return node's input chain is not the entry (i.e. call, load, or store)
use that as the tail call input chain.

PR12419
rdar://9770785
rdar://11195178


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154370 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 01:51:00 +00:00
Rafael Espindola
fdb230a154 Don't try to zExt just to check if an integer constant is zero, it might
not fit in a i64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154364 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 00:16:22 +00:00
Jim Grosbach
2d620c571c ARM LDR/LDRT has the same encoding collision as STR/STRT.
Generalized logic of r154141.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154362 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-10 00:13:07 +00:00
Lang Hames
23f369d1fe Test case for PR12495.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154359 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 23:58:59 +00:00
Bill Wendling
64fae7587a Revert the 'EnableInitializing' flag. There is debate on whether we should run that pass by default in LTO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154356 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 23:16:51 +00:00
Bill Wendling
64d5b282c9 Apply the scope restrictions after parsing the command line options. There may be some which are used in that function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154348 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 22:18:01 +00:00
Akira Hatanaka
787c3fd385 Have TargetLowering::getPICJumpTableRelocBase return a node that points to the
GOT if jump table uses 64-bit gp-relative relocation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 20:32:12 +00:00
Chad Rosier
7f35455708 When performing a truncating store, it's possible to rearrange the data
in-register, such that we can use a single vector store rather then a 
series of scalar stores.

For func_4_8 the generated code

	vldr	d16, LCPI0_0
	vmov	d17, r0, r1
	vadd.i16	d16, d17, d16
	vmov.u16	r0, d16[3]
	strb	r0, [r2, #3]
	vmov.u16	r0, d16[2]
	strb	r0, [r2, #2]
	vmov.u16	r0, d16[1]
	strb	r0, [r2, #1]
	vmov.u16	r0, d16[0]
	strb	r0, [r2]
	bx	lr

becomes

	vldr	d16, LCPI0_0
	vmov	d17, r0, r1
	vadd.i16	d16, d17, d16
	vuzp.8	d16, d17
	vst1.32	{d16[0]}, [r2, :32]
	bx	lr

I'm not fond of how this combine pessimizes 2012-03-13-DAGCombineBug.ll,
but I couldn't think of a way to judiciously apply this combine.

This

	ldrh	r0, [r0, #4]
	strh	r0, [r1]

becomes

	vldr	d16, [r0]
	vmov.u16	r0, d16[2]
	vmov.32	d16[0], r0
	vuzp.16	d16, d17
	vst1.32	{d16[0]}, [r1, :32]

PR11158
rdar://10703339


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 20:32:02 +00:00
Lang Hames
f31ceaf8b7 Patch r153892 for PR11861 apparently broke an external project (see PR12493).
This patch restores TwoAddressInstructionPass's pre-r153892 behaviour when
rescheduling instructions in TryInstructionTransform. Hopefully this will fix
PR12493. To refix PR11861, lowering of INSERT_SUBREGS is deferred until after
the copy that unties the operands is emitted (this seems to be a more
appropriate fix for that issue anyway).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154338 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 20:17:30 +00:00
Chad Rosier
96b66d65c2 Update comments and remove unnecessary isVolatile() check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 19:38:15 +00:00
Eric Christopher
31ba59afad Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 17:54:34 +00:00
David Blaikie
6bb5212b6e Fix accidentally constant conditions found by uncommitted improvements to -Wconstant-conversion.
A couple of cases where we were accidentally creating constant conditions by
something like "x == a || b" instead of "x == a || x == b". In one case a
conditional & then unreachable was used - I transformed this into a direct
assert instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 16:29:35 +00:00
Rafael Espindola
decbc43f72 Pattern match a setcc of boolean value with 0 as a truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 16:06:03 +00:00
Preston Gurd
f08c7abd15 This patch adds X86 instruction itineraries, which were missed by the
original patch to add itineraries, to X86InstrArithmetc.td.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 15:32:22 +00:00
Duncan Sands
92fc76c901 Clarify that fpaccuracy metadata is giving the compiler permission to use a
less accurate method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 14:08:00 +00:00
Nadav Rotem
e80aa7c783 Lower some x86 shuffle sequences to the vblend family of instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154313 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 08:33:21 +00:00
Bill Wendling
a3706d6754 s/lto_codegen_whole_program_optimization/lto_codegen_set_whole_program_optimization/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 08:32:21 +00:00
Nadav Rotem
154819dd6f Fix a bug in the lowering of broadcasts: ConstantPools need to use the target pointer type.
Move NormalizeVectorShuffle and LowerVectorBroadcast into X86TargetLowering.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154310 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 07:45:58 +00:00
Craig Topper
f920423ffc Remove unnecessary type check when combining and/or/xor of swizzles. Move some checks to allow better early out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 07:19:09 +00:00
Craig Topper
b7135e5838 Remove unnecessary 'else' on an 'if' that always returns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 05:59:53 +00:00
Craig Topper
4b206bdfd0 Optimize code slightly. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 05:55:33 +00:00
Bill Wendling
3029a0c56a Add a hook to turn on the internalize pass through the LTO interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 05:26:48 +00:00
Craig Topper
ae1bec52f7 Replace some explicit checks with asserts for conditions that should never happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154305 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 05:16:56 +00:00
Chandler Carruth
ab5a55e118 Cleanup and relax a restriction on the matching of global offsets into
x86 addressing modes. This allows PIE-based TLS offsets to fit directly
into an addressing mode immediate offset, which is the last remaining
code quality issue from PR12380. With this patch, that PR is completely
fixed.

To understand why this patch is correct to match these offsets into
addressing mode immediates, break it down by cases:
1) 32-bit is trivially correct, and unmodified here.
2) 64-bit non-small mode is unchanged and never matches.
3) 64-bit small PIC code which is RIP-relative is handled specially in
   the match to try to fit RIP into the base register. If it fails, it
   now early exits. This behavior is unchanged by the patch.
4) 64-bit small non-PIC code which is not RIP-relative continues to work
   as it did before. The reason these immediates are safe is because the
   ABI ensures they fit in small mode. This behavior is unchanged.
5) 64-bit small PIC code which is *not* using RIP-relative addressing.
   This is the only case changed by the patch, and the primary place you
   see it is in TLS, either the win64 section offset TLS or Linux
   local-exec TLS model in a PIC compilation. Here the ABI again ensures
   that the immediates fit because we are in small mode, and any other
   operations required due to the PIC relocation model have been handled
   externally to the Wrapper node (extra loads etc are made around the
   wrapper node in ISelLowering).

I've tested this as much as I can comparing it with GCC's output, and
everything appears safe. I discussed this with Anton and it made sense
to him at least at face value. That said, if there are issues with PIC
code after this patch, yell and we can revert it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 02:13:06 +00:00
Chandler Carruth
6916a2375a Fold 15 tiny test cases into a single file that implements the
comprehensive testing of TLS codegen for x86. Convert all of the ones
that were still using grep to use FileCheck. Remove some redundancies
between them.

Perhaps most interestingly expand the test cases so that they actually
fully list the instruction snippet being tested. TLS operations are
*very* narrowly defined, and so these seem reasonably stable. More
importantly, the existing test cases already were crazy fine grained,
expecting specific registers to be allocated. This just clarifies that
no *other* instructions are expected, and fills in some crucial gaps
that weren't being tested at all.

This will make any subsequent changes to TLS much more clear during
review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154303 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-09 01:43:17 +00:00
Craig Topper
10612dc15f Optimize code a bit. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 23:15:04 +00:00
Benjamin Kramer
c47bc33218 Silence sign-compare warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154297 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 19:04:45 +00:00
Duncan Sands
3ef3fcfc04 Only have codegen turn fdiv by a constant into fmul by the reciprocal
when -ffast-math, i.e. don't just always do it if the reciprocal can
be formed exactly.  There is already an IR level transform that does
that, and it does it more carefully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154296 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 18:08:12 +00:00
Craig Topper
f873dde502 Simplify code that tries to do vector extracts for shuffles when the mask width and the input vector widths don't match. No need to check the min and max are in range before calculating the start index. The range check after having the start index is sufficient. Also no need to check for an extract from the beginning differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 17:53:33 +00:00
Chandler Carruth
253933ee9e Teach LLVM about a PIE option which, when enabled on top of PIC, makes
optimizations which are valid for position independent code being linked
into a single executable, but not for such code being linked into
a shared library.

I discussed the design of this with Eric Christopher, and the decision
was to support an optional bit rather than a completely separate
relocation model. Fundamentally, this is still PIC relocation, its just
that certain optimizations are only valid under a PIC relocation model
when the resulting code won't be in a shared library. The simplest path
to here is to expose a single bit option in the TargetOptions. If folks
have different/better designs, I'm all ears. =]

I've included the first optimization based upon this: changing TLS
models to the *Exec models when PIE is enabled. This is the LLVM
component of PR12380 and is all of the hard work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154294 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 17:51:45 +00:00
Chandler Carruth
34797136cb Move the TLSModel information into the TargetMachine rather than hiding
in TargetLowering. There was already a FIXME about this location being
odd. The interface is simplified as a consequence. This will also make
it easier to change TLS models when compiling with PIE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 17:20:55 +00:00
Benjamin Kramer
0f55449246 EngineBuilder::create is expected to take ownership of the TargetMachine passed to it. Delete it on error or when we create an interpreter that doesn't need it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 14:53:14 +00:00
Chandler Carruth
5e93a76722 Remove an over zealous assert. The assert was trying to catch places
where a chain outside of the loop block-set ended up in the worklist for
scheduling as part of the contiguous loop. However, asserting the first
block in the chain is in the loop-set isn't a valid check -- we may be
forced to drag a chain into the worklist due to one block in the chain
being part of the loop even though the first block is *not* in the loop.
This occurs when we have been forced to form a chain early due to
un-analyzable branches.

No test case here as I have no idea how to even begin reducing one, and
it will be hopelessly fragile. We have to somehow end up with a loop
header of an inner loop which is a successor of a basic block with an
unanalyzable pair of branch instructions. Ow. Self-host triggers it so
it is unlikely it will regress.

This at least gets block placement back to passing selfhost and the test
suite. There are still a lot of slowdown that I don't like coming out of
block placement, although there are now also a lot of speedups. =[ I'm
seeing swings in both directions up to 10%. I'm going to try to find
time to dig into this and see if we can turn this on for 3.1 as it does
a really good job of cleaning up after some loops that degraded with the
inliner changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 14:37:02 +00:00
Chandler Carruth
6313d941d2 Add a debug-only 'dump' method to the BlockChain structure to ease
debugging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154286 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 14:37:01 +00:00
Chandler Carruth
2450eca960 Teach InstCombine to nuke a common alloca pattern -- an alloca which has
GEPs, bit casts, and stores reaching it but no other instructions. These
often show up during the iterative processing of the inliner, SROA, and
DCE. Once we hit this point, we can completely remove the alloca. These
were actually showing up in the final, fully optimized code in a bunch
of inliner tests I've been working on, and notably they show up after
LLVM finishes optimizing away all function calls involved in
hash_combine(a, b).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154285 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 14:36:56 +00:00
Nadav Rotem
9d68b06bc5 AVX2: Build splat vectors by broadcasting a scalar from the constant pool.
Previously we used three instructions to broadcast an immediate value into a
vector register.
On Sandybridge we continue to load the broadcasted value from the constant pool.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154284 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 12:54:54 +00:00
Bill Wendling
864737cc51 Remove old 'grep' lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154283 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 11:53:54 +00:00
Bill Wendling
084cd7fa68 Formatting changes. Don't put spaces in front of some code, which only makes it look 'off'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154282 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 11:52:52 +00:00
Bill Wendling
a0126afec8 FileCheckize these testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 11:00:38 +00:00
Bill Wendling
69b2c71abb Remove the 'Parent' pointer from the MDNodeOperand class.
An MDNode has a list of MDNodeOperands allocated directly after it as part of
its allocation. Therefore, the Parent of the MDNodeOperands can be found by
walking back through the operands to the beginning of that list. Mark the first
operand's value pointer as being the 'first' operand so that we know where the
beginning of said list is.

This saves a *lot* of space during LTO with -O0 -g flags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154280 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 10:20:49 +00:00
Bill Wendling
5252c432dd Allow subclasses of the ValueHandleBase to store information as part of the
value pointer by making the value pointer into a pointer-int pair with 2 bits
available for flags.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154279 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-08 10:16:43 +00:00
Craig Topper
b45c969959 Turn avx2 vinserti128 intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove patterns for selecting the intrinsic. Similar was already done for avx1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154272 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-07 22:32:29 +00:00
Craig Topper
f16ffb1259 Move vinsertf128 patterns near the instruction definitions. Add AddedComplexity to AVX2 vextracti128 patterns to give them priority over the integer versions of vextractf128 patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154268 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-07 21:57:43 +00:00