Evan Cheng
bdf7b5da47
80 col. violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55341 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 21:58:43 +00:00
Evan Cheng
ab6c3bb44d
Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55338 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 21:27:18 +00:00
Bill Wendling
cb3c51a4ae
Nevermind. This broke the bootstrap (?!).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55318 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 18:32:39 +00:00
Bill Wendling
51e05e7a99
MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of these
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instructions on having SSE2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55317 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 18:20:52 +00:00
Evan Cheng
e7321441ac
Fix asm printing of MOVSDto64mr and MOV64toSDrm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55300 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-25 04:11:42 +00:00
Bill Wendling
59b63e4a18
Temporarily reverting r55292. It's causing a bootstraping failure:
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/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55295 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 21:45:30 +00:00
Evan Cheng
32c727cd95
Move callseq_start above the call address load to allow load to be folded into the call node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55292 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 19:19:55 +00:00
Cedric Venet
d85f51abd4
Use additionnal include directory instead of ../ in #include.
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Suggested by aKor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55282 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-24 12:30:46 +00:00
Anton Korobeynikov
017c260944
Provide a 64 bit variant of mmx.maskmovq intrinsic lowering.
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Is there way to avoid explicit target check?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55238 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 15:53:19 +00:00
Dan Gohman
f350b277f3
Move the point at which FastISel taps into the SelectionDAGISel
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process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.
Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.
To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 02:25:05 +00:00
Bill Wendling
449416deb6
Reverting r55190, r55191, and r55192. They broke the build with this error message:
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{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 20:51:05 +00:00
Dan Gohman
b4ae2da7e4
Anyext tweaks for x86. When extloading a value to i32 or i64, choose
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instructions that define the full 32 or 64-bit value. When anyexting
from i8 to i16 or i32, it's not necessary to zero out the high
portion of the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55190 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 19:19:31 +00:00
Dan Gohman
22bb31103d
Factor out the predicate check code from DAGISelEmitter.cpp
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and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 00:20:26 +00:00
Bill Wendling
ae0218c914
If part of the mask is "undef", then ignore it as we don't care what goes into it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55147 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 22:36:36 +00:00
Bill Wendling
e85dc49e13
Fix whitespace. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55146 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 22:35:37 +00:00
Evan Cheng
1887c1c2f9
Fix a number of byval / memcpy / memset related codegen issues.
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1. x86-64 byval alignment should be max of 8 and alignment of type. Previously the code was not doing what the commit message was saying.
2. Do not use byte repeat move and store operations. These are slow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55139 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 21:00:15 +00:00
Mon P Wang
7e66510a2e
Treat floating point ST1 the same as ST0 when lowering for a call result
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55135 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 19:54:16 +00:00
Anton Korobeynikov
62990bafa3
Allow inline asm nodes with empty bodies inside JIT.
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This unbreaks explicit reg vars inside JIT, which are
implemented in such hacky way :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 17:33:01 +00:00
Dan Gohman
ad3460c3c9
Simplify SelectRoot's interface, and factor out some common code
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from all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55124 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 16:36:34 +00:00
Bill Wendling
3b32a23a90
Clean up whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55117 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 08:38:54 +00:00
Owen Anderson
cb37188323
Use raw_ostream throughout the AsmPrinter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21 00:14:44 +00:00
Dan Gohman
0bfa1bfbff
Move the handling of ANY_EXTEND, SIGN_EXTEND_INREG, and TRUNCATE
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out of X86ISelDAGToDAG.cpp C++ code and into tablegen code.
Among other things, using tablegen for these things makes them
friendlier to FastISel.
Tablegen can handle the case of i8 subregs on x86-32, but currently
the C++ code for that case uses MVT::Flag in a tricky way, and it
happens to schedule better in some cases. So for now, leave the
C++ code in place to handle the i8 case on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55078 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:27:32 +00:00
Dan Gohman
bb466331e7
Simplify FastISel's constructor argument list, make the FastISel
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class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:05:57 +00:00
Dan Gohman
67ca6be16a
Tablegen generated code already tests the opcode value, so it's not
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necessary to use dyn_cast in these predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55055 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 15:24:22 +00:00
Dan Gohman
1e684cf1ef
Fix comment spacing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55047 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 13:46:21 +00:00
Dale Johannesen
a99e38495f
Add remaining 64-bit atomic patterns for x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:48:50 +00:00
Bill Wendling
5bf1b4eacd
Revert r55018 and apply the correct "fix" for the 64-bit sub_and_fetch atomic.
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Just expand it like the other X-bit sub_and_fetches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55023 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:28:16 +00:00
Bill Wendling
108ecf3975
Add support for the __sync_sub_and_fetch atomics and friends for X86. The code
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was already present, but not hooked up to anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55018 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 23:09:18 +00:00
Dan Gohman
1adf1b03af
Instantiate FastISel for X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55011 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 21:45:35 +00:00
Dan Gohman
d9f3c480a7
The X86 target will soon have an implementation of createFastISel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55010 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 21:32:53 +00:00
Dale Johannesen
140be2dfb7
Add support for 8 and 16 bit forms of __sync
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builtins on X86.
Change "lock" instructions to be on a separate line.
This is needed to work around a bug in the Darwin
assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54999 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 18:47:28 +00:00
Chris Lattner
fa7e17d379
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54964 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 00:41:02 +00:00
Chris Lattner
cd7ab05c37
remove empty file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54950 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-18 21:27:19 +00:00
Evan Cheng
0ac3fc2a61
Fix a (u)comiss intrinsic lowering bug. It was using anyext which can return junk in higher bits. Patch by Nate Begeman.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54903 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 19:22:34 +00:00
Cedric Venet
94fb5f2a70
Make it compile on VC2005:
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- update VC projects.
- Add an overload to llvm::Stream for <<, since std::hex and std::dec have type std::ios_base& (*)(std::ios_base&) in VC++. (templating the function don't work, due to ambiguities)
- add ../ on several include in X86/AsmPrinter/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54898 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 18:24:26 +00:00
Anton Korobeynikov
3c3bc48d33
Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54886 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 13:53:59 +00:00
Anton Korobeynikov
d97f29531c
Use correct name for TLS address resolution routine on x86-64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54845 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16 12:58:29 +00:00
Anton Korobeynikov
d0c1e29aec
Reduce heap trashing due to std::string construction / concatenation via caching of section flags string representations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54842 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-16 12:57:07 +00:00
Dan Gohman
172f0fa16b
Build the X86GenFastISel.inc file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54806 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 23:18:11 +00:00
Dan Gohman
ef521f14b7
Also avoid pinsrw and pinsrb with a variable insertelement index.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54803 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 22:53:18 +00:00
Owen Anderson
44eb65cf58
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 22:49:33 +00:00
Dan Gohman
c0573b13a1
Don't try to use the insertps instruction for vector
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element inserts with non-constant indices. This fixes
CodeGen/X86/vector-variable-idx.ll on machines that
have SSE4.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54801 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 22:43:26 +00:00
Owen Anderson
eaa009d963
Remove more uses of std::set.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54787 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-14 21:01:00 +00:00
Dan Gohman
ea9587bf41
Oops, check in these files too, for the FastISel -> Fast rename.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54750 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-13 19:55:00 +00:00
Dale Johannesen
6f83be0c61
When resolving a stub in x86-64 JIT, use a PC-relative branch
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rather than the absolute address if the target is within range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54708 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 23:20:24 +00:00
Dale Johannesen
5f777192a0
Make x86-64 JIT changes Darwin-specific.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 21:02:08 +00:00
Dale Johannesen
ec867a22b3
In the absence of a linker to build the GOT, use the 32-bit
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non_lazy_ptr mechanism on x86-64 Darwin JIT. Fixes a bunch
of last night's failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54692 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-12 18:23:48 +00:00
Dale Johannesen
50dd1d0280
Some fixes for x86-64 JIT. Make it use small code
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model, except for external calls; this makes
addressing modes PC-relative. Incomplete.
The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54656 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-11 23:46:25 +00:00
Dan Gohman
d9ced09299
Add an EXTRACTPSmr pattern to match the pattern that
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X86ISelLowering creates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54544 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:30:21 +00:00
Anton Korobeynikov
16b7f5101b
Generalize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 18:25:52 +00:00