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14281 Commits

Author SHA1 Message Date
Jim Grosbach
aba8015cc3 Thumb2 assembly parsing and encoding for RRX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139831 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 19:52:43 +00:00
Jim Grosbach
5260be1f2d Thumb2 assembly parsing and encoding for ROR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139830 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 19:50:04 +00:00
Jim Grosbach
689b86ed2e Thumb2 assembly parsing and encoding for REV16/REVSH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139828 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 19:46:13 +00:00
Jakob Stoklund Olesen
01afdb3a45 VirtRegMap is counting spill slots, not register spills. 
Fix the stats counters to reflect that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139819 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:31:13 +00:00
Bruno Cardoso Lopes
0c4b9ff077 Change all checks regarding the presence of any SSE level to always 
take into consideration the presence of AVX. This change, together with
the SSEDomainFix enabled for AVX, makes AVX codegen to always (hopefully)
emit the same code as SSE for 128-bit vector ops. I don't
have a testcase for this, but AVX now beats SSE in performance for
128-bit ops in the majority of programas in the llvm testsuite

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139817 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:27:36 +00:00
Jim Grosbach
1b69a128d6 Thumb2 assembly parsing and encoding for REV. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139813 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:13:30 +00:00
Jim Grosbach
4bab3c7710 Thumb2 assembly parsing and encoding for RBIT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139811 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:07:14 +00:00
Jim Grosbach
3e3a9c7964 Thumb2 assembly parsing and encoding for signed saturating arithmetic insns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139810 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 18:06:15 +00:00
Jim Grosbach
07d7f3d387 Re-order test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139795 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 16:04:13 +00:00
Eli Friedman
c82751dd67 Make demanded-elt simplification for shufflevector slightly stronger. Spotted by inspection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139768 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 01:14:29 +00:00
Andrew Trick
b1afbac64b [regcoalescing] bug fix for RegistersDefinedFromSameValue. 
An improper SlotIndex->VNInfo lookup was leading to unsafe copy removal.
Fixes PR10920 401.bzip2 miscompile with no IV rewrite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139765 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-15 01:09:33 +00:00
Jim Grosbach
f18544d1e5 Thumb2 assembly parsing and encoding for PLI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139757 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 23:29:05 +00:00
Jim Grosbach
f83e297cd1 Thumb2 assembly parsing and encoding for PLD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139756 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 23:26:12 +00:00
Jim Grosbach
0b69247b10 Thumb2 assembly parsing and encoding for PKH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139754 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 23:16:41 +00:00
Owen Anderson
8adf62034a Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 22:46:14 +00:00
Jim Grosbach
0b3ed6de80 Thumb2 assembly parsing and encoding for ORR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139742 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:43:57 +00:00
Jim Grosbach
b72504b4fa Thumb2 assembly parsing and encoding for ORN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139741 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:29:54 +00:00
Jim Grosbach
5c5eca3534 Thumb2 assembly parsing and encoding for NOP.W. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139740 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:26:25 +00:00
Jim Grosbach
d32872f9ca Thumb2 assembly parsing and encoding for MVN. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:24:41 +00:00
Jim Grosbach
64944f48a1 Thumb2 assembly parsing and encoding for MUL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139735 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 21:00:40 +00:00
Jim Grosbach
bf841cf336 Thumb2 assembly parsing and encoding for MSR/MRS. 
Fix a bug in handling default flags for both ARM and Thumb encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139721 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 20:03:46 +00:00
Jim Grosbach
97f50f3870 Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139717 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 19:28:49 +00:00
Jim Grosbach
95be01a569 Thumb2 assembly parsing and encoding for MOVT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139715 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 19:15:15 +00:00
Jim Grosbach
c2d3164ab4 Thumb2 assembly parsing for MOV in IT block. 
Select the right 16 vs. 32 bit encoding in an IT block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139714 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 19:12:11 +00:00
Dan Gohman
211048286b objc_retainBlock is not NoModRef because it can update forwarding pointers 
in memory relevant to the optimizer. rdar://10050579.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139708 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 18:13:00 +00:00
Jim Grosbach
d0588e2a2e ARM fix assembly parser handling of ranges in register lists. 
Clean up register list handling in general a bit to explicitly check things
like all the registers being from the same register class.

rdar://8883573


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 18:08:35 +00:00
Nadav Rotem
436fe8498a Add integer promotion support for vselect 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139692 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 14:42:15 +00:00
Craig Topper
a08e255e1e Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139691 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 06:41:26 +00:00
Craig Topper
3bb43a829e Make disassembling of VBLEND* print immediate as a XMM/YMM register name. Fixes PR10917. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139690 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 05:55:28 +00:00
Craig Topper
6a9795a457 Add test case for PR10851. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139689 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 04:36:54 +00:00
Bruno Cardoso Lopes
5ca0d14915 Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should yield "movsd", not "movss". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139686 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 02:36:14 +00:00
Devang Patel
d2aaaf3a75 Remove ancient debug info constructs from test cases, they are not relevant to test case's main objective. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139675 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 00:29:50 +00:00
Devang Patel
64789c582c Remove unnecessary old test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139674 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-14 00:28:54 +00:00
Devang Patel
f2e6d33125 Update tests. Remove irrelevant tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139658 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 23:07:41 +00:00
Akira Hatanaka
8395c91d56 Delete test cases that generate code for allegrex/psp and cannot be repurposed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139652 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 22:29:13 +00:00
Owen Anderson
13b8d1e396 Make use of Eli's FileCheck sorcery to improve this test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139645 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 21:37:50 +00:00
Eli Friedman
fe731214d2 Error out on CodeGen of unaligned load/store. Fix test so it isn't accidentally testing that case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139641 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:50:54 +00:00
Owen Anderson
7782a58b87 Correct disassembly printing of Thumb2 post-incremented LDRD and STRD. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139639 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:46:26 +00:00
Akira Hatanaka
a4b97f327d Add pattern used to match MipsLo, which is needed when the instruction selector 
tries to match a dead MipsLo node (explanation in the link below).

http://article.gmane.org/gmane.comp.compilers.llvm.devel/42757/match=dagcombiner+dead



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139634 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:13:58 +00:00
Akira Hatanaka
302fdecf9d Disable tests which generate code for allegrex or psp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139632 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 20:00:35 +00:00
Nadav Rotem
e1490d1e43 update checked pattern 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139631 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 19:59:18 +00:00
Nadav Rotem
aec5861bb6 Add vselect target support for targets that do not support blend but do support 
xor/and/or (For example SSE2).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139623 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 19:17:42 +00:00
Owen Anderson
b6b7f515e2 Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139610 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 17:59:19 +00:00
Owen Anderson
12c7e90d36 Fix encoding of Thumb2 shifted register operands with RRX shifts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 17:34:32 +00:00
Craig Topper
58bbb81764 Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139588 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 06:54:58 +00:00
Andrew Trick
effb647154 [indvars] Revert r139579 until 401.bzip -arch i386 miscompilation is fixed. PR10920. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139583 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 05:23:49 +00:00
Andrew Trick
dd9d758a31 Disable IV rewriting by default. See PR10916. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139579 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 03:23:21 +00:00
Andrew Trick
603fff3968 Generalize test case to handle multiple indvars modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139578 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 03:17:25 +00:00
Andrew Trick
3c8015aa6c Generalize this test's CHECK statements to handle different indvars modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139577 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 02:46:27 +00:00
Andrew Trick
2e95d76f8c This test only makes sense with -enable-iv-rewrite. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139576 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-13 02:45:26 +00:00