Commit Graph

327 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
ca561ffcf3 Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 17:27:12 +00:00
Jakob Stoklund Olesen
b555609e73 Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
This reverts commit 104654.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 01:21:14 +00:00
Jakob Stoklund Olesen
6a45d681e5 Replace the SubRegSet tablegen class with a less error-prone mechanism.
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 00:28:19 +00:00
Jakob Stoklund Olesen
4fda9670f0 Remove NumberHack entirely.
SubRegIndex instances are now numbered uniquely the same way Register instances
are - in lexicographical order by name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104627 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25 19:49:33 +00:00
Jakob Stoklund Olesen
33276d95ef Switch SubRegSet to using symbolic SubRegIndices
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104571 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 23:03:18 +00:00
Jakob Stoklund Olesen
09bc029865 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
structure that represents a mapping without any dependencies on SubRegIndex
numbering.

This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 21:46:58 +00:00
Jakob Stoklund Olesen
59f7199e16 SubRegIndex'ize MSP430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-24 17:42:55 +00:00
Evan Cheng
2457f2c661 Implement @llvm.returnaddress. rdar://8015977.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 01:47:14 +00:00
Evan Cheng
211ffa1351 Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104147 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 20:19:50 +00:00
Duncan Sands
16d8f8bd91 I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 20:16:09 +00:00
Dan Gohman
ff7a562751 Implement a bunch more TargetSelectionDAGInfo infrastructure.
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11 17:31:57 +00:00
Dan Gohman
34dcc6fadc Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
doesn't have to guess.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 20:33:48 +00:00
Evan Cheng
746ad69e08 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 19:06:44 +00:00
Anton Korobeynikov
1b17614a72 Do folding for indirect branches, where possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102836 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 12:28:21 +00:00
Anton Korobeynikov
69d5b48bc3 Implement indirect branches on MSP430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102835 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 12:04:32 +00:00
Anton Korobeynikov
650a8e49f9 Long branch target oparands are not pc-rel.
This should fix PR6603.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102834 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 12:04:22 +00:00
Dan Gohman
af1d8ca44a Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 00:01:06 +00:00
Evan Cheng
e566763b19 Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 03:18:23 +00:00
Dan Gohman
d858e90f03 Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 15:26:15 +00:00
Dan Gohman
53c5e42ab9 Add skeleton target-specific SelectionDAGInfo files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-16 23:04:22 +00:00
Dan Gohman
46510a73e9 Add const qualifiers to CodeGen's use of LLVM IR constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-15 01:51:59 +00:00
Chris Lattner
75361b69f3 rename llvm::llvm_report_error -> llvm::report_fatal_error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 22:58:41 +00:00
Dale Johannesen
375be7730a Educate GetInstrSizeInBytes implementations that
DBG_VALUE does not generate code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 19:51:44 +00:00
Chris Lattner
0bcbe0e609 prune some #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 04:04:10 +00:00
Jakob Stoklund Olesen
fddb7667ca Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 03:10:20 +00:00
Chris Lattner
8e680482c1 simplify various getAnalysisUsage implementations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 00:38:44 +00:00
Chris Lattner
b23569aff0 Momentous day: remove the "O" member from AsmPrinter. Now all
"asm printering" happens through MCStreamer.  This also 
Streamerizes PIC16 debug info, which escaped my attention.

This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100327 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 08:18:47 +00:00
Chris Lattner
9d7efd3081 mcize a bunch more stuff, using EmitRawText for things we
don't have mcstreamer support for yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100319 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 07:05:53 +00:00
Chris Lattner
c75c028a15 fix PrintAsmOperand and PrintAsmMemoryOperand to pass down
raw_ostream to print to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:29:35 +00:00
Chris Lattner
d374087be5 fix an ugly wart in the MCInstPrinter api where the
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100307 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 05:04:31 +00:00
Chris Lattner
35c33bd772 change a ton of code to not implicitly use the "O" raw_ostream
member of AsmPrinter.  Instead, pass it in explicitly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 04:47:45 +00:00
Chris Lattner
c7f3ace20c use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 20:16:16 +00:00
Dale Johannesen
93d6a7e9c2 Teach AnalyzeBranch, RemoveBranch and the branch
folder to be tolerant of debug info following the
branch(es) at the end of a block.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 01:38:09 +00:00
Chris Lattner
9b97a73ded Rip out the 'is temporary' nonsense from the MCContext interface to
create symbols.  It is extremely error prone and a source of a lot
of the remaining integrated assembler bugs on x86-64.

This fixes rdar://7807601.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-30 18:10:53 +00:00
Chris Lattner
1b2eb0e8a6 eliminate the now-unneeded context argument of MBB::getSymbol()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 21:04:28 +00:00
Chris Lattner
11d53c129f rearrange MCContext ownership. Before LLVMTargetMachine created it
and passing off ownership to AsmPrinter.  Now MachineModuleInfo
creates it and owns it by value.  This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code.  This also allows MachineFunction to 
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 20:55:24 +00:00
Jeffrey Yasskin
150ae11976 Fix LLVM build when the user specifies CPPFLAGS on the make command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-12 21:42:14 +00:00
Chris Lattner
d62f1b4168 inline GetGlobalValueSymbol into the rest its callers and
remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98390 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-12 21:19:23 +00:00
Chris Lattner
98cdab53c3 set the temporary bit on MCSymbols correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98124 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10 02:25:11 +00:00
Jim Grosbach
dff4b4c5a7 Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98086 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 21:45:49 +00:00
Anton Korobeynikov
9aff323a07 Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).
This fixes PR6349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97877 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-06 11:41:12 +00:00
Chris Lattner
6b7f39c895 remove 300 lines of code that is now dead in the MSP430 backend
now that isel handles chains more aggressively.  This also
allows us to make isLegalToFold non-virtual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 22:30:08 +00:00
Chris Lattner
d1b7382983 Fix some issues in WalkChainUsers dealing with
CopyToReg/CopyFromReg/INLINEASM.  These are annoying because
they have the same opcode before an after isel.  Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.

With that done, give IsLegalToFold a new flag that causes it to
ignore chains.  This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing.  This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.

I currently #if out the dead code in the X86 backend and MSP 
backend, I'll remove it for real in a follow-on patch.

The testcase changes are:
  test/CodeGen/X86/sse3.ll: we generate better code
  test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was 
      miscompiling this before, we now generate correct code
      Convert it to filecheck while I'm at it.
  test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
      folding to make anton happy. :)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 22:20:06 +00:00
Chris Lattner
7c306da505 Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection.  Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.

Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.

 17 files changed, 114 insertions(+), 430 deletions(-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 06:34:30 +00:00
Dan Gohman
bc9d98b52d The mayHaveSideEffects flag is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-27 23:47:46 +00:00
Anton Korobeynikov
455080ff10 IT turns out that during jumpless setcc lowering eq and ne were swapped.
This fixes PR6348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96734 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 12:28:58 +00:00
Anton Korobeynikov
362dd0bef5 Move TLOF implementations to libCodegen to resolve layering violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 22:37:53 +00:00
Evan Cheng
014bf215c3 Split SelectionDAGISel::IsLegalAndProfitableToFold to
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.

This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 19:41:07 +00:00
David Greene
4d58b64125 Remove an assumption of default arguments. This is in anticipation of a
change to SelectionDAG build APIs.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96234 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:56:22 +00:00
Duncan Sands
b0bc6c361d Uniformize the names of type predicates: rather than having isFloatTy and
isInteger, we now have isFloatTy and isIntegerTy.  Requested by Chris!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96223 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15 16:12:20 +00:00