Commit Graph

22372 Commits

Author SHA1 Message Date
Kevin Qin
16511208f2 [AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199462 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 05:52:35 +00:00
Hao Liu
555f57f67b [AArch64]Fix the problem can't select concat_vectors of two v1i32 types.
Also fix the problem can't select scalar_to_vector from f32 to v2f32/v4f32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199461 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 05:44:46 +00:00
Reid Kleckner
ad60d3c304 Change inalloca rules to make it only apply to the last parameter
This makes things a lot easier, because we can now talk about the
"argument allocation", which allocates all the memory for the call in
one shot.

The only functional change is to the verifier for a feature that hasn't
shipped yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199434 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 22:59:24 +00:00
Owen Anderson
5ee5e0c430 Fix two cases where we could lose fast math flags when optimizing FADD expressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 21:26:02 +00:00
Owen Anderson
5d9450f92f Fix an instance where we would drop fast math flags when performing an fdiv to reciprocal multiply transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199425 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 21:07:52 +00:00
Owen Anderson
da5e148474 Fix a bug in InstCombine where we failed to preserve fast math flags when optimizing an FMUL expression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199424 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 20:59:41 +00:00
Rui Ueyama
6010e5dfee llvm-objdump/COFF: Print DLL name in the export table header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 20:50:34 +00:00
Owen Anderson
a2a8bbb30f Teach InstCombine that (fmul X, -1.0) can be simplified to (fneg X), which LLVM expresses as (fsub -0.0, X).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199420 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 20:36:42 +00:00
Ed Maste
22939fa0a4 llvm-symbolizer: make mangled name heuristic apply to all symbols
PR: http://llvm.org/pr18431
Review: http://llvm-reviews.chandlerc.com/D2552


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199404 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 17:25:12 +00:00
Amara Emerson
fc17ce612f Move the xscale build attribute test to the proper place and remove the old one.
The encoding of build attributes is already tested in CodeGen/ARM/build-attributes-encoding.s


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199393 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 15:11:54 +00:00
Jiangning Liu
43a785be50 For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199369 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 09:16:13 +00:00
Elena Demikhovsky
165f7ac98f AVX-512: fixed a compare pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199366 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 08:45:54 +00:00
Craig Topper
85026d9375 Allow x86 mov instructions to/from memory with absolute address to be encoded and disassembled with a segment override prefix. Fixes PR16962.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 07:36:58 +00:00
Bill Wendling
f847b5bbad Fix typo: : not ;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199359 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 07:08:22 +00:00
Rui Ueyama
fb432acff8 llmv-objdump/COFF: Print export table contents.
This patch adds the capability to dump export table contents. An example
output is this:

  Export Table:
   Ordinal      RVA  Name
         5   0x2008  exportfn1
         6   0x2010  exportfn2

By adding this feature to llvm-objdump, we will be able to use it to check
export table contents in LLD's tests. Currently we are doing binary
comparison in the tests, which is fragile and not readable to humans.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199358 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 07:05:49 +00:00
Rafael Espindola
2cc9ba0125 Convert test to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199355 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 06:31:20 +00:00
Arnold Schwaighofer
8963071a14 BasicAA: We need to check both access sizes when comparing a gep and an
underlying object of unknown size.

Fixes PR18460.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 04:53:18 +00:00
Manman Ren
2666b15908 Report a warning when dropping outdated debug info metadata.
Use DiagnosticInfo to emit the warning.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199346 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 01:51:12 +00:00
Reed Kotler
897473a28d Adjust offsets for max load instruction offsets. This is more pessimistic
than it needs to be by 1 bit but I need to finish some other things so 
that all the boundary cases will work in that situation. constpool.c
in test-suite will fail to assemble under our new internal test-suite sync
without this change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199343 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 00:47:46 +00:00
David Peixotto
a034c96443 Fix parsing of .symver directive on ARM
ARM assembly syntax uses @ for a comment, execpt for the second
parameter of the .symver directive which requires @ as part of the
symbol name. This commit fixes the parsing of this directive by
adding a special case for ARM for this one argumnet.

To make the change we had to move the AllowAtInIdentifier variable
to the MCAsmLexer interface (from AsmLexer) and expose a setter for
the value.  The ELFAsmParser then toggles this value when parsing
the second argument to the .symver directive for a target that
uses @ as a comment symbol


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199339 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 22:40:02 +00:00
Andrea Di Biagio
36280bde58 Update test/CodeGen/X86/vbinop-simplify-bug.ll.
Redirect the output of llc to /dev/null.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 20:16:14 +00:00
Andrea Di Biagio
3cab648f22 [DAGCombiner] Fix a wrong check in method SimplifyVBinOp.
This fixes a regression intruced by r199135.

Revision 199135 tried to simplify part of the logic in method
DAGCombiner::SimplifyVBinOp introducing calls to method BuildVectorSDNode::isConstant().

However, that revision wrongly changed the check performed by method
SimplifyVBinOp to identify dag nodes that can be folded.
Before revision 199135, that method only tried to simplify vector binary operations
if both operands were build_vector of Constant/ConstantFP/Undef only.

After revision 199135, method SimplifyVBinop tried to
simplify also vector binary operations with only one constant operand.

This fixes the problem restoring the old behavior of SimplifyVBinOp.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199328 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 19:51:32 +00:00
Kevin Enderby
96f3b25e8a Update the X86 assembler for .intel_syntax to accept
the | and & bitwise operators.

rdar://15570412


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 19:05:24 +00:00
Rafael Espindola
03f1cb72a4 Make sure we create a new archive by deleting any stale ones first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199319 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 16:56:57 +00:00
Zoran Jovanovic
814c8910f2 LL and SC decoder method fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199316 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 13:17:33 +00:00
Zoran Jovanovic
f5c2d3896b Added support for LWU microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199315 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 13:01:18 +00:00
David Majnemer
f62176f047 WinCOFF: Transform IR expressions featuring __ImageBase into image relative relocations
MSVC on x64 requires that we create image relative symbol
references to refer to RTTI data. Seeing as how there is no way to
explicitly make reference to a given relocation type in LLVM IR, pattern
match expressions of the form &foo - &__ImageBase.

Differential Revision: http://llvm-reviews.chandlerc.com/D2523


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199312 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 09:16:42 +00:00
Renato Golin
f433beee88 Revert 199262 - MCJIT remote still failing on ARM
Disabling remote MCJIT tests on ARM again, as they're still failing when
self-hosting on ARM, despite all my tests. At least now we have more info
on what message it's breaking and what is going on. Investigating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199310 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 09:09:46 +00:00
Renato Golin
fdd4da1f8b Re-disable MCJIT remote tests on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199309 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 09:09:39 +00:00
Andrew Trick
d5a74a754d Fix PR18449: SCEV needs more precise max BECount for multi-exit loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199299 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 06:42:11 +00:00
Jiangning Liu
b6db372c96 For AArch64, lowering sext_inreg and generate optimized code by using SXTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199296 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 05:08:01 +00:00
Hans Wennborg
89fa06ba0f Switch-to-lookup tables: set threshold to 3 cases
There has been an old FIXME to find the right cut-off for when it's worth
analyzing and potentially transforming a switch to a lookup table.

The switches always have two or more cases. I could not measure any speed-up
by transforming a switch with two cases. A switch with three cases gets a nice
speed-up, and I couldn't measure any compile-time regression, so I think this
is the right threshold.

In a Clang self-host, this causes 480 new switches to be transformed,
and reduces the final binary size with 8 KB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 05:00:27 +00:00
Arnold Schwaighofer
e96fec2e43 LoopVectorize: Only strip casts from integer types when replacing symbolic
strides

Fixes PR18480.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199291 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 03:35:46 +00:00
Rafael Espindola
f6cb056e41 Only mark functions as micromips.
The GNU as behavior is a bit different and very strange. It will mark any
label that contains an instruction. We can implement that, but using the
type looks more natural since gas will not mark a function if a .word is
used to output the instructions!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 03:07:12 +00:00
Weiming Zhao
2a0c41756b PR 18466: Fix ARM Pseudo Expansion
When expanding neon pseudo stores, it may miss the implicit uses of sub
regs, which may cause post RA scheduler reorder instructions that
breakes anti dependency.

For example:
  VST1d64QPseudo %R0<kill>, 16, %Q9_Q10, pred:14, pred:%noreg
  will be expanded to
    VST1d64Q %R0<kill>, 16, %D18, pred:14, pred:%noreg;

An instruction that defines %D20 may be scheduled before the store by
mistake.

This patches adds implicit uses for such case. For the example above, it
emits:
  VST1d64Q %R0<kill>, 8, %D18, pred:14, pred:%noreg, %Q9_Q10<imp-use>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199282 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 01:32:12 +00:00
Eric Christopher
cd94a7676a Make sure we emit a relocation to the debug_ranges section in the
presence of CU ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199276 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 00:04:29 +00:00
Eric Christopher
8a1418a242 Add testcase for r199263 forgotten in commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199267 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 22:57:52 +00:00
Tim Northover
196c8e5fbb ARM: correctly determine final tBX_LR in Thumb1 functions
The changes caused by folding an sp-adjustment into a "pop" previously
disrupted the forward search for the final real instruction in a
terminating block. This switches to a backward search (skipping debug
instrs).

This fixes PR18399.

Patch by Zhaoshi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199266 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 22:53:28 +00:00
Tim Northover
4e1247b836 AArch64: don't try to handle [SU]MUL_LOHI nodes
We should set them to expand for now since there are no patterns
dealing with them. Actually, there are no instructions either so I
doubt they'll ever be acceptable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199265 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 22:53:22 +00:00
Renato Golin
b59bdadd34 Re-enable remote MCJIT tests on ARMv7
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199262 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 22:43:49 +00:00
Matt Arsenault
0445dc203b Do pointer cast simplifications on addrspacecast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199254 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 20:00:45 +00:00
Rafael Espindola
abcf5f971a Revert "[AArch64] Added vselect patterns with float and double types"
This reverts commit r199242.

It is causing CodeGen/AArch64/neon-bsl.ll to fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199248 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 19:24:08 +00:00
Matt Arsenault
60ecc44266 Make nocapture analysis work with addrspacecast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199246 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 19:11:52 +00:00
Rafael Espindola
1c3e47c07a Fix a low hanging use of hasRawTextSupport.
This also fixes the placement of the function label comment. It was being
placed next to the mips16 directive instead of next to the label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199245 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 18:57:12 +00:00
Ana Pazos
cba390a29e [AArch64] Added vselect patterns with float and double types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199242 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 18:45:48 +00:00
Zoran Jovanovic
bb34ce84fd Test case micromips-load-effective-address.s renamed to micromips-load-effective-address.ll and moved to test/CodeGen/Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199221 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 16:26:47 +00:00
Nico Rieck
1491ef7dc4 Handle dllexport for global aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199219 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 15:23:25 +00:00
Nico Rieck
38f68c5a2e Decouple dllexport/dllimport from linkage
Representing dllexport/dllimport as distinct linkage types prevents using
these attributes on templates and inline functions.

Instead of introducing further mixed linkage types to include linkonce and
weak ODR, the old import/export linkage types are replaced with a new
separate visibility-like specifier:

  define available_externally dllimport void @f() {}
  @Var = dllexport global i32 1, align 4

Linkage for dllexported globals and functions is now equal to their linkage
without dllexport. Imported globals and functions must be either
declarations with external linkage, or definitions with
AvailableExternallyLinkage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199218 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 15:22:47 +00:00
Elena Demikhovsky
d05a6582da AVX-512: optimized scalar compare patterns
removed AVX512SI format, since it is similar to AVX512BI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199217 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 15:10:08 +00:00
Andrea Di Biagio
527fa8c18c [X86] Fix assertion failure caused by a wrong folding of vector shifts by immediate count.
This fixes a regression intruced by r198113.

Revision r198113 introduced an algorithm that tries to fold a vector shift
by immediate count into a build_vector if the input vector is a known vector
of constants.

However the algorithm only worked under the assumption that the input vector
type and the shift type are exactly the same.

This patch disables the folding of vector shift by immediate count if the
input vector type and the shift value type are not the same.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199213 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 13:17:12 +00:00