Commit Graph

118325 Commits

Author SHA1 Message Date
Daniel Sanders
07ce69ae7d [ADT] Assert that SmallVectorBase::grow_pod() successfully reallocates memory.
Summary:
If malloc/realloc fails then the SmallVector becomes unusable since begin() and
end() will return NULL. This is unlikely to occur but was the cause of recent
bugpoint test failures on my machine.

It is not clear whether not checking for malloc/realloc failure is a deliberate
decision and adding checks has the potential to impact compiler performance.
Therefore, this patch only adds the check to builds with assertions enabled for
the moment.

Reviewers: bkramer

Reviewed By: bkramer

Subscribers: bkramer, llvm-commits

Differential Revision: http://reviews.llvm.org/D9520

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239392 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 09:47:46 +00:00
Denis Protivensky
6f9520411c MergeFunctions: Fix gcc warning in condition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239391 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 09:28:37 +00:00
NAKAMURA Takumi
792f79f4a6 llvm/test/DebugInfo/X86/expressions.ll: %llc_dwarf shouldn't be used with -mtriple, since %llc_dwarf implies the triple.
In this case, use plain "llc".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 08:03:33 +00:00
Keno Fischer
af72cb1b94 Move X86-only test case to appropriate directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239384 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 02:52:47 +00:00
Lang Hames
657c697363 [lli] Make the OptLevel (-O=<char>) option accessible to the lazy JIT.
No test case - this only affects generated code performance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239383 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 02:43:27 +00:00
Keno Fischer
b4863a99c9 [DWARF] Fix a few corner cases in expression emission
Summary: I noticed an object file with `DW_OP_reg4 DW_OP_breg4 0` as a DWARF expression,
which I traced to a missing break (and `++I`) in this code snippet.
While I was at it, I also added support for a few other corner cases
along the same lines that I could think of.

Test Plan: Hand-crafted test case to exercises these cases is included.

Reviewers: echristo, dblaikie, aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239380 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 01:53:59 +00:00
Anna Zaks
cfd8f11d48 [asan] Prevent __attribute__((annotate)) triggering errors on Darwin
The following code triggers a fatal error in the compiler instrumentation
of ASan on Darwin because we place the attribute into llvm.metadata section,
which does not have the proper MachO section name.

void foo() __attribute__((annotate("custom")));
void foo() {;}

This commit reorders the checks so that we skip everything in llvm.metadata
first. It also removes the hard failure in case the section name does not
parse. That check will be done lower in the compilation pipeline anyway.

(Reviewed in http://reviews.llvm.org/D9093.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:58:08 +00:00
Matt Arsenault
d2f17c4e2b Implement computeKnownBits for min/max nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:52:41 +00:00
Matt Arsenault
0f59d850fa R600: Switch to using generic min / max nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239377 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:52:37 +00:00
Matt Arsenault
d99ce2f630 MC: Add target hook to control symbol quoting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239370 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:31:39 +00:00
Arnold Schwaighofer
d386615ed3 Fix unused variable warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239369 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:17:40 +00:00
Jingyue Wu
4e04297ac3 [NVPTX] run SROA after NVPTXFavorNonGenericAddrSpaces
Summary:
This cleans up most allocas NVPTXLowerKernelArgs emits for byval
parameters.

Test Plan: makes bug21465.ll more stronger to verify no redundant local load/store.

Reviewers: eliben, jholewinski

Reviewed By: eliben, jholewinski

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10322

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239368 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:05:56 +00:00
Arnold Schwaighofer
04ed4447ee MergeFunctions: Impose a total order on the replacement of functions
We don't want to replace function A by Function B in one module and Function B
by Function A in another module.

If these functions are marked with linkonce_odr we would end up with a function
stub calling B in one module and a function stub calling A in another module. If
the linker decides to pick these two we will have two stubs calling each other.

rdar://21265586

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239367 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:03:29 +00:00
Reid Kleckner
38a2b24c12 [WinEH] Cache declarations of frame intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 22:43:32 +00:00
Reid Kleckner
dea5078cde [MC] Use unsigned for the Kind bitfield in MCSymbol
Fixes most of the test suite on Windows with clang-cl.

I'm not sure why the test suite was passing with MSVC 2013. Maybe they
changed their behavior and we are emulating their old sign extension
behavior. I think this deserves more investigation, but I want to green
the bot first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239357 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 22:12:44 +00:00
Reid Kleckner
b65591326e Fix clang-cl self-host -Wc++11-narrowing bug
Use unsigned as the underlying storage type of the AMDGPU address space
enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239355 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 21:57:57 +00:00
Ranjeet Singh
1666977cd0 [AArch64] AsmParser should be case insensitive about accepting vector register names.
Differential Revision: http://reviews.llvm.org/D10320


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239353 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 21:32:16 +00:00
Keno Fischer
4332f869bf [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFC
Summary:
This was a longstanding FIXME and is a necessary precursor to cases
where foldOperandImpl may have to create more than one instruction
(e.g. to constrain a register class). This is the split out NFC changes from
D6262.

Reviewers: pete, ributzka, uweigand, mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, ted, llvm-commits

Differential Revision: http://reviews.llvm.org/D10174

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 20:09:58 +00:00
Rafael Espindola
279ef837e8 Fix a regression in .pop_section.
It was calling ChangeSection with the wrong current section, eventually leading
to a crash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239335 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 20:08:55 +00:00
Simon Pilgrim
8176f933d9 [X86][SSE] Added lzcnt vector tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239333 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 19:58:43 +00:00
Akira Hatanaka
f7e74363b8 Include header file <functional>.
This is a follow-up to r239325.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239329 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 19:03:32 +00:00
Benjamin Kramer
9ebaf8ce67 Prefer copy init over direct init. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239327 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:58:57 +00:00
Akira Hatanaka
fa6bc2e94d [ARM] Pass a callback to FunctionPass constructors to enable skipping execution
on a per-function basis.

Previously some of the passes were conditionally added to ARM's pass pipeline
based on the target machine's subtarget. This patch makes changes to add those
passes unconditionally and execute them conditonally based on the predicate
functor passed to the pass constructors. This enables running different sets of
passes for different functions in the module.

rdar://problem/20542263

Differential Revision: http://reviews.llvm.org/D8717


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239325 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:50:43 +00:00
Pete Cooper
d354befbbb Use a PointerUnion in MCSymbol for Section and Fragment. NFC.
The Fragment and Section, and a bool for HasFragment were all used to create
a PointerUnion.  Just use a pointer union instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:41:57 +00:00
Pete Cooper
e2101ba7b5 Remove includes of MCMachOSymbolFlags.h after it was deleted
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239318 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:25:57 +00:00
Pete Cooper
1a8319cbef Make flags get/set method protected so that all flags have to be managed by subclasses.
All of ELF, COFF and MachO now manipulate the flags in helpers so we don't need
anyone to read the flags directly, but instead via those helpers.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239317 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:30 +00:00
Pete Cooper
d3869ee8d2 Move all flags logic to MCSymbolMachO.
Also delete the now unused MCMachOSymbolFlags.h header as the only enum in there was moved to MCSymbolMachO.

Similarly to ELF and COFF, manipulating the flags is now done via helpers instead of spread
throughout the codebase.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239316 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:28 +00:00
Pete Cooper
cae8bc4504 Add MCSymbolMachO which will be used to hide the MCSymbolMachO flags.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:23 +00:00
Pete Cooper
e25e889c7c Move all of the MCSymbol COFF flags logic in to MCSymbolCOFF.
All flags setting/getting is now done in the class with helper methods instead
of users having to get the bits in the correct order.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239314 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:19 +00:00
Pete Cooper
a335f333be Move COFF Type in to the MCSymbolCOFF class.
The flags field in MCSymbol only needs to be 16-bits on ELF and MachO.
This moves the 16-bit Type out of there so that it can be reduced in size in a future commit.

Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239313 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:16 +00:00
Pete Cooper
f560b88d7c Add MCSymbolCOFF class and use it to get and set the COFF type field.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239312 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:12 +00:00
Pete Cooper
62f764a6c9 Change MCSymbol IsELF to an enum to support future MCSymbolCOFF and MCSymbolMachO.
Reviewed by Rafael Espíndola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239311 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 17:17:09 +00:00
Matthias Braun
b0d6c659b7 X86: Reject register operands with obvious type mismatches.
While we have some code to transform specification like {ax} into
{eax}/{rax} if the operand type isn't 16bit, we should reject cases
where there is no sane way to do this, like the i128 type in the
example.

Related to rdar://21042280

Differential Revision: http://reviews.llvm.org/D10260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239309 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:56:23 +00:00
Oliver Stannard
7c40b1a7bc Fix assertion failure in global-merge with unused ConstantExpr
The global-merge pass was crashing because it assumes that all ConstantExprs
(reached via the global variables that they use) have at least one user.

I haven't worked out a way to test this, as an unused ConstantExpr cannot be
represented by serialised IR, and global-merge can only be run in llc, which
does not run any passes which can make a ConstantExpr dead.

This (reduced to the point of silliness) C code triggers this bug when compiled
for arm-none-eabi at -O1:

  static a = 7;
  static volatile b[10] = {&a};

  c;
  main() {
    c = 0;
    for (; c < 10;)
      printf(b[c]);
  }

Differential Revision: http://reviews.llvm.org/D10314



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239308 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:55:31 +00:00
Colin LeMahieu
838271c858 [Hexagon] Adding functionality for searching for compound instruction pairs. Compound instructions reduce slot resource requirements freeing those packet slots up for more instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:34:47 +00:00
Simon Pilgrim
298222a930 [DAGCombiner] Added CTLZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:19:00 +00:00
Sanjay Patel
7b4fbad146 fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239303 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 15:21:38 +00:00
Javed Absar
d48ce2c34f ARM]: Add support for MMFR4_EL1 in assembler
This patch adds support for system register MMFR4_EL1 (memory model feature register) in the assembler.
This register provides information about the implemented memory model and memory management support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 15:01:11 +00:00
Petar Jovanovic
f8aad6c1ef [Mips64][mcjit] Add R_MIPS_PC32 relocation
This patch adds R_MIPS_PC32 relocation for Mips64.

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D10235


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239301 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 14:10:23 +00:00
Igor Breger
17e24879cb AVX-512: Implemented 256/128bit VALIGND/Q instructions for SKX and KNL
Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

Differential Revision: http://reviews.llvm.org/D10310

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 14:03:17 +00:00
Artur Pilipenko
1328b67dd1 Minor refactoring of GEP handling in isDereferenceablePointer
For GEP instructions isDereferenceablePointer checks that all indices are constant and within bounds. Replace this index calculation logic to a call to accumulateConstantOffset. Separated from the http://reviews.llvm.org/D9791

Reviewed By: sanjoy

Differential Revision: http://reviews.llvm.org/D9874


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239299 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 11:58:13 +00:00
Silviu Baranga
a420a14276 [LAA] Fix estimation of number of memchecks
Summary:
We need to add a runtime memcheck for pair of accesses (x,y) where at least one of x and y
are writes.
 
Assuming we have w writes and r reads, currently this number is  estimated as being
w* (w+r-1). This estimation will count (write,write) pairs twice and will overestimate
the number of checks required.

This change adds a getNumberOfChecks method to RuntimePointerCheck, which
will count the number of runtime checks needed (similar in implementation to
needsAnyChecking) and uses it to produce the correct number of runtime checks.

Test Plan:
llvm test suite
spec2k
spec2k6

Performance results: no changes observed (not surprising since the formula for 1 writer is basically the same, which would covers most cases - at least with the current check limit).

Reviewers: anemet

Reviewed By: anemet

Subscribers: mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D10217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 10:27:06 +00:00
Simon Pilgrim
d72b357107 [DAGCombiner] Added CTTZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 09:57:09 +00:00
Hao Liu
43be1d53d1 [LoopVectorize] Teach Loop Vectorizor about interleaved memory accesses.
Interleaved memory accesses are grouped and vectorized into vector load/store and shufflevector.
E.g. for (i = 0; i < N; i+=2) {
       a = A[i];         // load of even element
       b = A[i+1];       // load of odd element
       ...               // operations on a, b, c, d
       A[i] = c;         // store of even element
       A[i+1] = d;       // store of odd element
     }

  The loads of even and odd elements are identified as an interleave load group, which will be transfered into vectorized IRs like:
     %wide.vec = load <8 x i32>, <8 x i32>* %ptr
     %vec.even = shufflevector <8 x i32> %wide.vec, <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
     %vec.odd = shufflevector <8 x i32> %wide.vec, <8 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>

  The stores of even and odd elements are identified as an interleave store group, which will be transfered into vectorized IRs like:
     %interleaved.vec = shufflevector <4 x i32> %vec.even, %vec.odd, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7> 
     store <8 x i32> %interleaved.vec, <8 x i32>* %ptr

This optimization is currently disabled by defaut. To try it by adding '-enable-interleaved-mem-accesses=true'. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 06:39:56 +00:00
Davide Italiano
f57b36041b [llvm-readobj] Use the new symbol API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239286 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 04:55:29 +00:00
Hao Liu
f60ff6bdf6 [LoopAccessAnalysis] Teach LAA to check the memory dependence between strided accesses.
Differential Revision: http://reviews.llvm.org/D9368


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239285 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 04:48:37 +00:00
Peter Collingbourne
965c107356 Do not build LLD from tools/Makefile, as LLD no longer has a Makefile build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239283 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 04:04:13 +00:00
Michael Zolotukhin
3148e98284 Remove SCEVCache and FindConstantPointers from complete loop unrolling heuristic.
Summary:
Using some SCEV functionality helped to entirely remove SCEVCache class and FindConstantPointers SCEV visitor.
Also, this makes the code more universal - I'll take advandate of it in next patches where I start handling additional types of instructions.

Test Plan: Tests would be submitted in subsequent patches.

Reviewers: atrick, chandlerc

Reviewed By: atrick, chandlerc

Subscribers: atrick, llvm-commits

Differential Revision: http://reviews.llvm.org/D10205

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239282 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 03:28:06 +00:00
Peter Collingbourne
3120bcb0de Fix Windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239279 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 02:43:32 +00:00
Peter Collingbourne
ee2e3d0eb9 llvm-ar: Move archive writer to Object.
No functional change intended, other than some minor changes to certain
diagnostics.

Differential Revision: http://reviews.llvm.org/D10296

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239278 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 02:32:01 +00:00