Commit Graph

90051 Commits

Author SHA1 Message Date
Renato Golin
e18bce5317 Allow GlobalValues to vectorize with AliasAnalysis
Storing the load/store instructions with the values
and inspect them using Alias Analysis to make sure
they don't alias, since the GEP pointer operand doesn't
take the offset into account.

Trying hard to not add any extra cost to loads and stores
that don't overlap on global values, AA is *only* calculated
if all of the previous attempts failed.

Using biggest vector register size as the stride for the
vectorization access, as we're being conservative and
the cost model (which calculates the real vectorization
factor) is only run after the legalization phase.

We might re-think this relationship in the future, but
for now, I'd rather be safe than sorry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175818 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 22:39:03 +00:00
Lang Hames
b489e29976 Re-apply r175688, with the changes suggested by Jakob in PR15320.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175809 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 22:16:43 +00:00
Chad Rosier
5e5529c74c Remove dead code and whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175804 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 21:40:51 +00:00
Pedro Artigas
633e24dc04 Clear the whole table including the tombstones, since the tombstone count will
be set to zero that is what it was intended. Should improve performance of 
the data structure when clear is invoked frequently (both compile time and
memory usage).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175799 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 21:32:00 +00:00
Eli Bendersky
700ed80d3d Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
to TargetFrameLowering, where it belongs. Incidentally, this allows us
to delete some duplicated (and slightly different!) code in TRI.

There are potentially other layering problems that can be cleaned up
as a result, or in a similar manner.

The refactoring was OK'd by Anton Korobeynikov on llvmdev.

Note: this touches the target interfaces, so out-of-tree targets may
be affected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175788 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 20:05:00 +00:00
Bill Wendling
fece442c69 Don't assert on empty attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175785 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 19:46:51 +00:00
Anshuman Dasgupta
6585d3b64b Hexagon: Expand cttz, ctlz, and ctpop for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175783 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 19:39:40 +00:00
Jakob Stoklund Olesen
601158a18e Make RAFast::UsedInInstr indexed by register units.
This fixes some problems with too conservative checking where we were
marking all aliases of a register as used, and then also checking all
aliases when allocating a register.

<rdar://problem/13249625>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175782 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 19:35:21 +00:00
Evan Cheng
b300455b58 Radar numbers don't belong in source code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175775 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 18:37:54 +00:00
Bill Schmidt
399eafb580 Trivial cleanup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175771 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 17:26:05 +00:00
Paul Redmond
8f0696c7a7 add missing space which prevented the llvm.loop code-block from appearing in the
generated html.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175769 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 17:20:45 +00:00
Bill Schmidt
53b0b0e754 Large code model support for PowerPC.
Large code model is identical to medium code model except that the
addis/addi sequence for "local" accesses is never used.  All accesses
use the addis/ld sequence.

The coding changes are straightforward; most of the patch is taken up
with creating variants of the medium model tests for large model.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175767 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 17:12:27 +00:00
Lang Hames
f6c80bde65 Revert r175688 - It broke a test case (see PR15320).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175765 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 17:01:59 +00:00
Eli Bendersky
8389f24a66 getX86SubSuperRegister has a special mode with High=true for i64 which
exists solely to enable it to call itself for i8 with some registers.
The proposed patch simplifies the function somewhat to make the High
bit only meaningful for the i8 mode, which makes sense. No functional
difference (getX86SubSuperRegister is not getting called from anywhere
outside with i64 and High=true).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175762 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 16:40:18 +00:00
Benjamin Kramer
f31bd0f7d9 DAGCombiner: Make the post-legalize vector op optimization more aggressive.
A legal BUILD_VECTOR goes in and gets constant folded into another legal
BUILD_VECTOR so we don't lose any legality here. The problematic PPC
optimization that made this check necessary was fixed recently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175759 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:24:35 +00:00
Christian Konig
1484904807 R600/SI: inline V_ADD|SUB_F32 patterns
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175758 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:41 +00:00
Christian Konig
4fb98259b5 R600/SI: replace IMPLICIT_DEF with SIOperand.ZERO
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175757 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:36 +00:00
Christian Konig
1fbb3b3ce5 R600/SI: replace SI_V_CNDLT with a pattern
It actually fixes quite a bunch of piglit tests.

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175756 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:32 +00:00
Christian Konig
664a061f81 R600/SI: use patterns for clamp, fabs, fneg
Instead of using custom inserters, it's simpler and
should make DAG folding easier.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175755 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:27 +00:00
Christian Konig
53f22df199 R600/SI: add all the other missing asm operands v2
v2: put implicit parameters in []

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175754 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:22 +00:00
Christian Konig
ee44118ef7 R600/SI: add the missing M*BUF|IMG asm operands
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175753 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:17 +00:00
Christian Konig
f17d0d6f80 R600/SI: add the missing S_* asm operands
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175752 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:13 +00:00
Christian Konig
b4dc10c8c5 R600/SI: rework VOP3 classes
Order the classes and add asm operands.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175751 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:09 +00:00
Christian Konig
7b3dab2673 R600/SI: simplify VOPC_* pattern v2
Fixing asm operation names.

v2: fix name of the e64 encoding, also add asm operands

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175750 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:17:04 +00:00
Christian Konig
477963aff4 R600/SI: rework VOP2_* pattern v2
Fixing asm operation names.

v2: use ZERO constant, also add asm operands

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175749 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:16:58 +00:00
Christian Konig
a38ccb4b32 R600/SI: rework VOP1_* patterns v2
Fixing asm operation names.

v2: use ZERO constant, also add asm operands

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175748 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:16:53 +00:00
Christian Konig
7fa9957b16 R600/SI: add constant for inline zero operand
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175747 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:16:49 +00:00
Christian Konig
8c0b3a0d31 R600/SI: cleanup SIInstrInfo.td and SIInstrFormat.td
Those two files got mixed up.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175746 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:16:44 +00:00
Tom Stellard
70a9ca9420 R600: Fix for Unigine when MachineSched is enabled
Fixes for-loop.cl piglit test

Patch By: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

NOTE: This is a candidate for the Mesa stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175742 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 15:06:59 +00:00
Bill Schmidt
0514595b9b Code review cleanup for r175697
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175739 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 14:35:42 +00:00
Michel Danzer
74bf7a8467 R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32
NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175733 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 08:57:10 +00:00
Cameron Zwarich
197a60a666 Don't rely on the isDead() MachineOperand flag when updating LiveIntervals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175732 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 08:51:58 +00:00
Cameron Zwarich
a566d63b61 Use getInterval() instead of getOrCreateInterval().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175731 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 08:51:55 +00:00
David Blaikie
485740205b Only include move-related Optional<T> tests when rvalue references are available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175730 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 07:58:45 +00:00
David Blaikie
ea72255f5b Add move ctor/assignment to Optional<T>
Code review feedback for r175580 by Jordan Rose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175729 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 07:55:39 +00:00
Cameron Zwarich
17cec5a685 Make another kill check LiveIntervals-aware.
This brings the number of remaining failures in 'make check' without
LiveVariables down to 39, with 1 unexpectedly passing test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175727 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 07:02:30 +00:00
Cameron Zwarich
3a9805f26e Split part of isKilled() into a separate function for use elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175726 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 07:02:28 +00:00
David Blaikie
7f838bbe45 Correct spelling of 'enumerator'.
Post commit code review feedback to r175705 from Jordan Rose.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175724 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 06:08:22 +00:00
David Blaikie
2bbc19c1c6 Make Optional<T>'s operator bool 'explicit' in C++11
Provides a general way to add 'explicit' for conversion operators (a no-op when
compiling as C++98).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175723 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 06:05:57 +00:00
Cameron Zwarich
214df4285a Update isKilledAt in TwoAddressInstructionPass.cpp to use LiveIntervals when
available.

With this commit there are no longer any assertion or verifier failures when
running 'make check' without LiveVariables. There are still 56 failing tests
with codegen differences and 1 unexpectedly passing test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175719 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 04:33:02 +00:00
Reed Kotler
ffbe432595 Expand the sel pseudo/macro. This generates basic blocks where previously
there were inline br .+4 instructions. Soon everything can enjoy the
full instruction scheduling experience.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175718 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 04:22:38 +00:00
NAKAMURA Takumi
b8ebc9e244 ADT/Optional.h: Appease msvc. It reapplies r175626.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175710 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 02:32:25 +00:00
Michael J. Spencer
561823009b [objdump] Add PT_PHDR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175709 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 02:21:29 +00:00
Jack Carter
77217229ba Mips specific standalone assembler addressing mode %hi and %lo.
The constructs %hi() and %lo() represent the high and low 16 
bits of the address. 
Because the 16 bit offset field of an LW instruction is 
interpreted as signed, if bit 15 of the low part is 1 then the 
low part will act as a negative and 1 needs to be added to the 
high part.

Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175707 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 02:09:31 +00:00
Bill Schmidt
421021157e PPCDAGToDAGISel::PostprocessISelDAG()
This patch implements the PPCDAGToDAGISel::PostprocessISelDAG virtual
method to perform post-selection peephole optimizations on the DAG
representation.

One optimization is implemented here:  folds to clean up complex
addressing expressions for thread-local storage and medium code
model.  It will also be useful for large code model sequences when
those are added later.  I originally thought about doing this on the
MI representation prior to register assignment, but it's difficult to
do effective global dead code elimination at that point.  DCE is
trivial on the DAG representation.

A typical example of a candidate code sequence in assembly:

   addis 3, 2, globalvar@toc@ha
   addi  3, 3, globalvar@toc@l
   lwz   5, 0(3)

When the final instruction is a load or store with an immediate offset
of zero, the offset from the add-immediate can replace the zero,
provided the relocation information is carried along:

   addis 3, 2, globalvar@toc@ha
   lwz   5, globalvar@toc@l(3)

Since the addi can in general have multiple uses, we need to only
delete the instruction when the last use is removed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175697 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 00:38:25 +00:00
David Blaikie
5c43245bf4 Provide a "None" value for convenience when using Optional<T>()
This implementation of NoneType/None does have some holes but I haven't
found one that doesn't - open to improvement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 00:27:28 +00:00
Bill Schmidt
06ab2c828a Relocation enablement for PPC DAG postprocessing pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175693 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-21 00:05:29 +00:00
Chad Rosier
4ffec108a9 Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20 23:57:30 +00:00
Jakob Stoklund Olesen
9bd7c3cc13 Don't allocate memory in LiveInterval::join().
Rewrite value numbers directly in the 'Other' LiveInterval which is
moribund anyway. This avoids allocating the OtherAssignments vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20 23:51:10 +00:00
Lang Hames
100c93c850 Kill of TransferDeadFlag - Dead copies and subreg-to-reg instructions should
just be turned into kills on the spot.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175688 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-20 23:36:57 +00:00