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1c03f2493f
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14385 Commits

Author SHA1 Message Date
Anton Korobeynikov
1c03f2493f Correct itinerary class for VPADD 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100654 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:24 +00:00
Anton Korobeynikov
4ac0af851f VP{MAX, MIN} are of IIC_VSUBi4D itin class as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:18 +00:00
Anton Korobeynikov
f8b5c63617 VHADD differs from VHSUB at least on A9 - the former reads both operands in the second cycle, while the latter reads second operand in first cycle. Introduce new itin classes to catch this behavior. Whether this is true for A8 as well is WIP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:13 +00:00
Anton Korobeynikov
268b7446cf Some easy NEON scheduling goodness for A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100651 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:07 +00:00
Anton Korobeynikov
a31c6fb65e Define new itin classes for ARM <-> VFP reg moves to distinguish from NEON ops. Define proper scheduling itinerary for them on A9. A8 TRM does not specify latency for them at all :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:02 +00:00
Anton Korobeynikov
63401e33cb FCONST{S,D} behaves the same way as FP unary instructions. This is true for both A8 and A9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:56 +00:00
Anton Korobeynikov
bcc02d13bb Proper cycle times for locks, since wbck latency can be larger than fwd latency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:51 +00:00
Anton Korobeynikov
c492e09455 Add new itin classes for FP16 <-> FP32 conversions and make uise of them for A9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100647 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:46 +00:00
Anton Korobeynikov
391b3431e2 Make use of new reserved/required scheduling stuff: introduce VFP and NEON locks to model domain cross stalls precisly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100646 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:40 +00:00
Anton Korobeynikov
2eeeff8371 Some bits of A9 scheduling: VFP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100643 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:18 +00:00
Anton Korobeynikov
035b23a0f4 Separate const from non-const stuff during mergeing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:13 +00:00
Anton Korobeynikov
1e7b324fe5 Some initial version of global merger 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100641 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:07 +00:00
Sanjiv Gupta
d49baefaad Fix memory leaks for external symbol name strings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100601 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 03:36:01 +00:00
John McCall
b1fb4497b0 Clean up some signedness oddities in this code noticed by clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 01:49:15 +00:00
Dale Johannesen
343b42e428 Move printing of target-indepedent DEBUG_VALUE comments 
into AsmPrinter.  Target-dependent form is still generated
by FastISel and still handled in X86 code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 01:15:14 +00:00
John McCall
795ee9dd1e Fix a number of clang -Wsign-compare warnings that didn't have an obvious 
solution.  The only reason these don't fire with gcc-4.2 is that gcc turns off
part of -Wsign-compare in C++ on accident.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100581 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-06 23:35:53 +00:00
Dale Johannesen
49d915bb9a Revert 100573, it's causing some testsuite problems. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100578 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-06 22:45:26 +00:00
Dale Johannesen
0a580d30e0 Move printing of DEBUG_VALUE comments to target-independent place. 
There is probably a more elegant way to do this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100573 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-06 22:21:07 +00:00
Bob Wilson
d0910c4534 Expand SELECT and SELECT_CC for NEON vector types. 
Radar 7770501.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100568 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-06 22:02:24 +00:00
Jim Grosbach
fa85eb6237 Fix PR6696 and PR6663 
When a frame pointer is not otherwise required, and dynamic stack alignment
is necessary solely due to the spilling of a register with larger alignment
requirements than the default stack alignment, the frame pointer can be both
used as a general purpose register and a frame pointer. That goes poorly, for
obvious reasons. This patch brings back a bit of old logic for identifying
the use of such registers and conservatively reserves the frame pointer
during register allocation in such cases.

For now, implement for X86 only since it's 32-bit linux which is hitting this,
and we want a targeted fix for 2.7. As a follow-on, this will be expanded
to handle other targets, as theoretically the problem could arise elsewhere
as well.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100559 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-06 20:26:37 +00:00
Jakob Stoklund Olesen
8ba1c6ab87 Don't try to collapse DomainValues onto an incompatible SSE domain. 
This fixes the Bullet regression on i386/nocona.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100553 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-06 19:48:56 +00:00
Jakob Stoklund Olesen
fc8e1c3635 Properly enable load clustering. 
Operand 2 on a load instruction does not have to be a RegisterSDNode for this to
work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100497 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 23:48:02 +00:00
Evan Cheng
18ac410f4f Fix ADD32rr_alt instruction encoding bug. Patch by Marius Wachtler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100480 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 22:21:09 +00:00
Eric Christopher
b6290a170f Remove FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100466 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 21:14:32 +00:00
Chris Lattner
0333535054 don't use emitlabel in the arm asm printer yet, the order 
isn't well specified.  ARM really needs to have its instprinter
finished at some point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100439 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 17:52:31 +00:00
Chris Lattner
0752cda4de fix a couple problems I introduced handling symbols 
with spaces in them.  Sym->getName()  !=   OS << *Sym




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100434 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 16:32:14 +00:00
Benjamin Kramer
75e818ad2f Disambiguate else. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100423 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 10:17:15 +00:00
Chris Lattner
ed3a8067a6 unthread MMI from FastISel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100416 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 06:05:26 +00:00
Chris Lattner
a267b0076e remove the MMI pointer from MachineFrameInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100415 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 05:57:52 +00:00
Chris Lattner
66f20c8e82 simplify code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 05:48:36 +00:00
Johnny Chen
7fb053dd45 Get rid of traling whitespaces. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 04:51:50 +00:00
Johnny Chen
9d563b676c The disassembler impl. of MCDisassembler::getInstruction() was using the pattern 
uint32_t insn;
  MemoryObject.readBytes(Address, 4, (uint8_t*)&insn, NULL)

to read 4 bytes of memory contents into a 32-bit uint variable.  This leaves the
interpretation of byte order up to the host machine and causes PPC test cases of
arm-tests, neon-tests, and thumb-tests to fail.  Fixed to use a byte array for
reading the memory contents and shift the bytes into place for the 32-bit uint
variable in the ARM case and 16-bit halfword in the Thumb case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100403 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 04:46:17 +00:00
Chris Lattner
d7d44bd5a8 implement EmitFunctionEntryLabel to emit the .cc_top directive, 
allowing xcore to use the normal runOnMachineFunction 
implementation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100402 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 04:44:02 +00:00
Chris Lattner
0bcbe0e609 prune some #includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100399 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 04:04:10 +00:00
Jakob Stoklund Olesen
fddb7667ca Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 03:10:20 +00:00
Chris Lattner
d850ac79b5 fastisel doesn't need DwarfWriter, remove some tendricles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100381 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 02:19:28 +00:00
Evan Cheng
cb86609421 Temporarily remove to disable building of ARM disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 01:57:50 +00:00
Evan Cheng
f6232cf8bb Re-apply 100265 but instead disable building of ARM disassembly for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100379 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 01:34:00 +00:00
Evan Cheng
1b0194d646 Reverting 100265 to try to get buildbots green again. Lots of self-hosting buildbots started complaining since this commit. Also xfail ARM disassembly tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100378 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 01:04:27 +00:00
Chris Lattner
90429c487f just have all targets create the DwarfWriter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100377 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 00:42:55 +00:00
Chris Lattner
8e680482c1 simplify various getAnalysisUsage implementations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100376 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 00:38:44 +00:00
Chris Lattner
3d22513611 eliminate the magic AbsoluteDebugSectionOffsets MAI hook, 
which is really a property of the section being referenced.
Add a predicate to MCSection to replace it.

Yay for reduction in magic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100367 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 23:22:29 +00:00
Chris Lattner
1d20473c9d revert my patch, need to reconsider this and figure out what is really going on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100358 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 21:49:31 +00:00
Chris Lattner
4166047030 fix pasto, this is the wrong setting for arm elf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100357 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 21:37:20 +00:00
Jakob Stoklund Olesen
e0103f03f0 Clean up SSEDomainFix pass. 
Restrict bit mask operations to the DomainValue class. Rename methods for
clarity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100353 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 21:27:26 +00:00
Chris Lattner
d290505f0f don't reset the default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100352 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 21:06:50 +00:00
Chris Lattner
3f53c8398d clean up the asmprinter header and privatize some stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100342 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 18:52:31 +00:00
Chris Lattner
9d1c1ada21 remove TargetMachine.h #include, also, TRI isn't used frequently 
enough to warrant caching in AsmPrinter, so remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100336 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 18:06:11 +00:00
Jakob Stoklund Olesen
bbef815a3b Switch SSEDomainFix to SpecificBumpPtrAllocator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100332 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 18:00:21 +00:00
Chris Lattner
b23569aff0 Momentous day: remove the "O" member from AsmPrinter. Now all 
"asm printering" happens through MCStreamer.  This also 
Streamerizes PIC16 debug info, which escaped my attention.

This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100327 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 08:18:47 +00:00