Commit Graph

59444 Commits

Author SHA1 Message Date
Cameron Zwarich
1d46732281 Fix RegisterCoalescer::rematerializeTrivialDef() so that it works on flipped
CoalescerPairs. Also, make it take a CoalescerPair directly like other methods
of RegisterCoalescer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 02:51:05 +00:00
Cameron Zwarich
c5f147459b Fix some issues with rematerialization in RegisterCoalescer when the destination
of the copy is a subregister def. The current code assumes that it can do a full
def of the destination register, but it is not checking that the def operand is
read-undef. It also doesn't clear the subregister index of the destination in
the new instruction to reflect the full subregister def.

These issues were found running 'make check' with my next commit that enables
rematerialization in more cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175122 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 02:51:03 +00:00
Rafael Espindola
ad236eb8c6 Don't assume the mangling of static functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175121 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 02:49:18 +00:00
Rafael Espindola
382a5530ec Don't asume that a static function in an extern "C" block will not be mangled.
Since functions with internal linkage don't have language linkage, it is valid
to overload them:

extern "C" {
       static int foo();
       static int foo(int);
}

So we mangle them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175120 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-14 01:58:08 +00:00
Weiming Zhao
c0c2816fb3 temporarily revert the patch due to some conflicts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175107 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 23:24:40 +00:00
Bill Wendling
17fe48ce6e Retain the name of the new internal global that's been shrunk.
It's possible (e.g. after an LTO build) that an internal global may be used for
debugging purposes. If that's the case appending a '.b' to it makes it hard to
find that variable. Steal the name from the old GV before deleting it so that
they can find that variable again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175104 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 23:00:51 +00:00
Anshuman Dasgupta
666e0d3bc4 Hexagon: add support for predicate-GPR copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175102 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 22:56:34 +00:00
Tom Stellard
76308d8d28 R600: Add support for 128-bit parameters
NOTE: This is a candidate for the Mesa stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175096 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 22:05:20 +00:00
Nick Lewycky
48aaf5fd02 Don't build tail calls to functions with three inreg arguments on x86-32 PIC.
Fixes PR15250!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175092 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 21:59:15 +00:00
Weiming Zhao
3019fbbe6a Bug fix 13622: Add paired register support for inline asm with 64-bit data on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175088 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 21:43:02 +00:00
Jyotsna Verma
f6563427c4 Hexagon: Use absolute addressing mode loads/stores for global+offset
instead of redefining separate instructions for them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175086 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 21:38:46 +00:00
Chad Rosier
7b0bc3fe3e [ms-inline-asm] Add support for memory references that have non-immediate
displacements.
rdar://12974533


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175083 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 21:33:44 +00:00
Chad Rosier
19aa3e37dc [ms-inline asm] Add a comment about the determinism of the rewrite sort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175082 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 21:27:17 +00:00
Benjamin Kramer
c0a6e070fc LoopVectorize: Simplify code for clarity.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175076 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 21:12:29 +00:00
Reed Kotler
6b9d461780 For Mips 16, add the optimization where the 16 bit form of addiu sp can be used
if the offset fits in 11 bits. This makes use of the fact that the abi
requires sp to be 8 byte aligned so the actual offset can fit in 8
bits. It will be shifted left and sign extended before being actually used.
The assembler or direct object emitter will shift right the 11 bit
signed field by 3 bits. We don't need to deal with that here.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175073 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 20:28:27 +00:00
Manman Ren
f098620095 Clean up LDV, no functionality change.
Remove dead functions: renameRegister
Move private member variables from LDV to Impl
Remove ssp/uwtable from testing case


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175072 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 20:23:48 +00:00
Andrew Trick
ecb8c2ba60 MIsched: HazardRecognizers are created for each DAG. Free them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175067 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 19:22:27 +00:00
Chad Rosier
abde6755f9 [ms-inline-asm] Use an array_pod_sort, rather than a std:sort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175063 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 18:38:58 +00:00
Pekka Jaaskelainen
5d0ce79e26 Metadata for annotating loops as parallel. The first consumer for this
metadata is the loop vectorizer.

See the documentation update for more info.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175060 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 18:08:57 +00:00
Krzysztof Parzyszek
96848dfc46 Add registration for PPC-specific passes to allow the IR to be dumped
via -print-after-all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175058 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 17:40:07 +00:00
Benjamin Kramer
f09e02f01a X86: Disable generation of rep;movsl when %esi is used as a base pointer.
This happens when there is both stack realignment and a dynamic alloca in the
function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the
base pointer and the next register spill will write into oblivion.

Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas
and freebsd a 4 byte stack alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175057 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 13:40:35 +00:00
Bill Wendling
f107e6ca9b Use array_pod_sort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175048 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 09:26:26 +00:00
Bill Wendling
0e9d5d059c Add some accessor and query methods for retrieving Attribute objects and such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175046 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 08:42:21 +00:00
Reed Kotler
8080696103 Make jumptables work for -static
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175044 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 08:32:14 +00:00
Elena Demikhovsky
d29804f80d Prevent insertion of "vzeroupper" before call that preserves YMM registers, since a caller uses preserved registers across the call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175043 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 08:02:04 +00:00
Eric Christopher
23571f4f2c Check i1 as well as i8 variables for 8 bit registers for x86 inline
assembly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175036 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 06:01:05 +00:00
Kostya Serebryany
7bce462c15 [tsan] disable load widening in ThreadSanitizer mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175034 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 05:59:45 +00:00
Kostya Serebryany
39f02940ba [asan] fix confusing indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175033 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 05:14:12 +00:00
Eric Christopher
b3cecdfcf9 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175024 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 02:29:18 +00:00
Manman Ren
4be3853fd0 Debug Info: LiveDebugVarible can remove DBG_VALUEs, make sure we emit them back.
RegisterCoalescer used to depend on LiveDebugVariable. LDV removes DBG_VALUEs
without emitting them at the end.

We fix this by removing LDV from RegisterCoalescer. Also add an assertion to
make sure we call emitDebugValues if DBG_VALUEs are removed at
runOnMachineFunction.

rdar://problem/13183203
Reviewed by Andy & Jakob


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175023 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 01:14:49 +00:00
Chad Rosier
b195398192 [ms-inline-asm] Make sure the AsmRewrite list is sorted in lexical order.
rdar://13202662


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175021 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 01:03:13 +00:00
David Peixotto
e68542e67e Test commit. Fixed typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175020 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 00:36:35 +00:00
Arnaud A. de Grandmaison
66bff1eec9 Fix comment
visitSExt is an adapted copy of the related visitZExt method, so adapt the comment accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175019 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-13 00:19:19 +00:00
Michael Gottesman
49b5bb4cb4 Changed isStoredObjCPointer => IsStoredObjCPointer. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175017 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 23:35:08 +00:00
Dan Gohman
8a8de9889d Actually delete this code, since it's really not clear what it's
trying to do.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 22:26:41 +00:00
Chad Rosier
469b144f1c [ms-inline-asm] Implement align directive (which is roughly equivalent to .align).
Also, allow _EMIT and __EMIT for the emit directive.  We already do the same
for TYPE, SIZE, and LENGTH.
rdar://13200215


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175008 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 21:33:51 +00:00
Jack Carter
dc08bfbd56 This patch just fixes up various llvm formatting
violations such as tabs, blanks at eol and long 
lines.


 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 21:29:39 +00:00
Guy Benyei
87d0b9ed14 Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175006 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 21:21:59 +00:00
Dan Gohman
5f3c4a3910 Record PRE predecessors with a SmallVector instead of a DenseMap, and
avoid a second pred_iterator traversal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175001 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 19:49:10 +00:00
Chad Rosier
e1d6403128 [ms-inline asm] Pass the length of the IDVal, so we can do a proper AsmRewrite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174999 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 19:42:32 +00:00
Chad Rosier
ab9d251e85 [ms-inline asm] Accept the emit directive as either _emit or __emit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 19:31:23 +00:00
Dan Gohman
8c0d29fee9 When disabling PRE for a value is directly redundant with itself
(through a loop), don't continue to iterate through the reamining
predecessors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174994 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 19:05:10 +00:00
Dan Gohman
c73b96a99f Check that pointers are removed from maps before calling delete on the pointers,
for tidiness' sake.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 18:44:43 +00:00
Dan Gohman
67cd669f7b Minor code simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 18:38:36 +00:00
Chad Rosier
8915e27704 [ms-inline asm] Add support for lexing binary integers with a [bB] suffix.
This is complicated by backward labels (e.g., 0b can be both a backward label
and a binary zero).  The current implementation assumes [0-9]b is always a
label and thus it's possible for 0b and 1b to not be interpreted correctly for
ms-style inline assembly.  However, this is relatively simple to fix in the
inline assembly (i.e., drop the [bB]).

This patch also limits backward labels to [0-9]b, so that only 0b and 1b are
ambiguous.
Part of rdar://12470373


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 18:29:02 +00:00
Krzysztof Parzyszek
c5ef7eee3c Allow optionally generating pubnames section in DWARF info. Introduce
option "generate-dwarf-pubnames" to control it, set to "false" by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174981 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 18:00:14 +00:00
Sergei Larin
91231a6dc7 Equal treatment of labels and other terminators in MI DAG construction.
MI sched DAG construction allows targets to include terminators into scheduling DAG.
Extend this functionality to labels as well.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174977 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 16:36:03 +00:00
Krzysztof Parzyszek
e38825f490 Add support for the pubnames section to llvm-dwarfdump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 16:20:28 +00:00
Jyotsna Verma
6b8d2026ba Hexagon: Add support to generate predicated absolute addressing mode
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 16:06:23 +00:00
Paul Redmond
5c97450df7 PR14562 - Truncation of left shift became undef
DAGCombiner::ReduceLoadWidth was converting (trunc i32 (shl i64 v, 32))
into (shl i32 v, 32) into undef. To prevent this, check the shift count
against the final result size.

Patch by: Kevin Schoedel
Reviewed by: Nadav Rotem


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174972 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12 15:21:21 +00:00