tell debug info which base register to use to reference a frame index on a
per-index basis. This is useful, for example, in the presence of dynamic
stack realignment when local variables are indexed via the stack pointer and
stack-based arguments via the frame pointer.
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The hasNoModRefInfoForCalls isn't worth it as a filter because
basicaa provides m/r info and everything chains to it, so remove
it.
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When splitting a critical edge, the registers live through the edge are:
- Used in a PHI instruction, or
- Live out from the predecessor, and
- Live in to the successor.
This allows the coalescer to eliminate even more phi joins.
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Also fixed the corresponding testcase, and the PALIGNR
intrinsic (tested for correctness with llvm-gcc).
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it may be used in contexts where preheader insertion may have failed due
to an indirectbr.
Make LoopSimplify's LoopSimplify::SeparateNestedLoop properly fail in
the case that it would require splitting an indirectbr edge.
These fix PR5502.
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if it is not ultimately captured. Teach BasicAliasAnalysis that a
local object address which does not escape and is never stored does
not alias with a value resulting from a load.
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4.2.4, 4.3.4, 4.4.2.
The workaround is to use a local min/max implementation that takes an integer
param, and not a reference to integer param (like std::min does).
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contents of the block to be duplicated. Use this for ARM Cortex A8/9 to
be more aggressive tail duplicating indirect branches, since it makes it
much more likely that they will be predicted in the branch target buffer.
Testcase coming soon.
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This is probably not confined to *just* these two things.
Anyway, the llvm-gcc front-end may look up the structure layout information for
an abstract type. That information will be stored into a table with the FE's
TD. Instruction combine can come along and also ask for information on that
abstract type, but for a separate TD (the one associated with the pass manager).
After the type is refined, the old structure layout information in the pass
manager's TD file is out of date. If a new type is allocated in the same space
as the old-unrefined type, then the structure type information in the pass
manager's TD file will be wrong, but won't know it.
Fix this by making the TD's structure type information an abstract type user.
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2. Allow SCCIterator to work with inverse graphs.
3. Fix an incorrect comment in GraphTraits.h (the type in the comment
was given as GraphType* when it is actually const GraphType &).
Patch by Patrick Alexander Simmons.
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as the isSigned bool to CreateIntCast by having this resolve to a call
to a private method, rather than by using a gcc attribute.
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parameter of CreateIntCast then they get an error from the compiler
(or from the linker with a non-gcc compiler). Another possibility
is to flip the order of the DestTy and isSigned parameters, since you
should then get a compiler warning if you try to use a char* for a
Type*.
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(like DbgDeclareInst's) to shrink substantially. It sucks that we have
to pull Compiler.h into such a public header, but at least Compiler.h
doesn't pull anything else in.
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- This is an initial step towards -march=native support in Clang, and towards
eliminating host dependencies in the targets. See PR5389.
- Patch by Roman Divacky!
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- If destination is a physical register and it has a subreg index, use the
sub-register instead.
This fixes PR5423.
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so that isa<Instructon> doesn't return true for FixedStackPseudoSourceValue
values. This fixes a variety of problems, including crashes with -debug
and -print-machineinstrs. Also, add a comment to warn about this.
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Provide special isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE
interfaces to explicitly request checking for post-frame ptr elimination
operands. This uses a heuristic so it isn't reliable for correctness.
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machine instruction loads or stores from/to a stack slot. Unlike
isLoadFromStackSlot and isStoreFromStackSlot, the instruction may be
something other than a pure load/store (e.g. it may be an arithmetic
operation with a memory operand). This helps AsmPrinter determine when
to print a spill/reload comment.
This is only a hint since we may not be able to figure this out in all
cases. As such, it should not be relied upon for correctness.
Implement for X86. Return false by default for other architectures.
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slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.
Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.
Update all targets to adhere to the new interfaces..
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making it visible to clients and adding LLVM-style cast capability.
This will be used by AsmPrinter to determine when to emit spill comments
for an instruction.
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emitting comments. These flags carry semantic information not otherwise
easily derivable from the IR text.
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cannot be folded into target cmp instruction.
- Avoid a phase ordering issue where early cmp optimization would prevent the
later count-to-zero optimization.
- Add missing checks which could cause LSR to reuse stride that does not have
users.
- Fix a bug in count-to-zero optimization code which failed to find the pre-inc
iv's phi node.
- Remove, tighten, loosen some incorrect checks disable valid transformations.
- Quite a bit of code clean up.
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functions like floorf, ceilf, ... Add test for detecting nearbyintf.
This change was prompted by test/Transforms/SimplifyLibCalls/floor.ll
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