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Author SHA1 Message Date
Chris Lattner
8d052bc711 Add some basic patterns for other datatypes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27116 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:39:07 +00:00
Chris Lattner
150ffa7842 add all supported formats to the vector register file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27115 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:36:56 +00:00
Chris Lattner
5814c20766 remove extraneous lets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27114 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:30:34 +00:00
Chris Lattner
64caa8c5cc Add a bunch of simple altivec intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27113 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:27:18 +00:00
Chris Lattner
5a2025465b Add support for __builtin_altivec_vnmsubfp /vmaddfp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27112 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:05:55 +00:00
Chris Lattner
ae5482618b Add support for __builtin_altivec_vnmsubfp 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27111 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 07:05:35 +00:00
Chris Lattner
9bf2d3e6d6 When failing selection for an intrinsic, print this: 
Cannot yet select: intrinsic %llvm.ppc.altivec.lvx

instead of this:

Cannot yet select: 0x9b047e0: v4i32,ch = INTRINSIC 0x9b04540:1, 0x9b04710, 0x9b04790, 0x9b04540


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:47:53 +00:00
Chris Lattner
420736dc85 #include Intrinsics.h into all dag isels 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:47:10 +00:00
Chris Lattner
b847423fc6 Implement Intrinsic::getName 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:32:47 +00:00
Chris Lattner
e42dbed53a Add a programatic interface to intrinsic names. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27107 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:32:07 +00:00
Chris Lattner
9c61dcf1aa Codegen things like: 
<int -1, int -1, int -1, int -1>
and
 <int 65537, int 65537, int 65537, int 65537>

Using things like:
  vspltisb v0, -1
and:
  vspltish v0, 1

instead of using constant pool loads.

This implements CodeGen/PowerPC/vec_splat.ll:splat_imm_i{32|16}.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27106 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:12:06 +00:00
Chris Lattner
b45854fff5 New tests for vsplti* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:11:56 +00:00
Evan Cheng
2c8bb1f531 X86 SSE1 cacheability support ops intrinsics 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27104 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:05:45 +00:00
Evan Cheng
ecac9cb959 Added SSE cachebility ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27103 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:03:26 +00:00
Evan Cheng
cc4f047dca Instruction encoding bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27102 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:00:03 +00:00
Evan Cheng
f09d3ce671 Added a scalar to vector with zero extension testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27101 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 05:58:52 +00:00
Chris Lattner
ea93f63964 Add new intrinsic node definitions for tblgen use 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27100 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 02:29:35 +00:00
Evan Cheng
29e6ac620f X86 SSE1 SIMD store intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 02:02:51 +00:00
Evan Cheng
a30a316110 X86 SSE1 SIMD load intrinsics (movhps, movlps, and movups). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27098 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 01:58:54 +00:00
Evan Cheng
9abc80f6b3 X86 SSE1 conversion operations intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 01:35:17 +00:00
Evan Cheng
7b1d34bc6c Added 128-bit packed integer subtraction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27096 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 01:33:37 +00:00
Evan Cheng
3246e06f84 Added CVTTPS2PI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27095 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 01:31:59 +00:00
Evan Cheng
7dda4052f5 Added CVTSS2SI. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27094 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 01:00:18 +00:00
Evan Cheng
446848ed23 X86 SSE1 comparison intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27093 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 00:32:32 +00:00
Evan Cheng
af4398a281 X86 SSE1 arithmetic and logical operation intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27092 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 00:18:20 +00:00
Evan Cheng
bc4832bc64 Support for scalar to vector with zero extension. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27091 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 23:15:12 +00:00
Chris Lattner
5a1df389a6 Change approach so that we get codegen for free for intrinsics. With this, 
intrinsics that don't take pointer arguments now work.  For example, we can
compile this:

int test3( __m128d *A) {
  return _mm_movemask_pd(*A);
}
int test4( __m128 *A) {
  return _mm_movemask_ps(*A);
}

to this:

_test3:
        movl 4(%esp), %eax
        movapd (%eax), %xmm0
        movmskpd %xmm0, %eax
        ret
_test4:
        movl 4(%esp), %eax
        movaps (%eax), %xmm0
        movmskps %xmm0, %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27090 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 23:10:39 +00:00
Chris Lattner
7255a54561 fix inverted conditional 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27089 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 22:49:42 +00:00
Jim Laskey
ff70fe61ed D'oh - should be even numbered. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27088 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 22:48:02 +00:00
Evan Cheng
c653d48022 Added LDMXCSR 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27087 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 22:28:37 +00:00
Evan Cheng
11f0bd695a ldmxcsr is a SSE instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27086 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 22:13:47 +00:00
Evan Cheng
96bcc109d3 Added ldmxcsr intrinsic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27085 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 22:10:59 +00:00
Chris Lattner
947604b0e2 fix 80 column violations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27084 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:52:20 +00:00
Chris Lattner
ac53eadc29 plug the intrinsics into the patterns for movmsk* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27083 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:49:18 +00:00
Chris Lattner
550525e3cf Parse intrinsics correctly and perform type propagation. This doesn't currently 
emit the code to select intrinsics, but that is next :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27082 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:48:51 +00:00
Jim Laskey
47622e3721 Add dwarf register numbering to register data. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27081 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:15:58 +00:00
Jim Laskey
8da17b242f Add support for dwarf register numbering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27080 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:13:21 +00:00
Jim Laskey
5b4939907e Hack no more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27079 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 21:10:36 +00:00
Chris Lattner
2ca956f8de Make sure to initialize the TheDef field! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27078 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 20:25:01 +00:00
Chris Lattner
057f09bc0b add another note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27077 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 20:04:27 +00:00
Chris Lattner
e6cd96d467 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27076 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 19:59:17 +00:00
Chris Lattner
43fbbc36dc Move CodeGenIntrinsic implementation to CodeGenTarget.cpp with the rest of 
the CodeGen* implementations.

Parse the MVT::ValueType for each operand of the intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27075 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 19:49:31 +00:00
Chris Lattner
782651cffe Specify the value type for each llvm type. This needs work for pointers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27074 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 19:41:10 +00:00
Chris Lattner
da10f19d5c Shuffle some includes around 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27073 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:52:35 +00:00
Chris Lattner
ad72e241c0 Pull in valuetypes.td here, we will use it shortly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27072 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:51:56 +00:00
Evan Cheng
73d7b6029a Only to vector shuffle for {x,x,y,y} cases when SCALAR_TO_VECTOR is free. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27071 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:45:20 +00:00
Chris Lattner
da91bdcfb0 expose intrinsic info to the targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27070 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:44:11 +00:00
Chris Lattner
8edd11f33d Fix a bad JIT encoding of VPERM. Why is VPERM D,A,B,C but vfmadd is D,A,C,B ?? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27069 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 18:24:43 +00:00
Chris Lattner
54e869e18c Like the comment says, prefer to use the implicit add done by [r+r] addressing 
modes than emitting an explicit add and using a base of r0.  This implements
Regression/CodeGen/PowerPC/mem-rr-addr-mode.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27068 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 17:58:06 +00:00
Chris Lattner
33e71b69e1 New testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27067 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-24 17:57:24 +00:00